2 * Copyright (C) 2004 Arabella Software Ltd.
3 * Yuli Barcohen <yuli@arabellasw.com>
5 * Support for Analogue&Micro Adder boards family.
6 * Tested on AdderII and Adder87x.
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #if !defined(CONFIG_MPC875) && !defined(CONFIG_MPC852T)
33 #define CONFIG_ADDER /* Analogue&Micro Adder board */
35 #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
36 #define CONFIG_BAUDRATE 38400
38 #define CONFIG_FEC_ENET /* Ethernet is on FEC */
39 #ifdef CONFIG_FEC_ENET
40 #define CFG_DISCOVER_PHY
42 #endif /* CONFIG_FEC_ENET */
44 #define CONFIG_8xx_OSCLK 10000000 /* 10 MHz oscillator on EXTCLK */
46 #define CONFIG_COMMANDS (CONFIG_CMD_DFL \
53 /* This must be included AFTER the definition of CONFIG_COMMANDS */
54 #include <cmd_confdefs.h>
56 #define CONFIG_BOOTDELAY 5 /* Autoboot after 5 seconds */
57 #define CONFIG_BOOTCOMMAND "bootm fe040000" /* Autoboot command */
58 #define CONFIG_BOOTARGS "root=/dev/mtdblock2 rw"
60 #define CONFIG_BZIP2 /* Include support for bzip2 compressed images */
61 #undef CONFIG_WATCHDOG /* Disable platform specific watchdog */
63 /*-----------------------------------------------------------------------
64 * Miscellaneous configurable options
66 #define CFG_PROMPT "=> " /* Monitor Command Prompt */
67 #define CFG_HUSH_PARSER
68 #define CFG_PROMPT_HUSH_PS2 "> "
69 #define CFG_LONGHELP /* #undef to save memory */
70 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
71 #define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) /* Print Buffer Size */
72 #define CFG_MAXARGS 16 /* Max number of command args */
73 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
75 #define CFG_LOAD_ADDR 0x100000 /* Default load address */
77 #define CFG_HZ 1000 /* Decrementer freq: 1 ms ticks */
79 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
81 /*-----------------------------------------------------------------------
82 * RAM configuration (note that CFG_SDRAM_BASE must be zero)
84 #define CFG_SDRAM_BASE 0x00000000
85 #define CFG_SDRAM_SIZE 0x00800000 /* 8 Mbyte */
87 #define CFG_OR1_PRELIM (0xFF800000 | OR_CSNT_SAM | OR_ACS_DIV2)
88 #define CFG_BR1_PRELIM (CFG_SDRAM_BASE | BR_PS_32 | BR_MS_UPMA | BR_V)
90 #define CFG_MAMR 0x00802114
92 #define CFG_MEMTEST_START 0x00100000 /* memtest works on */
93 #define CFG_MEMTEST_END 0x00700000 /* 1 ... 7 MB in SDRAM */
95 #define CFG_RESET_ADDRESS 0x09900000
97 /*-----------------------------------------------------------------------
98 * For booting Linux, the board info and command line data
99 * have to be in the first 8 MB of memory, since this is
100 * the maximum mapped by the Linux kernel during initialization.
102 #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
104 #define CFG_MONITOR_BASE TEXT_BASE
105 #define CFG_MONITOR_LEN (192 << 10) /* Reserve 192 KB for Monitor */
107 #define CFG_MALLOC_LEN (2500 << 10) /* Reserve ~2.5 MB for malloc() */
109 #define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 KB for malloc() */
110 #endif /* CONFIG_BZIP2 */
112 /*-----------------------------------------------------------------------
115 #define CFG_FLASH_BASE 0xFE000000
116 #define CFG_FLASH_CFI /* The flash is CFI compatible */
117 #define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
118 #define CFG_MAX_FLASH_BANKS 1 /* Max number of flash banks */
119 #define CFG_MAX_FLASH_SECT 128 /* Max num of sects on one chip */
121 /* Environment is in flash */
122 #define CFG_ENV_IS_IN_FLASH
123 #define CFG_ENV_SECT_SIZE 0x10000 /* We use one complete sector */
124 #define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
126 #define CFG_OR0_PRELIM 0xFF000774
127 #define CFG_BR0_PRELIM (CFG_FLASH_BASE | BR_PS_16 | BR_MS_GPCM | BR_V)
129 /*-----------------------------------------------------------------------
130 * Internal Memory Map Register
132 #define CFG_IMMR 0xFF000000
134 /*-----------------------------------------------------------------------
135 * Definitions for initial stack pointer and data area (in DPRAM)
137 #define CFG_INIT_RAM_ADDR CFG_IMMR
138 #define CFG_INIT_RAM_END 0x2F00 /* End of used area in DPRAM */
139 #define CFG_GBL_DATA_SIZE 128 /* Size in bytes reserved for initial data */
140 #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
141 #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
143 /*-----------------------------------------------------------------------
144 * Configuration registers
146 #ifdef CONFIG_WATCHDOG
147 #define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | \
148 SYPCR_SWF | SYPCR_SWE | SYPCR_SWRI | \
151 #define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | \
152 SYPCR_SWF | SYPCR_SWP)
153 #endif /* CONFIG_WATCHDOG */
155 #define CFG_SIUMCR (SIUMCR_MLRC01 | SIUMCR_DBGC11)
157 /* TBSCR - Time Base Status and Control Register */
158 #define CFG_TBSCR (TBSCR_TBF | TBSCR_TBE)
160 /* PISCR - Periodic Interrupt Status and Control */
161 #define CFG_PISCR (PISCR_PS | PISCR_PITF)
163 /* PLPRCR - PLL, Low-Power, and Reset Control Register */
164 /* #define CFG_PLPRCR PLPRCR_TEXPS */
166 /* SCCR - System Clock and reset Control Register */
167 #define SCCR_MASK SCCR_EBDF11
168 #define CFG_SCCR SCCR_RTSEL
172 /*-----------------------------------------------------------------------
173 * Cache Configuration
175 #define CFG_CACHELINE_SIZE 16 /* For all MPC8xx chips */
177 /*-----------------------------------------------------------------------
178 * Internal Definitions
182 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from flash */
183 #define BOOTFLAG_WARM 0x02 /* Software reboot */
185 #endif /* __CONFIG_H */