3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * High Level Configuration Options
32 #define CONFIG_MPC5XXX 1 /* This is an MPC5xxx CPU */
33 #define CONFIG_ICECUBE 1 /* ... on IceCube board */
35 #define CFG_MPC5XXX_CLKIN 33333333 /* ... running at 33MHz */
37 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
38 #define BOOTFLAG_WARM 0x02 /* Software reboot */
40 #define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
41 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
42 # define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
46 * Serial console configuration
48 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
49 #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
50 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
53 #ifdef CONFIG_MPC5200 /* MPC5100 PCI is not supported yet. */
56 * 0x40000000 - 0x4fffffff - PCI Memory
57 * 0x50000000 - 0x50ffffff - PCI IO Space
60 #define CONFIG_PCI_PNP 1
61 #define CONFIG_PCI_SCAN_SHOW 1
63 #define CONFIG_PCI_MEM_BUS 0x40000000
64 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
65 #define CONFIG_PCI_MEM_SIZE 0x10000000
67 #define CONFIG_PCI_IO_BUS 0x50000000
68 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
69 #define CONFIG_PCI_IO_SIZE 0x01000000
71 #define CONFIG_NET_MULTI 1
72 #define CONFIG_EEPRO100 1
73 #define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
75 #define ADD_PCI_CMD CFG_CMD_PCI
79 #define ADD_PCI_CMD 0 /* no CFG_CMD_PCI */
86 #define CONFIG_COMMANDS (CONFIG_CMD_DFL | ADD_PCI_CMD)
88 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
89 #include <cmd_confdefs.h>
94 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
95 #define CONFIG_BOOTCOMMAND "bootm 100000" /* autoboot command */
96 #define CONFIG_BOOTARGS "root=/dev/ram rw"
103 * Flash configuration
105 #define CFG_FLASH_BASE 0xff800000
106 #define CFG_FLASH_SIZE 0x00800000
111 #define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */
112 #define CFG_MAX_FLASH_SECT 128 /* max num of sects on one chip */
114 #define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
115 #define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
117 #undef CONFIG_FLASH_16BIT /* Flash is 8-bit */
121 * Environment settings
123 #define CFG_ENV_IS_IN_FLASH 1
124 #define CFG_ENV_SIZE 0x10000
125 #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x740000)
126 #define CFG_ENV_SECT_SIZE 0x10000
127 #define CONFIG_ENV_OVERWRITE 1
132 #define CFG_MBAR 0xf0000000
133 #define CFG_SDRAM_BASE 0x00000000
134 #ifdef CONFIG_MPC5200
135 #define CFG_DEFAULT_MBAR 0x80000000
138 /* Use SRAM until RAM will be available */
139 #define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
140 #define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE /* End of used area in DPRAM */
143 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
144 #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
145 #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
147 #define CFG_MONITOR_BASE TEXT_BASE
148 #if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
149 # define CFG_RAMBOOT 1
152 #define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
153 #define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
154 #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
157 * Ethernet configuration
159 #define CONFIG_MPC5XXX_FEC 1
164 #define CFG_GPS_PORT_CONFIG 0x00000004
167 * Miscellaneous configurable options
169 #define CFG_LONGHELP /* undef to save memory */
170 #define CFG_PROMPT "=> " /* Monitor Command Prompt */
171 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
172 #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
174 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
176 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
177 #define CFG_MAXARGS 16 /* max number of command args */
178 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
180 #define CFG_MEMTEST_START 0x00100000 /* memtest works on */
181 #define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
183 #define CFG_LOAD_ADDR 0x100000 /* default load address */
185 #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
188 * Various low-level settings
190 #define CFG_HID0_INIT 0
191 #define CFG_HID0_FINAL 0
193 #define CFG_BOOTCS_START CFG_FLASH_BASE
194 #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
195 #define CFG_BOOTCS_CFG 0x00047801
196 #define CFG_CS0_START CFG_FLASH_BASE
197 #define CFG_CS0_SIZE CFG_FLASH_SIZE
199 #define CFG_CS_BURST 0x00000000
200 #define CFG_CS_DEADCYCLE 0x33333333
202 #define CFG_RESET_ADDRESS 0xff000000
204 #endif /* __CONFIG_H */