2 * (C) Copyright 2003-2005
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * (C) Copyright 2004-2006
6 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * High Level Configuration Options
35 #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
36 #define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
37 #define CONFIG_TQM5200 1 /* ... on TQM5200 module */
38 #undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
40 #ifndef CONFIG_CAM5200 /* On a Cameron board or ... */
41 #define CONFIG_STK52XX 1 /* ... on a STK52XX board */
44 #define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
46 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
47 #define BOOTFLAG_WARM 0x02 /* Software reboot */
49 #define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
50 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
51 # define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
55 * Serial console configuration
57 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
58 #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
59 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
62 #define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
63 #define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
64 #define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
65 #define CONFIG_PS2MULT_DELAY (CFG_HZ/2) /* Initial delay */
66 #define CONFIG_BOARD_EARLY_INIT_R
67 #endif /* CONFIG_STK52XX */
71 * 0x40000000 - 0x4fffffff - PCI Memory
72 * 0x50000000 - 0x50ffffff - PCI IO Space
76 #define CONFIG_PCI_PNP 1
77 /* #define CONFIG_PCI_SCAN_SHOW 1 */
79 #define CONFIG_PCI_MEM_BUS 0x40000000
80 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
81 #define CONFIG_PCI_MEM_SIZE 0x10000000
83 #define CONFIG_PCI_IO_BUS 0x50000000
84 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
85 #define CONFIG_PCI_IO_SIZE 0x01000000
87 #define CONFIG_NET_MULTI 1
88 #define CONFIG_EEPRO100 1
89 #define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
90 #define CONFIG_NS8382X 1
91 #endif /* CONFIG_STK52XX */
94 #define ADD_PCI_CMD CFG_CMD_PCI
102 #ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
104 #define CONFIG_VIDEO_SM501
105 #define CONFIG_VIDEO_SM501_32BPP
106 #define CONFIG_CFB_CONSOLE
107 #define CONFIG_VIDEO_LOGO
108 #define CONFIG_VGA_AS_SINGLE_DEVICE
109 #define CONFIG_CONSOLE_EXTRA_INFO
110 #define CONFIG_VIDEO_SW_CURSOR
111 #define CONFIG_SPLASH_SCREEN
112 #define CFG_CONSOLE_IS_IN_ENV
116 #define ADD_BMP_CMD CFG_CMD_BMP
118 #define ADD_BMP_CMD 0
122 #define CONFIG_MAC_PARTITION
123 #define CONFIG_DOS_PARTITION
124 #define CONFIG_ISO_PARTITION
127 #ifdef CONFIG_STK52XX
128 #define CONFIG_USB_OHCI_NEW
129 #define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
130 #define CONFIG_USB_STORAGE
132 #undef CFG_USB_OHCI_BOARD_INIT
133 #define CFG_USB_OHCI_CPU_INIT
134 #define CFG_USB_OHCI_REGS_BASE MPC5XXX_USB
135 #define CFG_USB_OHCI_SLOT_NAME "mpc5200"
136 #define CFG_USB_OHCI_MAX_ROOT_PORTS 15
139 #define ADD_USB_CMD 0
142 #ifndef CONFIG_CAM5200
144 #define CONFIG_POST (CFG_POST_MEMORY | \
150 #define CFG_CMD_POST_DIAG CFG_CMD_DIAG
151 /* preserve space for the post_word at end of on-chip SRAM */
152 #define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
154 #define CFG_CMD_POST_DIAG 0
158 #if defined (CONFIG_MINIFAP) || defined (CONFIG_STK52XX)
159 #define ADD_IDE_CMD (CFG_CMD_IDE | CFG_CMD_FAT | CFG_CMD_EXT2)
161 #define ADD_IDE_CMD 0
167 #define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
181 CFG_CMD_POST_DIAG | \
186 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
187 #include <cmd_confdefs.h>
189 #define CONFIG_TIMESTAMP /* display image timestamps */
191 #if (TEXT_BASE != 0xFFF00000)
192 # define CFG_LOWBOOT 1 /* Boot low */
198 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
200 #define CONFIG_PREBOOT "echo;" \
201 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
204 #undef CONFIG_BOOTARGS
206 #ifdef CONFIG_STK52XX
207 # if defined(CONFIG_TQM5200_B)
208 # if defined(CFG_LOWBOOT)
210 "update=protect off FC000000 FC07FFFF;" \
211 "erase FC000000 FC07FFFF;" \
212 "cp.b 200000 FC000000 ${filesize};" \
213 "protect on FC000000 FC07FFFF\0"
214 # else /* highboot */
216 "update=protect off FFF00000 FFF7FFFF;" \
217 "erase FFF00000 FFF7FFFF;" \
218 "cp.b 200000 FFF00000 ${filesize};" \
219 "protect on FFF00000 FFF7FFFF\0"
220 # endif /* CFG_LOWBOOT */
221 # else /* !CONFIG_TQM5200_B */
223 "update=protect off FC000000 FC05FFFF;" \
224 "erase FC000000 FC05FFFF;" \
225 "cp.b 200000 FC000000 ${filesize};" \
226 "protect on FC000000 FC05FFFF\0"
227 # endif /* CONFIG_TQM5200_B */
228 #elif defined (CONFIG_CAM5200)
230 "update=protect off FC000000 FC03FFFF;" \
231 "erase FC000000 FC03FFFF;" \
232 "cp.b 200000 FC000000 ${filesize};" \
233 "protect on FC000000 FC03FFFF\0"
235 # error "Unknown Carrier Board"
236 #endif /* CONFIG_STK52XX */
238 #define CONFIG_EXTRA_ENV_SETTINGS \
240 "rootpath=/opt/eldk/ppc_6xx\0" \
241 "ramargs=setenv bootargs root=/dev/ram rw\0" \
242 "nfsargs=setenv bootargs root=/dev/nfs rw " \
243 "nfsroot=${serverip}:${rootpath}\0" \
244 "addip=setenv bootargs ${bootargs} " \
245 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
246 ":${hostname}:${netdev}:off panic=1\0" \
247 "addcons=setenv bootargs ${bootargs} " \
248 "console=ttyS0,${baudrate}\0" \
249 "flash_self=run ramargs addip addcons;" \
250 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
251 "flash_nfs=run nfsargs addip addcons;" \
252 "bootm ${kernel_addr}\0" \
253 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \
255 "bootfile=/tftpboot/tqm5200/uImage\0" \
256 "u-boot=/tftpboot/tqm5200/u-boot.bin\0" \
257 "load=tftp 200000 ${u-boot}\0" \
261 #define CONFIG_BOOTCOMMAND "run net_nfs"
264 * IPB Bus clocking configuration.
266 #define CFG_IPBSPEED_133 /* define for 133MHz speed */
268 #if defined(CFG_IPBSPEED_133)
270 * PCI Bus clocking configuration
272 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
273 * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
274 * been tested with a IPB Bus Clock of 66 MHz.
276 #define CFG_PCISPEED_66 /* define for 66MHz speed */
282 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
283 #ifdef CONFIG_TQM5200_REV100
284 #define CFG_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
286 #define CFG_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
290 * I2C clock frequency
292 * Please notice, that the resulting clock frequency could differ from the
293 * configured value. This is because the I2C clock is derived from system
294 * clock over a frequency divider with only a few divider values. U-boot
295 * calculates the best approximation for CFG_I2C_SPEED. However the calculated
296 * approximation allways lies below the configured value, never above.
298 #define CFG_I2C_SPEED 100000 /* 100 kHz */
299 #define CFG_I2C_SLAVE 0x7F
302 * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
303 * also). For other EEPROMs configuration should be verified. On Mini-FAP the
304 * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
305 * same configuration could be used.
307 #define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */
308 #define CFG_I2C_EEPROM_ADDR_LEN 2
309 #define CFG_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
310 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
313 * HW-Monitor configuration on Mini-FAP
315 #if defined (CONFIG_MINIFAP)
316 #define CFG_I2C_HWMON_ADDR 0x2C
319 /* List of I2C addresses to be verified by POST */
320 #if defined (CONFIG_MINIFAP)
322 #define I2C_ADDR_LIST { CFG_I2C_EEPROM_ADDR, \
323 CFG_I2C_HWMON_ADDR, \
328 * Flash configuration
330 #define CFG_FLASH_BASE 0xFC000000
332 /* use CFI flash driver */
333 #define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
334 #define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
335 #define CFG_FLASH_BANKS_LIST { CFG_BOOTCS_START }
336 #define CFG_FLASH_EMPTY_INFO
337 #define CFG_FLASH_SIZE 0x04000000 /* 64 MByte */
338 #define CFG_MAX_FLASH_SECT 512 /* max num of sects on one chip */
339 #define CFG_FLASH_USE_BUFFER_WRITE 1
341 #if defined (CONFIG_CAM5200)
342 # define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00040000)
343 #elif defined(CONFIG_TQM5200_B)
344 # define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00080000)
346 # define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00060000)
349 #define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks
352 /* Dynamic MTD partition support */
353 #define CONFIG_JFFS2_CMDLINE
354 #define MTDIDS_DEFAULT "nor0=TQM5200-0"
356 #ifdef CONFIG_STK52XX
357 # if defined(CONFIG_TQM5200_B)
358 # if defined(CFG_LOWBOOT)
359 # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:1m(firmware)," \
365 # else /* highboot */
366 # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:2560k(kernel)," \
372 # endif /* CFG_LOWBOOT */
373 # else /* !CONFIG_TQM5200_B */
374 # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
380 # endif /* CONFIG_TQM5200_B */
381 #elif defined (CONFIG_CAM5200)
382 # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:768k(firmware)," \
389 # error "Unknown Carrier Board"
390 #endif /* CONFIG_STK52XX */
393 * Environment settings
395 #define CFG_ENV_IS_IN_FLASH 1
396 #define CFG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
397 #if defined(CONFIG_TQM5200_B)
398 #define CFG_ENV_SECT_SIZE 0x40000
400 #define CFG_ENV_SECT_SIZE 0x20000
401 #endif /* CONFIG_TQM5200_B */
402 #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
403 #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
408 #define CFG_MBAR 0xF0000000
409 #define CFG_SDRAM_BASE 0x00000000
410 #define CFG_DEFAULT_MBAR 0x80000000
412 /* Use ON-Chip SRAM until RAM will be available */
413 #define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
415 /* preserve space for the post_word at end of on-chip SRAM */
416 #define CFG_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE
418 #define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE
422 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
423 #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
424 #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
426 #define CFG_MONITOR_BASE TEXT_BASE
427 #if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
428 # define CFG_RAMBOOT 1
431 #if defined (CONFIG_CAM5200)
432 # define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
433 #elif defined(CONFIG_TQM5200_B)
434 # define CFG_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
436 # define CFG_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
439 #define CFG_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
440 #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
443 * Ethernet configuration
445 #define CONFIG_MPC5xxx_FEC 1
447 * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
449 /* #define CONFIG_FEC_10MBIT 1 */
450 #define CONFIG_PHY_ADDR 0x00
455 * use pin gpio_wkup_6 as second SDRAM chip select (mem_cs1):
456 * Bit 0 (mask: 0x80000000): 1
457 * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
458 * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
459 * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
460 * Use for REV200 STK52XX boards. Do not use with REV100 modules
461 * (because, there I2C1 is used as I2C bus)
462 * use PSC1 as UART: Bits 28-31 (mask: 0x00000007): 0100
463 * use PSC2 as CAN: Bits 25:27 (mask: 0x00000030)
464 * 000 -> All PSC2 pins are GIOPs
465 * 001 -> CAN1/2 on PSC2 pins
466 * Use for REV100 STK52xx boards
469 * use as UART. Pins PSC6_0 to PSC6_3 are used.
470 * Bits 9:11 (mask: 0x00700000):
471 * 101 -> PSC6 : Extended POST test is not available
472 * on MINI-FAP and TQM5200_IB:
473 * use PSC6_0 to PSC6_3 as GPIO: Bits 9:11 (mask: 0x00700000):
474 * 000 -> PSC6 could not be used as UART, CODEC or IrDA
475 * GPIO on PSC6_3 is used in post_hotkeys_pressed() to enable extended POST
478 #if defined (CONFIG_MINIFAP)
479 # define CFG_GPS_PORT_CONFIG 0x91000004
480 #elif defined (CONFIG_STK52XX)
481 # if defined (CONFIG_STK52XX_REV100)
482 # define CFG_GPS_PORT_CONFIG 0x81500014
483 # else /* STK52xx REV200 and above */
484 # if defined (CONFIG_TQM5200_REV100)
485 # error TQM5200 REV100 not supported on STK52XX REV200 or above
486 # else/* TQM5200 REV200 and above */
487 # define CFG_GPS_PORT_CONFIG 0x91500004
490 #else /* TMQ5200 Inbetriebnahme-Board */
491 # define CFG_GPS_PORT_CONFIG 0x81000004
497 #if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
498 # define CONFIG_RTC_M41T11 1
499 # define CFG_I2C_RTC_ADDR 0x68
500 # define CFG_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
503 # define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
507 * Miscellaneous configurable options
509 #define CFG_LONGHELP /* undef to save memory */
510 #define CFG_PROMPT "=> " /* Monitor Command Prompt */
512 #define CFG_HUSH_PARSER 1 /* use "hush" command parser */
513 #define CFG_PROMPT_HUSH_PS2 "> "
515 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
516 #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
518 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
520 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
521 #define CFG_MAXARGS 16 /* max number of command args */
522 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
524 /* Enable an alternate, more extensive memory test */
525 #define CFG_ALT_MEMTEST
527 #define CFG_MEMTEST_START 0x00100000 /* memtest works on */
528 #define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
530 #define CFG_LOAD_ADDR 0x100000 /* default load address */
532 #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
535 * Enable loopw commando. This has only affect, if CFG_CMD_MEM is defined,
536 * which is normally part of the default commands (CFV_CMD_DFL)
541 * Various low-level settings
543 #if defined(CONFIG_MPC5200)
544 #define CFG_HID0_INIT HID0_ICE | HID0_ICFI
545 #define CFG_HID0_FINAL HID0_ICE
547 #define CFG_HID0_INIT 0
548 #define CFG_HID0_FINAL 0
551 #define CFG_BOOTCS_START CFG_FLASH_BASE
552 #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
553 #ifdef CFG_PCISPEED_66
554 #define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
556 #define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
558 #define CFG_CS0_START CFG_FLASH_BASE
559 #define CFG_CS0_SIZE CFG_FLASH_SIZE
561 #define CONFIG_LAST_STAGE_INIT
564 * SRAM - Do not map below 2 GB in address space, because this area is used
565 * for SDRAM autosizing.
567 #define CFG_CS2_START 0xE5000000
568 #define CFG_CS2_SIZE 0x100000 /* 1 MByte */
569 #define CFG_CS2_CFG 0x0004D930
572 * Grafic controller - Do not map below 2 GB in address space, because this
573 * area is used for SDRAM autosizing.
575 #define SM501_FB_BASE 0xE0000000
576 #define CFG_CS1_START (SM501_FB_BASE)
577 #define CFG_CS1_SIZE 0x4000000 /* 64 MByte */
578 #define CFG_CS1_CFG 0x8F48FF70
579 #define SM501_MMIO_BASE CFG_CS1_START + 0x03E00000
581 #define CFG_CS_BURST 0x00000000
582 #define CFG_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
584 #define CFG_RESET_ADDRESS 0xff000000
586 /*-----------------------------------------------------------------------
588 *-----------------------------------------------------------------------
590 #define CONFIG_USB_CLOCK 0x0001BBBB
591 #define CONFIG_USB_CONFIG 0x00001000
593 /*-----------------------------------------------------------------------
594 * IDE/ATA stuff Supports IDE harddisk
595 *-----------------------------------------------------------------------
598 #undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
600 #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
601 #undef CONFIG_IDE_LED /* LED for ide not supported */
603 #define CONFIG_IDE_RESET /* reset for ide supported */
604 #define CONFIG_IDE_PREINIT
606 #define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
607 #define CFG_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
609 #define CFG_ATA_IDE0_OFFSET 0x0000
611 #define CFG_ATA_BASE_ADDR MPC5XXX_ATA
613 /* Offset for data I/O */
614 #define CFG_ATA_DATA_OFFSET (0x0060)
616 /* Offset for normal register accesses */
617 #define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET)
619 /* Offset for alternate registers */
620 #define CFG_ATA_ALT_OFFSET (0x005C)
622 /* Interval between registers */
623 #define CFG_ATA_STRIDE 4
625 #endif /* __CONFIG_H */