2 * Copyright (C) 2016 Timesys Corporation
3 * Copyright (C) 2016 Advantech Corporation
4 * Copyright (C) 2012 Freescale Semiconductor, Inc.
6 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef __ADVANTECH_DMSBA16_CONFIG_H
10 #define __ADVANTECH_DMSBA16_CONFIG_H
12 #include <asm/arch/imx-regs.h>
13 #include <asm/imx-common/gpio.h>
15 #define CONFIG_BOARD_NAME "Advantech DMS-BA16"
17 #define CONFIG_MXC_UART_BASE UART4_BASE
18 #define CONSOLE_DEV "ttymxc3"
19 #define CONFIG_EXTRA_BOOTARGS "panic=10"
21 #define CONFIG_BOOT_DIR ""
22 #define CONFIG_LOADCMD "fatload"
23 #define CONFIG_RFSPART "2"
25 #define CONFIG_SUPPORT_EMMC_BOOT
27 #include "mx6_common.h"
28 #include <linux/sizes.h>
30 #define CONFIG_CMDLINE_TAG
31 #define CONFIG_SETUP_MEMORY_TAGS
32 #define CONFIG_INITRD_TAG
33 #define CONFIG_REVISION_TAG
34 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
36 #define CONFIG_BOARD_EARLY_INIT_F
38 #define CONFIG_MXC_GPIO
39 #define CONFIG_MXC_UART
41 #define CONFIG_CMD_FUSE
42 #define CONFIG_MXC_OCOTP
45 #define CONFIG_CMD_SATA
46 #define CONFIG_DWC_AHSATA
47 #define CONFIG_SYS_SATA_MAX_DEVICE 1
48 #define CONFIG_DWC_AHSATA_PORT_ID 0
49 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
54 #define CONFIG_FSL_ESDHC
55 #define CONFIG_FSL_USDHC
56 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
57 #define CONFIG_GENERIC_MMC
58 #define CONFIG_BOUNCE_BUFFER
59 #define CONFIG_DOS_PARTITION
62 #define CONFIG_USB_EHCI
63 #define CONFIG_USB_EHCI_MX6
64 #define CONFIG_USB_STORAGE
65 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
66 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
67 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
68 #define CONFIG_MXC_USB_FLAGS 0
69 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
71 #define CONFIG_USBD_HS
72 #define CONFIG_USB_FUNCTION_MASS_STORAGE
73 #define CONFIG_USB_GADGET_VBUS_DRAW 2
75 /* Networking Configs */
76 #define CONFIG_FEC_MXC
78 #define IMX_FEC_BASE ENET_BASE_ADDR
79 #define CONFIG_FEC_XCV_TYPE RGMII
80 #define CONFIG_ETHPRIME "FEC"
81 #define CONFIG_FEC_MXC_PHYADDR 4
83 #define CONFIG_PHY_ATHEROS
87 #define CONFIG_MXC_SPI
88 #define CONFIG_SF_DEFAULT_BUS 0
89 #define CONFIG_SF_DEFAULT_CS 0
90 #define CONFIG_SF_DEFAULT_SPEED 20000000
91 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
94 /* allow to overwrite serial and ethaddr */
95 #define CONFIG_ENV_OVERWRITE
96 #define CONFIG_CONS_INDEX 1
97 #define CONFIG_BAUDRATE 115200
99 /* Command definition */
100 #define CONFIG_CMD_BMODE
102 #define CONFIG_LOADADDR 0x12000000
103 #define CONFIG_SYS_TEXT_BASE 0x17800000
105 #define CONFIG_EXTRA_ENV_SETTINGS \
106 "script=boot.scr\0" \
107 "image=" CONFIG_BOOT_DIR "/uImage\0" \
108 "uboot=u-boot.imx\0" \
109 "fdt_file=" CONFIG_BOOT_DIR "/" CONFIG_DEFAULT_FDT_FILE "\0" \
110 "fdt_addr=0x18000000\0" \
113 "console=" CONSOLE_DEV "\0" \
114 "fdt_high=0xffffffff\0" \
115 "initrd_high=0xffffffff\0" \
119 "loadcmd=" CONFIG_LOADCMD "\0" \
120 "rfspart=" CONFIG_RFSPART "\0" \
121 "update_sd_firmware=" \
122 "if test ${ip_dyn} = yes; then " \
123 "setenv get_cmd dhcp; " \
125 "setenv get_cmd tftp; " \
127 "if mmc dev ${mmcdev}; then " \
128 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
129 "setexpr fw_sz ${filesize} / 0x200; " \
130 "setexpr fw_sz ${fw_sz} + 1; " \
131 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
135 "if tftp $loadaddr $uboot; then " \
137 "sf erase 0 0xC0000; " \
138 "sf write $loadaddr 0x400 $filesize; " \
139 "echo 'U-Boot upgraded. Please reset'; " \
141 "setargs=setenv bootargs console=${console},${baudrate} " \
142 "root=/dev/${rootdev} rw rootwait " CONFIG_EXTRA_BOOTARGS "\0" \
144 "${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \
145 "bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \
148 "${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
149 "loadfdt=${loadcmd} ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \
151 "if run loadbootscript; then " \
154 "if run loadimage; then " \
158 "doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \
160 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
161 "if run loadfdt; then " \
162 "bootm ${loadaddr} - ${fdt_addr}; " \
164 "if test ${boot_fdt} = try; then " \
167 "echo WARN: Cannot load the DT; " \
173 "netargs=setenv bootargs console=${console},${baudrate} " \
175 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
176 "netboot=echo Booting from net ...; " \
178 "if test ${ip_dyn} = yes; then " \
179 "setenv get_cmd dhcp; " \
181 "setenv get_cmd tftp; " \
183 "${get_cmd} ${image}; " \
184 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
185 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
186 "bootm ${loadaddr} - ${fdt_addr}; " \
188 "if test ${boot_fdt} = try; then " \
191 "echo WARN: Cannot load the DT; " \
198 #define CONFIG_BOOTCOMMAND \
201 "setenv devnum 0; " \
202 "setenv rootdev sda${rfspart}; " \
206 "setenv rootdev mmcblk0p${rfspart}; " \
208 "setenv devnum ${sddev}; " \
209 "if mmc dev ${devnum}; then " \
213 "setenv devnum ${emmcdev}; " \
214 "setenv rootdev mmcblk${emmcdev}p${rfspart}; " \
215 "if mmc dev ${devnum}; then " \
221 #define CONFIG_ARP_TIMEOUT 200UL
223 /* Miscellaneous configurable options */
224 #define CONFIG_SYS_LONGHELP
225 #define CONFIG_AUTO_COMPLETE
227 /* Print Buffer Size */
228 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
229 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
231 #define CONFIG_SYS_MEMTEST_START 0x10000000
232 #define CONFIG_SYS_MEMTEST_END 0x10010000
233 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
235 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
237 #define CONFIG_CMDLINE_EDITING
238 #define CONFIG_STACKSIZE (128 * 1024)
240 /* Physical Memory Map */
241 #define CONFIG_NR_DRAM_BANKS 1
242 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
244 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
245 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
246 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
248 #define CONFIG_SYS_INIT_SP_OFFSET \
249 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
250 #define CONFIG_SYS_INIT_SP_ADDR \
251 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
253 /* FLASH and environment organization */
254 #define CONFIG_SYS_NO_FLASH
256 #define CONFIG_ENV_IS_IN_SPI_FLASH
257 #define CONFIG_ENV_SIZE (8 * 1024)
258 #define CONFIG_ENV_OFFSET (768 * 1024)
259 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
260 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
261 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
262 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
263 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
265 #ifndef CONFIG_SYS_DCACHE_OFF
268 #define CONFIG_SYS_FSL_USDHC_NUM 3
271 #define CONFIG_VIDEO_IPUV3
272 #define CONFIG_VIDEO_BMP_RLE8
273 #define CONFIG_SPLASH_SCREEN
274 #define CONFIG_SPLASH_SCREEN_ALIGN
275 #define CONFIG_BMP_16BPP
276 #define CONFIG_VIDEO_LOGO
277 #define CONFIG_VIDEO_BMP_LOGO
278 #define CONFIG_IPUV3_CLK 260000000
279 #define CONFIG_IMX_HDMI
280 #define CONFIG_IMX_VIDEO_SKIP
282 #define CONFIG_PWM_IMX
283 #define CONFIG_IMX6_PWM_PER_CLK 66000000
285 #undef CONFIG_CMD_PCI
286 #ifdef CONFIG_CMD_PCI
287 #define CONFIG_PCI_SCAN_SHOW
288 #define CONFIG_PCIE_IMX
289 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
290 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5)
294 #define CONFIG_SYS_I2C
295 #define CONFIG_SYS_I2C_MXC
296 #define CONFIG_SYS_I2C_SPEED 100000
297 #define CONFIG_SYS_I2C_MXC_I2C1
298 #define CONFIG_SYS_I2C_MXC_I2C2
299 #define CONFIG_SYS_I2C_MXC_I2C3
301 #endif /* __ADVANTECH_DMSBA16_CONFIG_H */