2 * include/configs/alt.h
3 * This file is alt board configuration.
5 * Copyright (C) 2014 Renesas Electronics Corporation
7 * SPDX-License-Identifier: GPL-2.0
14 #define CONFIG_R8A7794
15 #define CONFIG_RMOBILE_BOARD_STRING "Alt"
17 #include "rcar-gen2-common.h"
19 #if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
20 #define CONFIG_SYS_TEXT_BASE 0x70000000
22 #define CONFIG_SYS_TEXT_BASE 0xE6304000
25 #if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
26 #define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC
28 #define CONFIG_SYS_INIT_SP_ADDR 0xE633FFFC
30 #define STACK_AREA_SIZE 0xC000
31 #define LOW_LEVEL_MERAM_STACK \
32 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
35 #define RCAR_GEN2_SDRAM_BASE 0x40000000
36 #define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024)
37 #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
40 #define CONFIG_SCIF_CONSOLE
44 #define CONFIG_SPI_FLASH_BAR
45 #define CONFIG_SH_QSPI
46 #define CONFIG_SPI_FLASH
47 #define CONFIG_SPI_FLASH_SPANSION
48 #define CONFIG_SPI_FLASH_QUAD
49 #define CONFIG_SYS_NO_FLASH
52 #define CONFIG_SH_ETHER
53 #define CONFIG_SH_ETHER_USE_PORT 0
54 #define CONFIG_SH_ETHER_PHY_ADDR 0x1
55 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
56 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
57 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
58 #define CONFIG_SH_ETHER_ALIGNE_SIZE 64
60 #define CONFIG_PHY_MICREL
61 #define CONFIG_BITBANGMII
62 #define CONFIG_BITBANGMII_MULTI
65 #define RMOBILE_XTAL_CLK 20000000u
66 #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
67 #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */
68 #define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2)
69 #define CONFIG_P_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 24)
71 #define CONFIG_SYS_TMU_CLK_DIV 4
74 #define CONFIG_CMD_I2C
75 #define CONFIG_SYS_I2C
76 #define CONFIG_SYS_I2C_SH
77 #define CONFIG_SYS_I2C_SLAVE 0x7F
78 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3
79 #define CONFIG_SYS_I2C_SH_SPEED0 400000
80 #define CONFIG_SYS_I2C_SH_SPEED1 400000
81 #define CONFIG_SYS_I2C_SH_SPEED2 400000
82 #define CONFIG_SH_I2C_DATA_HIGH 4
83 #define CONFIG_SH_I2C_DATA_LOW 5
84 #define CONFIG_SH_I2C_CLOCK 10000000
86 #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
89 #define CONFIG_USB_STORAGE
90 #define CONFIG_USB_EHCI
91 #define CONFIG_USB_EHCI_RMOBILE
92 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
96 #define CONFIG_GENERIC_MMC
97 #define CONFIG_CMD_MMC
99 #define CONFIG_SH_MMCIF
100 #define CONFIG_SH_MMCIF_ADDR 0xee200000
101 #define CONFIG_SH_MMCIF_CLK 48000000
103 /* Module stop status bits */
105 #define CONFIG_SMSTP0_ENA 0x00400000
107 #define CONFIG_SMSTP2_ENA 0x00002000
109 #define CONFIG_SMSTP4_ENA 0x00000180
111 #define CONFIG_SMSTP7_ENA 0x00080000
114 #define CONFIG_SH_SDHI_FREQ 97500000