2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian.pop@leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
6 * Configuation settings for the AT91CAP9ADK board.
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 /* ARM asynchronous clock */
31 #define AT91_CPU_NAME "AT91CAP9"
32 #define AT91_MAIN_CLOCK 200000000 /* from 12 MHz crystal */
33 #define AT91_MASTER_CLOCK 100000000 /* peripheral = main / 2 */
34 #define CFG_HZ 1000000 /* 1us resolution */
36 #define AT91_SLOW_CLOCK 32768 /* slow clock */
38 #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
39 #define CONFIG_AT91CAP9 1 /* It's an Atmel AT91CAP9 SoC */
40 #define CONFIG_AT91CAP9ADK 1 /* on an AT91CAP9ADK Board */
41 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
43 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
44 #define CONFIG_SETUP_MEMORY_TAGS 1
45 #define CONFIG_INITRD_TAG 1
47 #define CONFIG_SKIP_LOWLEVEL_INIT
48 #define CONFIG_SKIP_RELOCATE_UBOOT
53 #define CONFIG_ATMEL_USART 1
57 #define CONFIG_USART3 1 /* USART 3 is DBGU */
61 #define LCD_BPP LCD_COLOR8
62 #define CONFIG_LCD_LOGO 1
63 #undef LCD_TEST_PATTERN
64 #define CONFIG_LCD_INFO 1
65 #define CONFIG_LCD_INFO_BELOW_LOGO 1
66 #define CFG_WHITE_ON_BLACK 1
67 #define CONFIG_ATMEL_LCD 1
68 #define CONFIG_ATMEL_LCD_BGR555 1
69 #define CFG_CONSOLE_IS_IN_ENV 1
71 #define CONFIG_BOOTDELAY 3
73 /* #define CONFIG_ENV_OVERWRITE 1 */
78 #define CONFIG_BOOTP_BOOTFILESIZE 1
79 #define CONFIG_BOOTP_BOOTPATH 1
80 #define CONFIG_BOOTP_GATEWAY 1
81 #define CONFIG_BOOTP_HOSTNAME 1
84 * Command line configuration.
86 #include <config_cmd_default.h>
89 #undef CONFIG_CMD_AUTOSCRIPT
90 #undef CONFIG_CMD_FPGA
91 #undef CONFIG_CMD_LOADS
93 #define CONFIG_CMD_PING 1
94 #define CONFIG_CMD_DHCP 1
95 #define CONFIG_CMD_NAND 1
96 #define CONFIG_CMD_USB 1
98 /* SDRAM: Careful: this supposes an AT91CAP-MEM33 expansion card */
99 #define CONFIG_NR_DRAM_BANKS 1
100 #define PHYS_SDRAM 0x70000000
101 #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
104 #define CONFIG_HAS_DATAFLASH 1
105 #define CFG_SPI_WRITE_TOUT (5*CFG_HZ)
106 #define CFG_MAX_DATAFLASH_BANKS 1
107 #define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
108 #define AT91_SPI_CLK 15000000
109 #define DATAFLASH_TCSS (0x1a << 16)
110 #define DATAFLASH_TCHS (0x1 << 24)
113 #define CFG_FLASH_CFI 1
114 #define CFG_FLASH_CFI_DRIVER 1
115 #define PHYS_FLASH_1 0x10000000
116 #define CFG_FLASH_BASE PHYS_FLASH_1
117 #define CFG_MAX_FLASH_SECT 256
118 #define CFG_MAX_FLASH_BANKS 1
121 #define NAND_MAX_CHIPS 1
122 #define CFG_MAX_NAND_DEVICE 1
123 #define CFG_NAND_BASE 0x40000000
124 #define CFG_NAND_DBW_8 1
127 #define CONFIG_MACB 1
128 #define CONFIG_RMII 1
129 #define CONFIG_NET_MULTI 1
130 #define CONFIG_NET_RETRY_COUNT 20
131 #define CONFIG_RESET_PHY_R 1
134 #define CONFIG_USB_OHCI_NEW 1
135 #define LITTLEENDIAN 1
136 #define CONFIG_DOS_PARTITION 1
137 #define CFG_USB_OHCI_CPU_INIT 1
138 #define CFG_USB_OHCI_REGS_BASE 0x00700000 /* AT91_BASE_UHP */
139 #define CFG_USB_OHCI_SLOT_NAME "at91cap9"
140 #define CFG_USB_OHCI_MAX_ROOT_PORTS 2
142 #define CFG_LOAD_ADDR 0x72000000 /* load address */
144 #define CFG_MEMTEST_START PHYS_SDRAM
145 #define CFG_MEMTEST_END 0x73e00000
147 #define CFG_USE_DATAFLASH 1
148 #undef CFG_USE_NORFLASH
150 #ifdef CFG_USE_DATAFLASH
152 /* bootstrap + u-boot + env + linux in dataflash */
153 #define CFG_ENV_IS_IN_DATAFLASH 1
154 #define CFG_MONITOR_BASE (CFG_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
155 #define CFG_ENV_OFFSET 0x4200
156 #define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET)
157 #define CFG_ENV_SIZE 0x4200
158 #define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x72000000 0x210000; bootm"
159 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
160 "root=/dev/mtdblock1 " \
161 "mtdparts=physmap-flash.0:-(nor);" \
162 "at91_nand:-(root) " \
163 "rw rootfstype=jffs2"
167 /* bootstrap + u-boot + env + linux in norflash */
168 #define CFG_ENV_IS_IN_FLASH 1
169 #define CFG_MONITOR_BASE (PHYS_FLASH_1 + 0x8000)
170 #define CFG_ENV_OFFSET 0x4000
171 #define CFG_ENV_ADDR (PHYS_FLASH_1 + CFG_ENV_OFFSET)
172 #define CFG_ENV_SIZE 0x4000
173 #define CONFIG_BOOTCOMMAND "cp.b 0x10040000 0x72000000 0x200000; bootm"
174 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
175 "root=/dev/mtdblock4 " \
176 "mtdparts=physmap-flash.0:16k(bootstrap)ro,"\
177 "16k(env),224k(uboot)ro,-(linux);" \
178 "at91_nand:-(root) " \
179 "rw rootfstype=jffs2"
183 #define CONFIG_BAUDRATE 115200
184 #define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
186 #define CFG_PROMPT "U-Boot> "
187 #define CFG_CBSIZE 256
188 #define CFG_MAXARGS 16
189 #define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
190 #define CFG_LONGHELP 1
191 #define CONFIG_CMDLINE_EDITING 1
193 #define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
195 * Size of malloc() pool
197 #define CFG_MALLOC_LEN ROUND(CFG_ENV_SIZE + 128*1024, 0x1000)
198 #define CFG_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
200 #define CONFIG_STACKSIZE (32*1024) /* regular stack */
202 #ifdef CONFIG_USE_IRQ
203 #error CONFIG_USE_IRQ not supported