3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * High Level Configuration Options
32 #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
33 #define CONFIG_MPC5200 1 /* More exactly a MPC5200 */
34 #define CONFIG_CANMB 1 /* ... on canmb board - we need this for FEC.C */
37 * allowed and functional CONFIG_SYS_TEXT_BASE values:
38 * 0xfe000000 low boot at 0x00000100 (default board setting)
39 * 0x00100000 RAM load and test
41 #define CONFIG_SYS_TEXT_BASE 0xFE000000
43 #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
45 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
46 #define BOOTFLAG_WARM 0x02 /* Software reboot */
48 #define CONFIG_BOARD_EARLY_INIT_R
50 #define CONFIG_HIGH_BATS 1 /* High BATs supported */
53 * Serial console configuration
55 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
56 #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
57 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
63 #define CONFIG_BOOTP_BOOTFILESIZE
64 #define CONFIG_BOOTP_BOOTPATH
65 #define CONFIG_BOOTP_GATEWAY
66 #define CONFIG_BOOTP_HOSTNAME
70 * Command line configuration.
72 #include <config_cmd_default.h>
74 #define CONFIG_CMD_ASKENV
75 #define CONFIG_CMD_DATE
76 #define CONFIG_CMD_DHCP
77 #define CONFIG_CMD_IMMAP
78 #define CONFIG_CMD_MII
79 #define CONFIG_CMD_NFS
80 #define CONFIG_CMD_REGINFO
81 #define CONFIG_CMD_SNTP
85 * MUST be low boot - HIGHBOOT is not supported anymore
87 #if (CONFIG_SYS_TEXT_BASE == 0xFE000000) /* Boot low with 32 MB Flash */
88 # define CONFIG_SYS_LOWBOOT 1
89 # define CONFIG_SYS_LOWBOOT16 1
91 # error "CONFIG_SYS_TEXT_BASE must be 0xFE000000"
97 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
99 #define CONFIG_PREBOOT "echo;" \
100 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
103 #undef CONFIG_BOOTARGS
105 #define CONFIG_EXTRA_ENV_SETTINGS \
107 "nfsargs=setenv bootargs root=/dev/nfs rw " \
108 "nfsroot=${serverip}:${rootpath}\0" \
109 "ramargs=setenv bootargs root=/dev/ram rw\0" \
110 "addip=setenv bootargs ${bootargs} " \
111 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
112 ":${hostname}:${netdev}:off panic=1\0" \
113 "flash_nfs=run nfsargs addip;" \
114 "bootm ${kernel_addr}\0" \
115 "flash_self=run ramargs addip;" \
116 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
117 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
118 "rootpath=/opt/eldk/ppc_6xx\0" \
119 "bootfile=/tftpboot/canmb/uImage\0" \
122 #define CONFIG_BOOTCOMMAND "run flash_self"
125 * IPB Bus clocking configuration.
127 #undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
130 * Flash configuration, expect one 16 Megabyte Bank at most
132 #define CONFIG_SYS_FLASH_BASE 0xFE000000
133 #define CONFIG_SYS_FLASH_SIZE 0x02000000
134 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
135 #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */
137 #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
138 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
140 #define CONFIG_FLASH_CFI_DRIVER
141 #define CONFIG_SYS_FLASH_CFI
142 #define CONFIG_SYS_FLASH_EMPTY_INFO
145 * Environment settings
147 #define CONFIG_ENV_IS_IN_FLASH 1
148 #define CONFIG_ENV_OFFSET (2*128*1024)
149 #define CONFIG_ENV_SIZE 0x2000
150 #define CONFIG_ENV_SECT_SIZE (128*1024)
155 * Warning!!! with the current BestComm Task, MBAR MUST BE set to 0xf0000000
157 #define CONFIG_SYS_MBAR 0xf0000000 /* DO NOT CHANGE this */
158 #define CONFIG_SYS_SDRAM_BASE 0x00000000
159 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
161 /* Use SRAM until RAM will be available */
162 #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
163 #define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE /* End of used area in DPRAM */
166 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
167 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
168 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
170 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
171 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
172 # define CONFIG_SYS_RAMBOOT 1
175 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
176 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
177 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
180 * Ethernet configuration
182 #define CONFIG_MPC5xxx_FEC 1
183 #define CONFIG_MPC5xxx_FEC_MII100
184 #define CONFIG_PHY_ADDR 0x0
186 * GPIO configuration:
187 * PSC1,2,3 predefined as UART
189 * Ethernet 100 with MD
191 #define CONFIG_SYS_GPS_PORT_CONFIG 0x00058444
194 * Miscellaneous configurable options
196 #define CONFIG_SYS_LONGHELP /* undef to save memory */
197 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
198 #if defined(CONFIG_CMD_KGDB)
199 # define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
201 # define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
203 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
204 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
205 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
207 #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
208 #define CONFIG_SYS_MEMTEST_END 0x01f00000 /* 1 ... 31 MB in DRAM */
210 #define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
212 #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
214 #define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
216 #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
217 #if defined(CONFIG_CMD_KGDB)
218 # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
222 * Various low-level settings
224 #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
225 #define CONFIG_SYS_HID0_FINAL HID0_ICE
227 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
228 #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
229 #define CONFIG_SYS_BOOTCS_CFG 0x00047D01
230 #define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
231 #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
233 #define CONFIG_SYS_CS_BURST 0x00000000
234 #define CONFIG_SYS_CS_DEADCYCLE 0x33333333
236 #define CONFIG_SYS_RESET_ADDRESS 0x7f000000
238 #endif /* __CONFIG_H */