2 * (C) Copyright 2013 CompuLab, Ltd.
3 * Author: Igor Grinberg <grinberg@compulab.co.il>
5 * Configuration settings for the CompuLab CM-T3517 board
7 * SPDX-License-Identifier: GPL-2.0+
14 * High Level Configuration Options
16 #define CONFIG_OMAP /* in a TI OMAP core */
17 #define CONFIG_CM_T3517 /* working with CM-T3517 */
18 #define CONFIG_OMAP_COMMON
19 /* Common ARM Erratas */
20 #define CONFIG_ARM_ERRATA_454179
21 #define CONFIG_ARM_ERRATA_430973
22 #define CONFIG_ARM_ERRATA_621766
24 #define CONFIG_SYS_TEXT_BASE 0x80008000
27 * This is needed for the DMA stuff.
28 * Although the default iss 64, we still define it
29 * to be on the safe side once the default is changed.
32 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */
34 #include <asm/arch/cpu.h> /* get chip and board defs */
35 #include <asm/arch/omap.h>
37 #define CONFIG_MACH_TYPE MACH_TYPE_CM_T3517
40 * Display CPU and Board information
42 #define CONFIG_DISPLAY_CPUINFO
43 #define CONFIG_DISPLAY_BOARDINFO
46 #define V_OSCK 26000000 /* Clock output from T2 */
47 #define V_SCLK (V_OSCK >> 1)
49 #define CONFIG_MISC_INIT_R
52 * The early kernel mapping on ARM currently only maps from the base of DRAM
53 * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000.
54 * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
55 * so that leaves DRAM base to DRAM base + 0x4000 available.
57 #define CONFIG_SYS_BOOTMAPSZ 0x4000
59 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
60 #define CONFIG_SETUP_MEMORY_TAGS
61 #define CONFIG_INITRD_TAG
62 #define CONFIG_REVISION_TAG
63 #define CONFIG_SERIAL_TAG
66 * Size of malloc() pool
68 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
69 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
76 * NS16550 Configuration
78 #define CONFIG_SYS_NS16550_SERIAL
79 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
80 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
83 * select serial console configuration
85 #define CONFIG_CONS_INDEX 3
86 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
87 #define CONFIG_SERIAL3 3 /* UART3 */
88 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
90 /* allow to overwrite serial and ethaddr */
91 #define CONFIG_ENV_OVERWRITE
92 #define CONFIG_BAUDRATE 115200
93 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
96 #define CONFIG_OMAP_GPIO
98 #define CONFIG_GENERIC_MMC
100 #define CONFIG_OMAP_HSMMC
101 #define CONFIG_DOS_PARTITION
104 #define CONFIG_USB_MUSB_AM35X
106 #ifndef CONFIG_USB_MUSB_AM35X
107 #define CONFIG_USB_OMAP3
108 #define CONFIG_USB_EHCI
109 #define CONFIG_USB_EHCI_OMAP
110 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146
111 #define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147
112 #else /* !CONFIG_USB_MUSB_AM35X */
113 #define CONFIG_USB_MUSB_PIO_ONLY
114 #endif /* CONFIG_USB_MUSB_AM35X */
116 /* commands to include */
117 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
118 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
119 #define CONFIG_MTD_PARTITIONS
120 #define MTDIDS_DEFAULT "nand0=nand"
121 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
122 "1920k(u-boot),256k(u-boot-env),"\
125 #define CONFIG_CMD_NAND /* NAND support */
127 #define CONFIG_SYS_NO_FLASH
128 #define CONFIG_SYS_I2C
129 #define CONFIG_SYS_OMAP24_I2C_SPEED 400000
130 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
131 #define CONFIG_SYS_I2C_OMAP34XX
132 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
133 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
134 #define CONFIG_SYS_I2C_EEPROM_BUS 0
135 #define CONFIG_I2C_MULTI_BUS
140 #define CONFIG_NAND_OMAP_GPMC
141 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
143 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
144 /* to access nand at */
146 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
149 /* Environment information */
150 #define CONFIG_EXTRA_ENV_SETTINGS \
151 "loadaddr=0x82000000\0" \
152 "baudrate=115200\0" \
153 "console=ttyO2,115200n8\0" \
157 "dvimode=1024x768MR-16@60\0" \
158 "defaultdisplay=dvi\0" \
160 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
161 "mmcrootfstype=ext4\0" \
162 "nandroot=/dev/mtdblock4 rw\0" \
163 "nandrootfstype=ubifs\0" \
164 "mmcargs=setenv bootargs console=${console} " \
165 "mpurate=${mpurate} " \
167 "omapfb.mode=dvi:${dvimode} " \
168 "omapdss.def_disp=${defaultdisplay} " \
170 "rootfstype=${mmcrootfstype}\0" \
171 "nandargs=setenv bootargs console=${console} " \
172 "mpurate=${mpurate} " \
174 "omapfb.mode=dvi:${dvimode} " \
175 "omapdss.def_disp=${defaultdisplay} " \
176 "root=${nandroot} " \
177 "rootfstype=${nandrootfstype}\0" \
178 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
179 "bootscript=echo Running bootscript from mmc ...; " \
180 "source ${loadaddr}\0" \
181 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
182 "mmcboot=echo Booting from mmc ...; " \
184 "bootm ${loadaddr}\0" \
185 "nandboot=echo Booting from nand ...; " \
187 "nand read ${loadaddr} 2a0000 400000; " \
188 "bootm ${loadaddr}\0" \
190 #define CONFIG_BOOTCOMMAND \
191 "mmc dev ${mmcdev}; if mmc rescan; then " \
192 "if run loadbootscript; then " \
195 "if run loaduimage; then " \
197 "else run nandboot; " \
200 "else run nandboot; fi"
203 * Miscellaneous configurable options
205 #define CONFIG_AUTO_COMPLETE
206 #define CONFIG_CMDLINE_EDITING
207 #define CONFIG_TIMESTAMP
208 #define CONFIG_SYS_AUTOLOAD "no"
209 #define CONFIG_SYS_LONGHELP /* undef to save memory */
210 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
211 /* Print Buffer Size */
212 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
213 sizeof(CONFIG_SYS_PROMPT) + 16)
214 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
215 /* Boot Argument Buffer Size */
216 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
218 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000)
221 * AM3517 has 12 GP timers, they can be driven by the system clock
222 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
223 * This rate is divided by a local divisor.
225 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
226 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
227 #define CONFIG_SYS_HZ 1000
229 /*-----------------------------------------------------------------------
230 * Physical Memory Map
232 #define CONFIG_NR_DRAM_BANKS 1 /* CM-T3517 DRAM is only on CS0 */
233 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
234 #define CONFIG_SYS_CS0_SIZE (256 << 20)
236 /*-----------------------------------------------------------------------
237 * FLASH and environment organization
240 /* **** PISMO SUPPORT *** */
241 /* Monitor at start of flash */
242 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
243 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
245 #define CONFIG_ENV_IS_IN_NAND
246 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
247 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
248 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
250 #if defined(CONFIG_CMD_NET)
251 #define CONFIG_DRIVER_TI_EMAC
252 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
254 #define CONFIG_SMC911X
255 #define CONFIG_SMC911X_32_BIT
256 #define CONFIG_SMC911X_BASE (0x2C000000 + (16 << 20))
257 #define CONFIG_ARP_TIMEOUT 200UL
258 #define CONFIG_NET_RETRY_COUNT 5
259 #endif /* CONFIG_CMD_NET */
261 /* additions for new relocation code, must be added to all boards */
262 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
263 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
264 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
265 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
266 CONFIG_SYS_INIT_RAM_SIZE - \
267 GENERATED_GBL_DATA_SIZE)
270 #define CONFIG_STATUS_LED /* Status LED enabled */
271 #define CONFIG_BOARD_SPECIFIC_LED
272 #define CONFIG_GPIO_LED
273 #define GREEN_LED_GPIO 186 /* CM-T3517 Green LED is GPIO186 */
274 #define GREEN_LED_DEV 0
275 #define STATUS_LED_BIT GREEN_LED_GPIO
276 #define STATUS_LED_STATE STATUS_LED_ON
277 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
278 #define STATUS_LED_BOOT GREEN_LED_DEV
281 #ifdef CONFIG_STATUS_LED
282 #define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */
285 /* Display Configuration */
286 #define CONFIG_OMAP3_GPIO_2
287 #define CONFIG_OMAP3_GPIO_5
288 #define CONFIG_VIDEO_OMAP3
289 #define LCD_BPP LCD_COLOR16
292 #define CONFIG_SPLASH_SCREEN
293 #define CONFIG_SPLASHIMAGE_GUARD
294 #define CONFIG_CMD_BMP
295 #define CONFIG_BMP_16BPP
296 #define CONFIG_SCF0403_LCD
298 #define CONFIG_OMAP3_SPI
301 #define CONFIG_CMD_EEPROM
302 #define CONFIG_ENV_EEPROM_IS_ON_I2C
303 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
304 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
305 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
306 #define CONFIG_SYS_EEPROM_SIZE 256
308 #define CONFIG_CMD_EEPROM_LAYOUT
309 #define CONFIG_EEPROM_LAYOUT_HELP_STRING "v1, v2, v3"
311 #endif /* __CONFIG_H */