2 * 2004-2005 Gary Jennejohn <garyj@denx.de>
4 * Configuration settings for the CMC PU2 board.
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 /* ARM asynchronous clock */
29 #define AT91C_MAIN_CLOCK 207360000 /* from 18.432 MHz crystal (18432000 / 4 * 45) */
30 #define AT91C_MASTER_CLOCK (AT91C_MAIN_CLOCK/3) /* peripheral clock */
32 #define AT91_SLOW_CLOCK 32768 /* slow clock */
34 #define CONFIG_ARM920T 1 /* This is an ARM920T Core */
35 #define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */
36 #define CONFIG_AT91RM9200DK 1 /* on an AT91RM9200DK Board */
37 #define CONFIG_CMC_PU2 1 /* on an CMC_PU2 Board */
38 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
39 #define USE_920T_MMU 1
41 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
42 #define CONFIG_SETUP_MEMORY_TAGS 1
43 #define CONFIG_INITRD_TAG 1
45 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
46 #define CFG_USE_MAIN_OSCILLATOR 1
48 #define MC_PUIA_VAL 0x00000000
49 #define MC_PUP_VAL 0x00000000
50 #define MC_PUER_VAL 0x00000000
51 #define MC_ASR_VAL 0x00000000
52 #define MC_AASR_VAL 0x00000000
53 #define EBI_CFGR_VAL 0x00000000
54 #define SMC2_CSR_VAL 0x100032ad /* 16bit, 2 TDF, 4 WS */
57 #define PLLAR_VAL 0x202CBE04 /* 207.360 MHz for PCK */
58 #define PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */
59 #define MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 69.120MHz from PLLA */
62 #define PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
63 #define PIOC_BSR_VAL 0x00000000
64 #define PIOC_PDR_VAL 0xFFFF0000
65 #define EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */
66 #define SDRC_CR_VAL 0x3399c1d4 /* set up the SDRAM */
67 #define SDRAM 0x20000000 /* address of the SDRAM */
68 #define SDRAM1 0x20000080 /* address of the SDRAM */
69 #define SDRAM_VAL 0x00000000 /* value written to SDRAM */
70 #define SDRC_MR_VAL 0x00000002 /* Precharge All */
71 #define SDRC_MR_VAL1 0x00000004 /* refresh */
72 #define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
73 #define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
74 #define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
75 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
78 * Size of malloc() pool
80 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
81 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
83 #define CONFIG_BAUDRATE 9600
85 #define CFG_AT91C_BRGR_DIVISOR 450 /* hardcode so no __divsi3 : AT91C_MASTER_CLOCK /(baudrate * 16) */
91 /* define one of these to choose the DBGU, USART0 or USART1 as console */
96 #undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */
98 #undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */
100 #define CONFIG_HARD_I2C
102 #ifdef CONFIG_HARD_I2C
103 #define CFG_I2C_SPEED 0 /* not used */
104 #define CFG_I2C_SLAVE 0 /* not used */
105 #define CONFIG_RTC_RS5C372A /* RICOH I2C RTC */
106 #define CFG_I2C_RTC_ADDR 0x32
107 #define CFG_I2C_EEPROM_ADDR 0x50
108 #define CFG_I2C_EEPROM_ADDR_LEN 1
109 #define CFG_I2C_EEPROM_ADDR_OVERFLOW
111 /* still about 20 kB free with this defined */
114 #define CONFIG_BOOTDELAY 3
116 #ifdef CONFIG_HARD_I2C
117 #define CONFIG_COMMANDS \
125 ~(CFG_CMD_FPGA | CFG_CMD_MISC) )
127 #define CONFIG_COMMANDS \
132 ~(CFG_CMD_FPGA | CFG_CMD_MISC) )
133 #define CONFIG_TIMESTAMP
137 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
138 #include <cmd_confdefs.h>
140 #define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
141 #define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
143 #define CONFIG_NR_DRAM_BANKS 1
144 #define PHYS_SDRAM 0x20000000
145 #define PHYS_SDRAM_SIZE 0x1000000 /* 16 megs */
147 #define CFG_MEMTEST_START PHYS_SDRAM
148 #define CFG_MEMTEST_END CFG_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
150 #define CONFIG_DRIVER_ETHER
151 #define CONFIG_NET_RETRY_COUNT 20
152 #define CONFIG_AT91C_USE_RMII
154 #define CFG_SPI_WRITE_TOUT (5*CFG_HZ)
155 #define CFG_MAX_DATAFLASH_BANKS 2
156 #define CFG_MAX_DATAFLASH_PAGES 16384
157 #define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* Logical adress for CS0 */
158 #define CFG_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* Logical adress for CS3 */
160 #define PHYS_FLASH_1 0x10000000
161 #define PHYS_FLASH_SIZE 0x800000 /* 8 megs main flash */
162 #define CFG_FLASH_BASE PHYS_FLASH_1
163 #define CFG_MONITOR_BASE CFG_FLASH_BASE
164 #define CFG_MAX_FLASH_BANKS 1
165 #define CFG_MAX_FLASH_SECT 256
166 #define CFG_FLASH_ERASE_TOUT (11 * CFG_HZ) /* Timeout for Flash Erase */
167 #define CFG_FLASH_WRITE_TOUT ( 2 * CFG_HZ) /* Timeout for Flash Write */
169 #define CFG_ENV_IS_IN_FLASH 1
170 #define CFG_ENV_OFFSET 0x20000 /* after u-boot.bin */
171 #define CFG_ENV_SECT_SIZE (64 << 10) /* sectors are 64 kB */
172 #define CFG_ENV_SIZE (16 << 10) /* Use only 16 kB */
174 #define CFG_LOAD_ADDR 0x21000000 /* default load address */
176 #define CFG_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 }
178 #define CFG_PROMPT "=> " /* Monitor Command Prompt */
179 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
180 #define CFG_MAXARGS 32 /* max number of command args */
181 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
184 /*-----------------------------------------------------------------------
185 * Board specific extension for bd_info
187 * This structure is embedded in the global bd_info (bd_t) structure
188 * and can be used by the board specific code (eg board/...)
192 /* helper variable for board environment handling
194 * env_crc_valid == 0 => uninitialised
195 * env_crc_valid > 0 => environment crc in flash is valid
196 * env_crc_valid < 0 => environment crc in flash is invalid
200 #endif /* __ASSEMBLY__ */
203 #define CFG_HZ_CLOCK (AT91C_MASTER_CLOCK/2) /* AT91C_TC0_CMR is implicitly set to */
204 /* AT91C_TC_TIMER_DIV1_CLOCK */
206 #define CONFIG_STACKSIZE (32*1024) /* regular stack */
208 #ifdef CONFIG_USE_IRQ
209 #error CONFIG_USE_IRQ not supported
212 #define CFG_DEVICE_NULLDEV 1 /* enble null device */
213 #define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
215 #define CONFIG_AUTOBOOT_KEYED
216 #define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n"
217 #define CONFIG_AUTOBOOT_STOP_STR "R" /* default password */
219 #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
221 #define CONFIG_EXTRA_ENV_SETTINGS \
222 "net_nfs=tftp $(loadaddr) $(bootfile);run nfsargs addip addcons " \
224 "nfsargs=setenv bootargs root=/dev/nfs rw " \
225 "nfsroot=$(serverip):$(rootpath)\0" \
226 "net_cramfs=tftp $(loadaddr) $(bootfile); run flashargs addip " \
227 "addcons addmtd; bootm\0" \
228 "flash_cramfs=run flashargs addip addcons addmtd; bootm 10030000\0" \
229 "flashargs=setenv bootargs root=/dev/mtdblock3 ro\0" \
230 "addip=setenv bootargs $(bootargs) ethaddr=$(ethaddr) " \
231 "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):" \
232 "$(hostname)::off\0" \
233 "addcons=setenv bootargs $(bootargs) console=ttyS0,$(baudrate)\0" \
234 "addmtd=setenv bootargs $(bootargs) mtdparts=cmc_pu2:128k(uboot)ro," \
235 "64k(environment),768k(linux),4096k(root),-\0" \
236 "load=tftp $(loadaddr) $(loadfile)\0" \
237 "update=protect off 10000000 1001ffff;erase 10000000 1001ffff; " \
238 "cp.b $(loadaddr) 10000000 $(filesize);" \
239 "protect on 10000000 1001ffff\0" \
240 "updatel=era 10030000 100effff;tftp $(loadaddr) $(bootfile); " \
241 "cp.b $(loadaddr) 10030000 $(filesize)\0" \
242 "updatec=era 100f0000 104effff;tftp $(loadaddr) $(cramfsimage); " \
243 "cp.b $(loadaddr) 100f0000 $(filesize)\0" \
244 "updatej=era 104f0000 107fffff;tftp $(loadaddr) $(jffsimage); " \
245 "cp.b $(loadaddr) 104f0000 $(filesize)\0" \
246 "cramfsimage=cramfs_cmc-pu2.img\0" \
247 "jffsimage=jffs2_cmc-pu2.img\0" \
248 "loadfile=u-boot_cmc-pu2.bin\0" \
249 "bootfile=uImage_cmc-pu2\0" \
250 "loadaddr=0x20800000\0" \
251 "hostname=CMC-TC-PU2\0" \
252 "bootcmd=run dhcp_start;run flash_cramfs\0" \
254 "dhcp_start=echo no DHCP\0" \
255 "ipaddr=192.168.0.190\0"
256 #endif /* __CONFIG_H */