2 * Copyright (c) 2011 The Chromium OS Authors.
4 * Graeme Russ, graeme.russ@gmail.com.
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <asm/ibmpc.h>
27 * board/config.h - configuration options, board specific
34 * High Level Configuration Options
37 #define CONFIG_SYS_COREBOOT
38 #undef CONFIG_SHOW_BOOT_PROGRESS
39 #define CONFIG_LAST_STAGE_INIT
40 #define CONFIG_X86_NO_RESET_VECTOR
41 #define CONFIG_SYS_VSNPRINTF
43 /*-----------------------------------------------------------------------
44 * Watchdog Configuration
46 #undef CONFIG_WATCHDOG
47 #undef CONFIG_HW_WATCHDOG
49 /* SATA AHCI storage */
51 #define CONFIG_SCSI_AHCI
53 #ifdef CONFIG_SCSI_AHCI
54 #define CONFIG_SYS_64BIT_LBA
55 #define CONFIG_SATA_INTEL 1
56 #define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_INTEL, \
57 PCI_DEVICE_ID_INTEL_NM10_AHCI}, \
58 {PCI_VENDOR_ID_INTEL, \
59 PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
60 {PCI_VENDOR_ID_INTEL, \
61 PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \
62 {PCI_VENDOR_ID_INTEL, \
63 PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}
65 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
66 #define CONFIG_SYS_SCSI_MAX_LUN 1
67 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
68 CONFIG_SYS_SCSI_MAX_LUN)
71 /* Generic TPM interfaced through LPC bus */
72 #define CONFIG_GENERIC_LPC_TPM
73 #define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000
75 /*-----------------------------------------------------------------------
76 * Real Time Clock Configuration
78 #define CONFIG_RTC_MC146818
79 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
81 /*-----------------------------------------------------------------------
82 * Serial Configuration
84 #define CONFIG_CONS_INDEX 1
85 #define CONFIG_SYS_NS16550
86 #define CONFIG_SYS_NS16550_SERIAL
87 #define CONFIG_SYS_NS16550_REG_SIZE 1
88 #define CONFIG_SYS_NS16550_CLK 1843200
89 #define CONFIG_BAUDRATE 9600
90 #define CONFIG_SYS_BAUDRATE_TABLE {300, 600, 1200, 2400, 4800, \
91 9600, 19200, 38400, 115200}
92 #define CONFIG_SYS_NS16550_COM1 UART0_BASE
93 #define CONFIG_SYS_NS16550_COM2 UART1_BASE
94 #define CONFIG_SYS_NS16550_PORT_MAPPED
96 #define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,eserial0\0" \
97 "stdout=vga,eserial0,cbmem\0" \
98 "stderr=vga,eserial0,cbmem\0"
100 #define CONFIG_CONSOLE_MUX
101 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
102 #define CONFIG_SYS_STDIO_DEREGISTER
103 #define CONFIG_CBMEM_CONSOLE
106 #define CONFIG_SYS_IDE_MAXBUS 1
107 /* max. 1 drive per IDE bus */
108 #define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS * 1)
110 #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS
111 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0
112 #define CONFIG_SYS_ATA_IDE1_OFFSET 0x0170
113 #define CONFIG_SYS_ATA_DATA_OFFSET 0
114 #define CONFIG_SYS_ATA_REG_OFFSET 0
115 #define CONFIG_SYS_ATA_ALT_OFFSET 0x200
118 #define CONFIG_SUPPORT_VFAT
119 /************************************************************
120 * ATAPI support (experimental)
121 ************************************************************/
124 /************************************************************
125 * DISK Partition support
126 ************************************************************/
127 #define CONFIG_DOS_PARTITION
128 #define CONFIG_MAC_PARTITION
129 #define CONFIG_ISO_PARTITION /* Experimental */
131 #define CONFIG_CMD_CBFS
132 #define CONFIG_CMD_EXT4
133 #define CONFIG_CMD_EXT4_WRITE
135 /*-----------------------------------------------------------------------
136 * Video Configuration
139 #undef CONFIG_CFB_CONSOLE
141 /* x86 GPIOs are accessed through a PCI device */
142 #define CONFIG_INTEL_ICH6_GPIO
144 /*-----------------------------------------------------------------------
145 * Command line configuration.
147 #include <config_cmd_default.h>
149 #define CONFIG_CMD_BDI
150 #define CONFIG_CMD_BOOTD
151 #define CONFIG_CMD_CONSOLE
152 #define CONFIG_CMD_DATE
153 #define CONFIG_CMD_ECHO
154 #undef CONFIG_CMD_FLASH
155 #define CONFIG_CMD_FPGA
156 #define CONFIG_CMD_GPIO
157 #define CONFIG_CMD_IMI
158 #undef CONFIG_CMD_IMLS
159 #define CONFIG_CMD_IRQ
160 #define CONFIG_CMD_ITEST
161 #define CONFIG_CMD_LOADB
162 #define CONFIG_CMD_LOADS
163 #define CONFIG_CMD_MEMORY
164 #define CONFIG_CMD_MISC
165 #define CONFIG_CMD_NET
166 #undef CONFIG_CMD_NFS
167 #define CONFIG_CMD_PCI
168 #define CONFIG_CMD_PING
169 #define CONFIG_CMD_RUN
170 #define CONFIG_CMD_SAVEENV
171 #define CONFIG_CMD_SETGETDCR
172 #define CONFIG_CMD_SOURCE
173 #define CONFIG_CMD_XIMG
174 #define CONFIG_CMD_IDE
175 #define CONFIG_CMD_FAT
176 #define CONFIG_CMD_EXT2
178 #define CONFIG_BOOTDELAY 2
179 #define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyS0,9600"
181 #if defined(CONFIG_CMD_KGDB)
182 #define CONFIG_KGDB_BAUDRATE 115200
183 #define CONFIG_KGDB_SER_INDEX 2
187 * Miscellaneous configurable options
189 #define CONFIG_SYS_LONGHELP
190 #define CONFIG_SYS_PROMPT "boot > "
191 #define CONFIG_SYS_CBSIZE 256
192 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
193 sizeof(CONFIG_SYS_PROMPT) + \
195 #define CONFIG_SYS_MAXARGS 16
196 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
198 #define CONFIG_SYS_MEMTEST_START 0x00100000
199 #define CONFIG_SYS_MEMTEST_END 0x01000000
200 #define CONFIG_SYS_LOAD_ADDR 0x100000
201 #define CONFIG_SYS_HZ 1000
202 #define CONFIG_SYS_X86_ISR_TIMER
204 /*-----------------------------------------------------------------------
205 * SDRAM Configuration
207 #define CONFIG_NR_DRAM_BANKS 4
209 /* CONFIG_SYS_SDRAM_DRCTMCTL Overrides the following*/
210 #undef CONFIG_SYS_SDRAM_PRECHARGE_DELAY
211 #undef CONFIG_SYS_SDRAM_RAS_CAS_DELAY
212 #undef CONFIG_SYS_SDRAM_CAS_LATENCY_2T
213 #undef CONFIG_SYS_SDRAM_CAS_LATENCY_3T
215 /*-----------------------------------------------------------------------
219 #define CONFIG_SYS_GENERIC_TIMER
220 #define CONFIG_SYS_PCAT_INTERRUPTS
221 #define CONFIG_SYS_NUM_IRQS 16
223 /*-----------------------------------------------------------------------
224 * Memory organization:
226 * 16kB Cache-As-RAM @ 0x19200000
228 * (128kB + Environment Sector Size) malloc pool
230 #define CONFIG_SYS_STACK_SIZE (32 * 1024)
231 #define CONFIG_SYS_CAR_ADDR 0x19200000
232 #define CONFIG_SYS_CAR_SIZE (16 * 1024)
233 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
234 #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
235 #define CONFIG_SYS_MALLOC_LEN (0x20000 + 128 * 1024)
238 /* allow to overwrite serial and ethaddr */
239 #define CONFIG_ENV_OVERWRITE
241 /*-----------------------------------------------------------------------
242 * FLASH configuration
244 #define CONFIG_SYS_NO_FLASH
245 #undef CONFIG_FLASH_CFI_DRIVER
246 #define CONFIG_SYS_MAX_FLASH_SECT 1
247 #define CONFIG_SYS_MAX_FLASH_BANKS 1
249 /*-----------------------------------------------------------------------
250 * Environment configuration
252 #define CONFIG_ENV_IS_NOWHERE
253 #define CONFIG_ENV_SIZE 0x01000
255 /*-----------------------------------------------------------------------
260 #define CONFIG_EXTRA_ENV_SETTINGS \
261 CONFIG_STD_DEVICES_SETTINGS
263 #endif /* __CONFIG_H */