3 * This program is free software; you can redistribute it and/or
4 * modify it under the terms of the GNU General Public License as
5 * published by the Free Software Foundation; either version 2 of
6 * the License, or (at your option) any later version.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 /* Spectrum Digital TMS320DM365 EVM board */
23 #define DAVINCI_DM365EVM
25 #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */
26 #define CONFIG_SKIP_RELOCATE_UBOOT
27 #define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */
28 #define CONFIG_SYS_CONSOLE_INFO_QUIET
30 /* SoC Configuration */
31 #define CONFIG_ARM926EJS /* arm926ejs CPU */
32 #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
33 #define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */
34 #define CONFIG_SYS_HZ 1000
35 #define CONFIG_SOC_DM365
38 #define CONFIG_NR_DRAM_BANKS 1
39 #define PHYS_SDRAM_1 0x80000000
40 #define PHYS_SDRAM_1_SIZE (128 << 20) /* 128 MiB */
42 /* Serial Driver info: UART0 for console */
43 #define CONFIG_SYS_NS16550
44 #define CONFIG_SYS_NS16550_SERIAL
45 #define CONFIG_SYS_NS16550_REG_SIZE -4
46 #define CONFIG_SYS_NS16550_COM1 0x01c20000
47 #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK
48 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
49 #define CONFIG_CONS_INDEX 1
50 #define CONFIG_BAUDRATE 115200
52 /* EEPROM definitions for EEPROM on DM365 EVM */
53 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
54 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
55 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
56 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
58 /* Network Configuration */
59 #define CONFIG_DRIVER_TI_EMAC
61 #define CONFIG_BOOTP_DEFAULT
62 #define CONFIG_BOOTP_DNS
63 #define CONFIG_BOOTP_DNS2
64 #define CONFIG_BOOTP_SEND_HOSTNAME
65 #define CONFIG_NET_RETRY_COUNT 10
66 #define CONFIG_NET_MULTI
69 #define CONFIG_HARD_I2C
70 #define CONFIG_DRIVER_DAVINCI_I2C
71 #define CONFIG_SYS_I2C_SPEED 400000
72 #define CONFIG_SYS_I2C_SLAVE 0x10 /* SMBus host address */
74 /* NAND: socketed, two chipselects, normally 2 GBytes */
75 #define CONFIG_NAND_DAVINCI
76 #define CONFIG_SYS_NAND_USE_FLASH_BBT
77 #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
78 #define CONFIG_SYS_NAND_PAGE_2K
80 #define CONFIG_SYS_NAND_LARGEPAGE
81 #define CONFIG_SYS_NAND_BASE_LIST { 0x02000000, }
82 /* socket has two chipselects, nCE0 gated by address BIT(14) */
83 #define CONFIG_SYS_MAX_NAND_DEVICE 1
84 #define CONFIG_SYS_NAND_MAX_CHIPS 2
86 /* U-Boot command configuration */
87 #include <config_cmd_default.h>
90 #undef CONFIG_CMD_FLASH
91 #undef CONFIG_CMD_FPGA
92 #undef CONFIG_CMD_SETGETDCR
94 #define CONFIG_CMD_ASKENV
95 #define CONFIG_CMD_DHCP
96 #define CONFIG_CMD_I2C
97 #define CONFIG_CMD_PING
98 #define CONFIG_CMD_SAVES
100 #ifdef CONFIG_NAND_DAVINCI
101 #define CONFIG_CMD_MTDPARTS
102 #define CONFIG_MTD_PARTITIONS
103 #define CONFIG_MTD_DEVICE
104 #define CONFIG_CMD_NAND
105 #define CONFIG_CMD_UBI
106 #define CONFIG_RBTREE
109 #define CONFIG_CRC32_VERIFY
110 #define CONFIG_MX_CYCLIC
112 /* U-Boot general configuration */
113 #undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */
114 #define CONFIG_BOOTFILE "uImage" /* Boot file name */
115 #define CONFIG_SYS_PROMPT "DM365 EVM # " /* Monitor Command Prompt */
116 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
117 #define CONFIG_SYS_PBSIZE /* Print buffer size */ \
118 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
119 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
120 #define CONFIG_SYS_HUSH_PARSER
121 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
122 #define CONFIG_SYS_LONGHELP
124 #ifdef CONFIG_NAND_DAVINCI
125 #define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */
126 #define CONFIG_ENV_IS_IN_NAND
127 #define CONFIG_ENV_OFFSET 0x3C0000
128 #undef CONFIG_ENV_IS_IN_FLASH
131 #define CONFIG_BOOTDELAY 3
132 #define CONFIG_BOOTCOMMAND \
134 #define CONFIG_BOOTARGS \
135 "console=ttyS0,115200n8 " \
136 "root=/dev/mmcblk0p1 rootwait rootfstype=ext3 ro"
138 #define CONFIG_CMDLINE_EDITING
139 #define CONFIG_VERSION_VARIABLE
140 #define CONFIG_TIMESTAMP
142 /* U-Boot memory configuration */
143 #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
144 #define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */
145 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* for initial data */
146 #define CONFIG_SYS_MEMTEST_START 0x87000000 /* physical address */
147 #define CONFIG_SYS_MEMTEST_END 0x88000000 /* test 16MB RAM */
149 /* Linux interfacing */
150 #define CONFIG_CMDLINE_TAG
151 #define CONFIG_SETUP_MEMORY_TAGS
152 #define CONFIG_SYS_BARGSIZE 1024 /* bootarg Size */
153 #define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */
156 /* NAND configuration issocketed with two chipselects just like the DM355 EVM.
157 * It normally comes with a 2GByte SLC part with 2KB pages
158 * (and 128KB erase blocks); other
159 * 2GByte parts may have 4KB pages, 256KB erase blocks, and use MLC. (MLC
160 * pretty much demands the 4-bit ECC support.) You can of course swap in
161 * other parts, including small page ones.
163 #define MTDIDS_DEFAULT "nand0=davinci_nand.0"
165 #ifdef CONFIG_SYS_NAND_LARGEPAGE
166 /* Use same layout for 128K/256K blocks; allow some bad blocks */
167 #define PART_BOOT "2m(bootloader)ro,"
169 /* Assume 16K erase blocks; allow a few bad ones. */
170 #define PART_BOOT "512k(bootloader)ro,"
173 #define PART_KERNEL "4m(kernel)," /* kernel + initramfs */
174 #define PART_REST "-(filesystem)"
176 #define MTDPARTS_DEFAULT \
177 "mtdparts=davinci_nand.0:" PART_BOOT PART_KERNEL PART_REST
179 #endif /* __CONFIG_H */