2 * Copyright (C) 2014 Eukréa Electromatique
3 * Author: Eric Bénard <eric@eukrea.com>
5 * Configuration settings for the Embest RIoTboard
7 * based on mx6*sabre*.h which are :
8 * Copyright (C) 2012 Freescale Semiconductor, Inc.
10 * SPDX-License-Identifier: GPL-2.0+
13 #ifndef __RIOTBOARD_CONFIG_H
14 #define __RIOTBOARD_CONFIG_H
16 #include "mx6_common.h"
18 #define CONFIG_MXC_UART_BASE UART2_BASE
19 #define CONFIG_CONSOLE_DEV "ttymxc1"
20 #define CONFIG_MMCROOT "/dev/mmcblk1p2"
22 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
24 #define CONFIG_IMX6_THERMAL
26 /* Size of malloc() pool */
27 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
29 #define CONFIG_BOARD_EARLY_INIT_F
30 #define CONFIG_BOARD_LATE_INIT
31 #define CONFIG_MXC_GPIO
33 #define CONFIG_MXC_UART
35 #define CONFIG_CMD_FUSE
36 #ifdef CONFIG_CMD_FUSE
37 #define CONFIG_MXC_OCOTP
41 #define CONFIG_CMD_I2C
42 #define CONFIG_SYS_I2C
43 #define CONFIG_SYS_I2C_MXC
44 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
45 #define CONFIG_SYS_I2C_SPEED 100000
48 #define CONFIG_CMD_USB
49 #define CONFIG_USB_EHCI
50 #define CONFIG_USB_EHCI_MX6
51 #define CONFIG_USB_STORAGE
52 #define CONFIG_USB_HOST_ETHER
53 #define CONFIG_USB_ETHER_ASIX
54 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
55 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
56 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
57 #define CONFIG_MXC_USB_FLAGS 0
60 #define CONFIG_FSL_ESDHC
61 #define CONFIG_FSL_USDHC
62 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
65 #define CONFIG_CMD_MMC
66 #define CONFIG_GENERIC_MMC
67 #define CONFIG_BOUNCE_BUFFER
69 #define CONFIG_FEC_MXC
71 #define IMX_FEC_BASE ENET_BASE_ADDR
72 #define CONFIG_FEC_XCV_TYPE RGMII
73 #define CONFIG_ETHPRIME "FEC"
74 #define CONFIG_FEC_MXC_PHYADDR 4
77 #define CONFIG_PHY_ATHEROS
81 #define CONFIG_SPI_FLASH
82 #define CONFIG_SPI_FLASH_SST
83 #define CONFIG_MXC_SPI
84 #define CONFIG_SF_DEFAULT_BUS 0
85 #define CONFIG_SF_DEFAULT_CS 0
86 #define CONFIG_SF_DEFAULT_SPEED 20000000
87 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
90 /* allow to overwrite serial and ethaddr */
91 #define CONFIG_ENV_OVERWRITE
92 #define CONFIG_CONS_INDEX 1
93 #define CONFIG_BAUDRATE 115200
95 /* Command definition */
96 #undef CONFIG_CMD_FPGA
98 #define CONFIG_CMD_BMODE
99 #define CONFIG_CMD_SETEXPR
101 #define CONFIG_LOADADDR 0x12000000
102 #define CONFIG_SYS_TEXT_BASE 0x17800000
104 #define CONFIG_ARP_TIMEOUT 200UL
106 /* Miscellaneous configurable options */
107 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
108 #define CONFIG_SYS_CBSIZE 256
110 /* Print Buffer Size */
111 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
112 #define CONFIG_SYS_MAXARGS 16
113 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
115 #define CONFIG_SYS_MEMTEST_START 0x10000000
116 #define CONFIG_SYS_MEMTEST_END 0x10010000
117 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
119 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
121 #define CONFIG_STACKSIZE (128 * 1024)
123 /* Physical Memory Map */
124 #define CONFIG_NR_DRAM_BANKS 1
125 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
127 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
128 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
129 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
131 #define CONFIG_SYS_INIT_SP_OFFSET \
132 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
133 #define CONFIG_SYS_INIT_SP_ADDR \
134 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
136 /* Environment organization */
137 #define CONFIG_ENV_SIZE (8 * 1024)
139 #if defined(CONFIG_ENV_IS_IN_MMC)
141 #define CONFIG_FDTFILE "imx6dl-riotboard.dtb"
142 #define CONFIG_SYS_FSL_USDHC_NUM 3
143 #define CONFIG_SYS_MMC_ENV_DEV 2 /* SDHC4 */
144 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
145 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
146 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
148 #define CONFIG_FDTFILE "imx6q-marsboard.dtb"
149 #define CONFIG_SYS_FSL_USDHC_NUM 2
150 #define CONFIG_ENV_OFFSET (768 * 1024)
151 #define CONFIG_ENV_SECT_SIZE (8 * 1024)
152 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
153 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
154 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
155 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
158 #ifndef CONFIG_SYS_DCACHE_OFF
159 #define CONFIG_CMD_CACHE
164 #define CONFIG_VIDEO_IPUV3
165 #define CONFIG_CFB_CONSOLE
166 #define CONFIG_VGA_AS_SINGLE_DEVICE
167 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
168 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
169 #define CONFIG_VIDEO_BMP_RLE8
170 #define CONFIG_SPLASH_SCREEN
171 #define CONFIG_SPLASH_SCREEN_ALIGN
172 #define CONFIG_BMP_16BPP
173 #define CONFIG_VIDEO_LOGO
174 #define CONFIG_VIDEO_BMP_LOGO
175 #define CONFIG_IPUV3_CLK 260000000
176 #define CONFIG_IMX_HDMI
177 #define CONFIG_IMX_VIDEO_SKIP
179 #include <config_distro_defaults.h>
181 /* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
182 * 1M script, 1M pxe and the ramdisk at the end */
183 #define MEM_LAYOUT_ENV_SETTINGS \
184 "bootm_size=0x10000000\0" \
185 "kernel_addr_r=0x12000000\0" \
186 "fdt_addr_r=0x13000000\0" \
187 "scriptaddr=0x13100000\0" \
188 "pxefile_addr_r=0x13200000\0" \
189 "ramdisk_addr_r=0x13300000\0"
191 #define BOOT_TARGET_DEVICES(func) \
199 #include <config_distro_bootcmd.h>
201 #define CONSOLE_STDIN_SETTINGS \
204 #define CONSOLE_STDOUT_SETTINGS \
208 #define CONSOLE_ENV_SETTINGS \
209 CONSOLE_STDIN_SETTINGS \
210 CONSOLE_STDOUT_SETTINGS
212 #define CONFIG_EXTRA_ENV_SETTINGS \
213 CONSOLE_ENV_SETTINGS \
214 MEM_LAYOUT_ENV_SETTINGS \
215 "fdtfile=" CONFIG_FDTFILE "\0" \
218 #endif /* __RIOTBOARD_CONFIG_H */