2 * Copyright (C) 2013 Samsung Electronics
4 * Configuration settings for the SAMSUNG EXYNOS5420 SoC
6 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef __CONFIG_EXYNOS5420_H
10 #define __CONFIG_EXYNOS5420_H
12 #define CONFIG_EXYNOS5420
14 #include <configs/exynos5-common.h>
16 #define MACH_TYPE_SMDK5420 8002
17 #define CONFIG_MACH_TYPE MACH_TYPE_SMDK5420
19 #define CONFIG_VAR_SIZE_SPL
21 #define CONFIG_SYS_SDRAM_BASE 0x20000000
22 #define CONFIG_SYS_TEXT_BASE 0x23E00000
23 #ifdef CONFIG_VAR_SIZE_SPL
24 #define CONFIG_SPL_TEXT_BASE 0x02024410
26 #define CONFIG_SPL_TEXT_BASE 0x02024400
28 #define CONFIG_IRAM_TOP 0x02074000
30 #define CONFIG_SPL_MAX_FOOTPRINT (30 * 1024)
32 #define CONFIG_DEVICE_TREE_LIST "exynos5420-peach-pit exynos5420-smdk5420"
34 #define CONFIG_MAX_I2C_NUM 11
36 #define CONFIG_BOARD_REV_GPIO_COUNT 2
38 #define CONFIG_BOOTCOMMAND "mmc read 20007000 451 2000; bootm 20007000"
41 * Put the initial stack pointer 1KB below this to allow room for the
42 * SPL marker. This value is arbitrary, but gd_t is placed starting here.
44 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800)
46 /* DRAM Memory Banks */
47 #define CONFIG_NR_DRAM_BANKS 7
48 #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
50 #endif /* __CONFIG_EXYNOS5420_H */