2 * Copyright (C) 2013 Gateworks Corporation
4 * SPDX-License-Identifier: GPL-2.0+
11 #define CONFIG_SPL_BOARD_INIT
12 #define CONFIG_SPL_NAND_SUPPORT
13 #define CONFIG_SPL_MMC_SUPPORT
14 #define CONFIG_SPL_POWER_SUPPORT
15 /* Location in NAND to read U-Boot from */
16 #define CONFIG_SYS_NAND_U_BOOT_OFFS (14 * SZ_1M)
19 #define CONFIG_CMD_SPL
20 #define CONFIG_SPL_OS_BOOT
21 #define CONFIG_SPL_ENV_SUPPORT
22 #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
23 #define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K)
25 /* Falcon Mode - NAND support: args@17MB kernel@18MB */
26 #define CONFIG_CMD_SPL_NAND_OFS (17 * SZ_1M)
27 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS (18 * SZ_1M)
29 /* Falcon Mode - MMC support: args@1MB kernel@2MB */
30 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */
31 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512)
32 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */
34 #include "imx6_spl.h" /* common IMX6 SPL configuration */
35 #include "mx6_common.h"
37 #define CONFIG_DISPLAY_CPUINFO /* display cpu info */
38 #define CONFIG_DISPLAY_BOARDINFO_LATE /* display board info (after reloc) */
40 #define CONFIG_MACH_TYPE 4520 /* Gateworks Ventana Platform */
43 #define CONFIG_CMDLINE_TAG
44 #define CONFIG_SETUP_MEMORY_TAGS
45 #define CONFIG_INITRD_TAG
46 #define CONFIG_SERIAL_TAG
47 #define CONFIG_REVISION_TAG
49 #define CONFIG_SYS_GENERIC_BOARD
51 /* Size of malloc() pool */
52 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
55 #define CONFIG_BOARD_EARLY_INIT_F
56 #define CONFIG_MISC_INIT_R
59 #ifndef CONFIG_SPL_BUILD
61 #define CONFIG_DM_GPIO
62 #define CONFIG_DM_SERIAL
63 #define CONFIG_DM_THERMAL
68 #define CONFIG_MXC_GPIO
69 #define CONFIG_CMD_GPIO
72 #define CONFIG_IMX6_THERMAL
75 #define CONFIG_MXC_UART
76 #define CONFIG_MXC_UART_BASE UART2_BASE
78 #ifdef CONFIG_SPI_FLASH
83 #define CONFIG_MXC_SPI
84 #define CONFIG_SPI_FLASH_MTD
85 #define CONFIG_SPI_FLASH_BAR
86 #define CONFIG_SPI_FLASH_WINBOND
87 #define CONFIG_SF_DEFAULT_BUS 0
88 #define CONFIG_SF_DEFAULT_CS 0
89 /* GPIO 3-19 (21248) */
90 #define CONFIG_SF_DEFAULT_SPEED 30000000
91 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
95 /* Enable NAND support */
96 #define CONFIG_CMD_TIME
97 #define CONFIG_CMD_NAND
98 #define CONFIG_CMD_NAND_TRIMFFS
99 #ifdef CONFIG_CMD_NAND
100 #define CONFIG_NAND_MXS
101 #define CONFIG_SYS_MAX_NAND_DEVICE 1
102 #define CONFIG_SYS_NAND_BASE 0x40000000
103 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
104 #define CONFIG_SYS_NAND_ONFI_DETECTION
106 /* DMA stuff, needed for GPMI/MXS NAND support */
107 #define CONFIG_APBH_DMA
108 #define CONFIG_APBH_DMA_BURST
109 #define CONFIG_APBH_DMA_BURST8
112 #endif /* CONFIG_SPI_FLASH */
114 /* Flattened Image Tree Suport */
116 #define CONFIG_FIT_VERBOSE
119 #define CONFIG_CMD_I2C
120 #define CONFIG_SYS_I2C
121 #define CONFIG_SYS_I2C_MXC
122 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
123 #define CONFIG_SYS_I2C_SPEED 100000
124 #define CONFIG_I2C_GSC 0
125 #define CONFIG_I2C_PMIC 1
126 #define CONFIG_I2C_EDID
129 #define CONFIG_FSL_ESDHC
130 #define CONFIG_FSL_USDHC
131 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
132 #define CONFIG_SYS_FSL_USDHC_NUM 1
134 #define CONFIG_CMD_MMC
135 #define CONFIG_GENERIC_MMC
136 #define CONFIG_BOUNCE_BUFFER
138 /* Filesystem support */
139 #define CONFIG_CMD_EXT2
140 #define CONFIG_CMD_EXT4
141 #define CONFIG_CMD_EXT4_WRITE
142 #define CONFIG_CMD_FAT
143 #define CONFIG_CMD_UBIFS
144 #define CONFIG_DOS_PARTITION
149 #define CONFIG_CMD_SATA
150 #ifdef CONFIG_CMD_SATA
151 #define CONFIG_DWC_AHSATA
152 #define CONFIG_SYS_SATA_MAX_DEVICE 1
153 #define CONFIG_DWC_AHSATA_PORT_ID 0
154 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
156 #define CONFIG_LIBATA
162 #define CONFIG_CMD_PCI
163 #ifdef CONFIG_CMD_PCI
165 #define CONFIG_PCI_PNP
166 #define CONFIG_PCI_SCAN_SHOW
167 #define CONFIG_PCI_FIXUP_DEV
168 #define CONFIG_PCIE_IMX
175 #define CONFIG_POWER_I2C
176 #define CONFIG_POWER_PFUZE100
177 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
178 #define CONFIG_POWER_LTC3676
179 #define CONFIG_POWER_LTC3676_I2C_ADDR 0x3c
181 /* Various command support */
182 #define CONFIG_CMD_PING
183 #define CONFIG_CMD_DHCP
184 #define CONFIG_CMD_MII
185 #define CONFIG_CMD_NET
186 #define CONFIG_CMD_BMODE /* set eFUSE shadow for a boot dev and reset */
187 #define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */
188 #define CONFIG_CMD_SETEXPR
189 #define CONFIG_CMD_BOOTZ
190 #define CONFIG_CMD_GSC
191 #define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */
192 #define CONFIG_CMD_UBI
193 #define CONFIG_RBTREE
195 #define CONFIG_CMD_FUSE /* eFUSE read/write support */
196 #ifdef CONFIG_CMD_FUSE
197 #define CONFIG_MXC_OCOTP
201 /* Ethernet support */
202 #define CONFIG_FEC_MXC
205 #define IMX_FEC_BASE ENET_BASE_ADDR
206 #define CONFIG_FEC_XCV_TYPE RGMII
207 #define CONFIG_FEC_MXC_PHYADDR 0
208 #define CONFIG_PHYLIB
209 #define CONFIG_ARP_TIMEOUT 200UL
212 #define CONFIG_CMD_USB
213 #define CONFIG_USB_EHCI
214 #define CONFIG_USB_EHCI_MX6
215 #define CONFIG_USB_STORAGE
216 #define CONFIG_USB_HOST_ETHER
217 #define CONFIG_USB_ETHER_ASIX
218 #define CONFIG_USB_ETHER_SMSC95XX
219 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
220 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
221 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
222 #define CONFIG_MXC_USB_FLAGS 0
223 #define CONFIG_USB_KEYBOARD
224 #define CONFIG_CI_UDC
225 #define CONFIG_USBD_HS
226 #define CONFIG_USB_GADGET_DUALSPEED
227 #define CONFIG_USB_ETHER
228 #define CONFIG_USB_ETH_CDC
229 #define CONFIG_NETCONSOLE
230 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
232 /* USB Mass Storage Gadget */
233 #define CONFIG_USB_GADGET
234 #define CONFIG_CMD_USB_MASS_STORAGE
235 #define CONFIG_USB_GADGET_MASS_STORAGE
236 #define CONFIG_USBDOWNLOAD_GADGET
237 #define CONFIG_USB_GADGET_VBUS_DRAW 2
240 #define CONFIG_G_DNL_VENDOR_NUM 0x0525
241 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5
242 #define CONFIG_G_DNL_MANUFACTURER "Gateworks"
244 /* Framebuffer and LCD */
246 #define CONFIG_VIDEO_IPUV3
247 #define CONFIG_CFB_CONSOLE
248 #define CONFIG_VGA_AS_SINGLE_DEVICE
249 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
250 #define CONFIG_VIDEO_BMP_RLE8
251 #define CONFIG_SPLASH_SCREEN
252 #define CONFIG_BMP_16BPP
253 #define CONFIG_VIDEO_LOGO
254 #define CONFIG_IPUV3_CLK 260000000
255 #define CONFIG_CMD_HDMIDETECT
256 #define CONFIG_CONSOLE_MUX
257 #define CONFIG_IMX_HDMI
258 #define CONFIG_IMX_VIDEO_SKIP
260 /* serial console (ttymxc1,115200) */
261 #define CONFIG_CONS_INDEX 1
262 #define CONFIG_BAUDRATE 115200
264 /* Miscellaneous configurable options */
265 #define CONFIG_SYS_LONGHELP
266 #define CONFIG_SYS_HUSH_PARSER
267 #define CONFIG_SYS_PROMPT "Ventana > "
268 #define CONFIG_SYS_CBSIZE 1024
269 #define CONFIG_AUTO_COMPLETE
270 #define CONFIG_CMDLINE_EDITING
271 #define CONFIG_HWCONFIG
273 /* Print Buffer Size */
274 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
275 #define CONFIG_SYS_MAXARGS 16
276 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
278 /* Memory configuration */
279 #define CONFIG_SYS_MEMTEST_START 0x10000000
280 #define CONFIG_SYS_MEMTEST_END 0x10010000
281 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
282 #define CONFIG_SYS_TEXT_BASE 0x17800000
283 #define CONFIG_SYS_LOAD_ADDR 0x12000000
285 /* Physical Memory Map */
286 #define CONFIG_NR_DRAM_BANKS 1
287 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
288 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
289 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
290 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
292 #define CONFIG_SYS_INIT_SP_OFFSET \
293 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
294 #define CONFIG_SYS_INIT_SP_ADDR \
295 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
298 * MTD Command for mtdparts
300 #define CONFIG_CMD_MTDPARTS
301 #define CONFIG_MTD_DEVICE
302 #define CONFIG_MTD_PARTITIONS
303 #ifdef CONFIG_SPI_FLASH
304 #define MTDIDS_DEFAULT "nor0=nor"
305 #define MTDPARTS_DEFAULT \
306 "mtdparts=nor:512k(uboot),64k(env),2m(kernel),-(rootfs)"
308 #define MTDIDS_DEFAULT "nand0=nand"
309 #define MTDPARTS_DEFAULT "mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
312 /* Persistent Environment Config */
313 #define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */
314 #ifdef CONFIG_SPI_FLASH
315 #define CONFIG_ENV_IS_IN_SPI_FLASH
317 #define CONFIG_ENV_IS_IN_NAND
319 #if defined(CONFIG_ENV_IS_IN_MMC)
320 #define CONFIG_SYS_MMC_ENV_DEV 0
321 #define CONFIG_ENV_OFFSET (709 * SZ_1K)
322 #define CONFIG_ENV_SIZE (128 * SZ_1K)
323 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (128 * SZ_1K))
324 #elif defined(CONFIG_ENV_IS_IN_NAND)
325 #define CONFIG_ENV_OFFSET (16 * SZ_1M)
326 #define CONFIG_ENV_SECT_SIZE (128 * SZ_1K)
327 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
328 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (512 * SZ_1K))
329 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
330 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
331 #define CONFIG_ENV_OFFSET (512 * SZ_1K)
332 #define CONFIG_ENV_SECT_SIZE (64 * SZ_1K)
333 #define CONFIG_ENV_SIZE (8 * SZ_1K)
334 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
335 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
336 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
337 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
341 #define CONFIG_BOOTDELAY 3
342 #define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
343 #define CONFIG_IPADDR 192.168.1.1
344 #define CONFIG_SERVERIP 192.168.1.146
345 #define HWCONFIG_DEFAULT \
347 "dio0:mode=gpio;dio1:mode=gpio;dio2:mode=gpio;dio3:mode=gpio\0" \
349 #define CONFIG_EXTRA_ENV_SETTINGS_COMMON \
350 "usb_pgood_delay=2000\0" \
351 "console=ttymxc1\0" \
352 "bootdevs=usb mmc sata flash\0" \
356 "mtdparts=" MTDPARTS_DEFAULT "\0" \
357 "mtdids=" MTDIDS_DEFAULT "\0" \
359 "fdt_high=0xffffffff\0" \
360 "fdt_addr=0x18000000\0" \
361 "initrd_high=0xffffffff\0" \
364 "if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then " \
365 "echo Loaded DTB from ${bootdir}/${fdt_file}; " \
366 "elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then " \
367 "echo Loaded DTB from ${bootdir}/${fdt_file1}; " \
368 "elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then " \
369 "echo Loaded DTB from ${bootdir}/${fdt_file2}; " \
372 "script=6x_bootscript-ventana\0" \
374 "if ${fsload} ${loadaddr} ${bootdir}/${script}; then " \
379 "mmc_root=/dev/mmcblk0p1 rootfstype=ext4 rootwait rw\0" \
381 "setenv fsload 'ext2load mmc 0:1'; " \
382 "mmc dev 0 && mmc rescan && " \
383 "setenv dtype mmc; run loadscript; " \
384 "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
385 "setenv bootargs console=${console},${baudrate} " \
386 "root=/dev/mmcblk0p1 rootfstype=ext4 " \
387 "rootwait rw ${video} ${extra}; " \
388 "if run loadfdt && fdt addr ${fdt_addr}; then " \
389 "bootm ${loadaddr} - ${fdt_addr}; " \
396 "setenv fsload 'ext2load sata 0:1'; sata init && " \
397 "setenv dtype sata; run loadscript; " \
398 "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
399 "setenv bootargs console=${console},${baudrate} " \
400 "root=/dev/sda1 rootfstype=ext4 " \
401 "rootwait rw ${video} ${extra}; " \
402 "if run loadfdt && fdt addr ${fdt_addr}; then " \
403 "bootm ${loadaddr} - ${fdt_addr}; " \
409 "setenv fsload 'ext2load usb 0:1'; usb start && usb dev 0 && " \
410 "setenv dtype usb; run loadscript; " \
411 "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
412 "setenv bootargs console=${console},${baudrate} " \
413 "root=/dev/sda1 rootfstype=ext4 " \
414 "rootwait rw ${video} ${extra}; " \
415 "if run loadfdt && fdt addr ${fdt_addr}; then " \
416 "bootm ${loadaddr} - ${fdt_addr}; " \
422 #ifdef CONFIG_SPI_FLASH
423 #define CONFIG_EXTRA_ENV_SETTINGS \
424 CONFIG_EXTRA_ENV_SETTINGS_COMMON \
425 "image_os=ventana/openwrt-imx6-imx6q-gw5400-a-squashfs.bin\0" \
426 "image_uboot=ventana/u-boot_spi.imx\0" \
428 "spi_koffset=0x90000\0" \
429 "spi_klen=0x200000\0" \
431 "spi_updateuboot=echo Updating uboot from " \
432 "${serverip}:${image_uboot}...; " \
433 "tftpboot ${loadaddr} ${image_uboot} && " \
434 "sf probe && sf erase 0 80000 && " \
435 "sf write ${loadaddr} 400 ${filesize}\0" \
436 "spi_update=echo Updating OS from ${serverip}:${image_os} " \
437 "to ${spi_koffset} ...; " \
438 "tftp ${loadaddr} ${image_os} && " \
440 "sf update ${loadaddr} ${spi_koffset} ${filesize}\0" \
444 "sf read ${loadaddr} ${spi_koffset} ${spi_klen}; then " \
445 "setenv bootargs console=${console},${baudrate} " \
446 "root=/dev/mtdblock3 " \
447 "rootfstype=squashfs,jffs2 " \
448 "${video} ${extra}; " \
452 #define CONFIG_EXTRA_ENV_SETTINGS \
453 CONFIG_EXTRA_ENV_SETTINGS_COMMON \
455 "image_rootfs=openwrt-imx6-ventana-rootfs.ubi\0" \
456 "nand_update=echo Updating NAND from ${serverip}:${image_rootfs}...; " \
457 "tftp ${loadaddr} ${image_rootfs} && " \
458 "nand erase.part rootfs && " \
459 "nand write ${loadaddr} rootfs ${filesize}\0" \
462 "setenv fsload 'ubifsload'; " \
463 "ubi part rootfs; " \
464 "if ubi check boot; then " \
465 "ubifsmount ubi0:boot; " \
466 "setenv root ubi0:rootfs ubi.mtd=2 " \
467 "rootfstype=squashfs,ubifs; " \
469 "elif ubi check rootfs; then " \
470 "ubifsmount ubi0:rootfs; " \
471 "setenv root ubi0:rootfs ubi.mtd=2 " \
472 "rootfstype=ubifs; " \
474 "setenv dtype nand; run loadscript; " \
475 "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
476 "setenv bootargs console=${console},${baudrate} " \
477 "root=${root} ${video} ${extra}; " \
478 "if run loadfdt && fdt addr ${fdt_addr}; then " \
480 "bootm ${loadaddr} - ${fdt_addr}; " \
482 "ubifsumount; bootm; " \
487 #define CONFIG_BOOTCOMMAND \
488 "for btype in ${bootdevs}; do " \
489 "echo; echo Attempting ${btype} boot...; " \
490 "if run ${btype}_boot; then; fi; " \
493 /* Device Tree Support */
494 #define CONFIG_OF_BOARD_SETUP
495 #define CONFIG_OF_LIBFDT
496 #define CONFIG_FDT_FIXUP_PARTITIONS
498 #ifndef CONFIG_SYS_DCACHE_OFF
499 #define CONFIG_CMD_CACHE
502 #endif /* __CONFIG_H */