2 * (C) Copyright 2007-2008 Michal Simek
4 * Michal SIMEK <monstr@monstr.eu>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #include "../board/xilinx/ml401/xparameters.h"
30 #define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */
31 #define MICROBLAZE_V5 1
32 #define CONFIG_ML401 1 /* ML401 Board */
35 #ifdef XILINX_UARTLITE_BASEADDR
36 #define CONFIG_XILINX_UARTLITE
37 #define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR
38 #define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE
39 #define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
40 #elif XILINX_UART16550_BASEADDR
41 #define CONFIG_SYS_NS16550 1
42 #define CONFIG_SYS_NS16550_SERIAL
43 #define CONFIG_SYS_NS16550_REG_SIZE -4
44 #define CONFIG_CONS_INDEX 1
45 #define CONFIG_SYS_NS16550_COM1 (XILINX_UART16550_BASEADDR + 0x1000 + 0x3)
46 #define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ
47 #define CONFIG_BAUDRATE 115200
49 /* The following table includes the supported baudrates */
50 #define CONFIG_SYS_BAUDRATE_TABLE \
51 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
56 /* setting reset address */
57 /*#define CONFIG_SYS_RESET_ADDRESS TEXT_BASE*/
60 #ifdef XILINX_EMAC_BASEADDR
61 #define CONFIG_XILINX_EMAC 1
62 #define CONFIG_SYS_ENET
64 #ifdef XILINX_EMACLITE_BASEADDR
65 #define CONFIG_XILINX_EMACLITE 1
66 #define CONFIG_SYS_ENET
72 #ifdef XILINX_GPIO_BASEADDR
73 #define CONFIG_SYS_GPIO_0 1
74 #define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
77 /* interrupt controller */
78 #ifdef XILINX_INTC_BASEADDR
79 #define CONFIG_SYS_INTC_0 1
80 #define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR
81 #define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS
85 #ifdef XILINX_TIMER_BASEADDR
86 #if (XILINX_TIMER_IRQ != -1)
87 #define CONFIG_SYS_TIMER_0 1
88 #define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR
89 #define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ
90 #define FREQUENCE XILINX_CLOCK_FREQ
91 #define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 )
94 #ifdef XILINX_CLOCK_FREQ
95 #define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ
101 /* #define CONFIG_SYS_FSL_2 */
102 /* #define FSL_INTR_2 1 */
105 * memory layout - Example
106 * TEXT_BASE = 0x1200_0000;
107 * CONFIG_SYS_SRAM_BASE = 0x1000_0000;
108 * CONFIG_SYS_SRAM_SIZE = 0x0400_0000;
110 * CONFIG_SYS_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000
111 * CONFIG_SYS_MONITOR_BASE = 0x13FF_F000 - 0x40000 = 0x13FB_F000
112 * CONFIG_SYS_MALLOC_BASE = 0x13FB_F000 - 0x40000 = 0x13F7_F000
114 * 0x1000_0000 CONFIG_SYS_SDRAM_BASE
116 * 0x1200_0000 TEXT_BASE
122 * 0x13F7_F000 CONFIG_SYS_MALLOC_BASE
123 * MALLOC_AREA 256kB Alloc
124 * 0x11FB_F000 CONFIG_SYS_MONITOR_BASE
125 * MONITOR_CODE 256kB Env
126 * 0x13FF_F000 CONFIG_SYS_GBL_DATA_OFFSET
127 * GLOBAL_DATA 4kB bd, gd
128 * 0x1400_0000 CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE
131 /* ddr sdram - main memory */
132 #define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START
133 #define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE
134 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
135 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
138 #define CONFIG_SYS_GBL_DATA_SIZE 0x1000 /* size of global data */
139 /* start of global data */
140 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE)
144 #define CONFIG_SYS_MONITOR_LEN SIZE
145 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_MONITOR_LEN)
146 #define CONFIG_SYS_MONITOR_END (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
147 #define CONFIG_SYS_MALLOC_LEN SIZE
148 #define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
151 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MONITOR_BASE
157 #define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START
158 #define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE
159 #define CONFIG_SYS_FLASH_CFI 1
160 #define CONFIG_FLASH_CFI_DRIVER 1
161 #define CONFIG_SYS_FLASH_EMPTY_INFO 1 /* ?empty sector */
162 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
163 #define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
164 #define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */
167 #define CONFIG_ENV_IS_NOWHERE 1
168 #define CONFIG_ENV_SIZE 0x1000
169 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
172 #define CONFIG_ENV_IS_IN_FLASH 1
173 #define CONFIG_ENV_SECT_SIZE 0x40000 /* 256K(one sector) for env */
174 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
175 #define CONFIG_ENV_SIZE 0x40000
176 #endif /* !RAMBOOT */
179 #define CONFIG_SYS_NO_FLASH 1
180 #define CONFIG_ENV_IS_NOWHERE 1
181 #define CONFIG_ENV_SIZE 0x1000
182 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
183 #define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */
187 #ifdef XILINX_SYSACE_BASEADDR
188 #define CONFIG_SYSTEMACE
189 /* #define DEBUG_SYSTEMACE */
190 #define SYSTEMACE_CONFIG_FPGA
191 #define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR
192 #define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH
193 #define CONFIG_DOS_PARTITION
199 #define CONFIG_BOOTP_BOOTFILESIZE
200 #define CONFIG_BOOTP_BOOTPATH
201 #define CONFIG_BOOTP_GATEWAY
202 #define CONFIG_BOOTP_HOSTNAME
205 * Command line configuration.
207 #include <config_cmd_default.h>
209 #define CONFIG_CMD_ASKENV
210 #define CONFIG_CMD_CACHE
211 #define CONFIG_CMD_IRQ
212 #define CONFIG_CMD_MFSL
214 #ifndef CONFIG_SYS_ENET
215 #undef CONFIG_CMD_NET
217 #define CONFIG_CMD_PING
220 #if defined(CONFIG_SYSTEMACE)
221 #define CONFIG_CMD_EXT2
222 #define CONFIG_CMD_FAT
226 #define CONFIG_CMD_ECHO
227 #define CONFIG_CMD_FLASH
228 #define CONFIG_CMD_IMLS
229 #define CONFIG_CMD_JFFS2
232 #define CONFIG_CMD_ENV
233 #define CONFIG_CMD_SAVES
236 #undef CONFIG_CMD_FLASH
239 #if defined(CONFIG_CMD_JFFS2)
240 /* JFFS2 partitions */
241 #define CONFIG_JFFS2_CMDLINE /* mtdparts command line support */
242 #define MTDIDS_DEFAULT "nor0=ml401-0"
244 /* default mtd partition table */
245 #define MTDPARTS_DEFAULT "mtdparts=ml401-0:256k(u-boot),"\
246 "256k(env),3m(kernel),1m(romfs),"\
247 "1m(cramfs),-(jffs2)"
250 /* Miscellaneous configurable options */
251 #define CONFIG_SYS_PROMPT "U-Boot-mONStR> "
252 #define CONFIG_SYS_CBSIZE 512 /* size of console buffer */
253 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */
254 #define CONFIG_SYS_MAXARGS 15 /* max number of command args */
255 #define CONFIG_SYS_LONGHELP
256 #define CONFIG_SYS_LOAD_ADDR 0x12000000 /* default load address */
258 #define CONFIG_BOOTDELAY 30
259 #define CONFIG_BOOTARGS "root=romfs"
260 #define CONFIG_HOSTNAME "ml401"
261 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
262 #define CONFIG_IPADDR 192.168.0.3
263 #define CONFIG_SERVERIP 192.168.0.5
264 #define CONFIG_GATEWAYIP 192.168.0.1
265 #define CONFIG_ETHADDR 00:E0:0C:00:00:FD
267 /* architecture dependent code */
268 #define CONFIG_SYS_USR_EXCEP /* user exception */
269 #define CONFIG_SYS_HZ 1000
271 #define CONFIG_PREBOOT "echo U-BOOT for ML401;setenv preboot;echo"
273 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\
275 "mtdparts=mtdparts=ml401-0:"\
276 "256k(u-boot),256k(env),3m(kernel),"\
277 "1m(romfs),1m(cramfs),-(jffs2)\0"
279 #define CONFIG_CMDLINE_EDITING
281 #endif /* __CONFIG_H */