3 * IMMS, gGmbH <www.imms.de>
4 * Thomas Elste <info@elste.org>
6 * Configuation settings for ModNET50 board.
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * If we are developing, we might want to start u-boot from ram
32 * so we MUST NOT initialize critical regs like mem-timing ...
34 #define CONFIG_INIT_CRITICAL /* undef for developing */
37 * High Level Configuration Options
40 #define CONFIG_ARM7 1 /* This is a ARM7 CPU */
41 #define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */
42 #define CONFIG_NETARM /* it's a Netsiclicon NET+ARM */
43 #undef CONFIG_NETARM_NET40_REV2 /* it's a Net+40 Rev. 2 */
44 #undef CONFIG_NETARM_NET40_REV4 /* it's a Net+40 Rev. 4 */
45 #define CONFIG_NETARM_NET50 /* it's a Net+50 */
47 #define CONFIG_MODNET50 1 /* on an ModNET50 Board */
49 #undef CONFIG_USE_IRQ /* don't need them anymore */
52 * Size of malloc() pool
54 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
55 #define CFG_GBL_DATA_SIZE 128
60 #define CONFIG_DRIVER_NETARMETH 1
63 * select serial console configuration
65 #define CONFIG_SERIAL1 1 /* we use Serial line 1 */
67 /* allow to overwrite serial and ethaddr */
68 #define CONFIG_ENV_OVERWRITE
70 #define CONFIG_BAUDRATE 38400
72 #define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
74 #define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_JFFS2))
76 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
77 #include <cmd_confdefs.h>
79 #define CONFIG_NETMASK 255.255.255.0
80 #define CONFIG_IPADDR 192.168.30.2
81 #define CONFIG_SERVERIP 192.168.30.122
82 #define CFG_ETH_PHY_ADDR 0x100
83 #define CONFIG_CMDLINE_TAG /* submit bootargs to kernel */
85 /*#define CONFIG_BOOTDELAY 10*/
86 /* args and cmd for uClinux-image @ 0x10020000, ramdisk-image @ 0x100a0000 */
87 #define CONFIG_BOOTCOMMAND "bootm 0x10020000 0x100a0000"
88 #define CONFIG_BOOTARGS "console=ttyS0,38400 initrd=0x100a0040,530K root=/dev/ram keepinitrd"
90 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
91 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
92 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
96 * Miscellaneous configurable options
98 #define CFG_LONGHELP /* undef to save memory */
99 #define CFG_PROMPT "modnet50 # " /* Monitor Command Prompt */
100 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
101 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
102 #define CFG_MAXARGS 16 /* max number of command args */
103 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
105 #define CFG_MEMTEST_START 0x00400000 /* memtest works on */
106 #define CFG_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */
108 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
110 #define CFG_LOAD_ADDR 0x00500000 /* default load address */
112 #define CFG_HZ 900 /* decrementer freq: 2 kHz */
114 /* valid baudrates */
115 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
117 /*-----------------------------------------------------------------------
120 * The stack sizes are set up in start.S using the settings below
122 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
123 #ifdef CONFIG_USE_IRQ
124 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
125 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
128 /*-----------------------------------------------------------------------
129 * Physical Memory Map
131 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 banks of DRAM */
132 #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
133 #define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
134 #define PHYS_SDRAM_2 0x01000000 /* SDRAM Bank #1 */
135 #define PHYS_SDRAM_2_SIZE 0x01000000 /* 16 MB */
137 #define PHYS_FLASH_1 0x10000000 /* Flash Bank #1 */
138 #define PHYS_FLASH_1_SIZE 0x00200000 /* 2 MB (one chip only, 16bit access) */
140 #define PHYS_FLASH_2 0x10200001
141 #define PHYS_FLASH_2_SIZE 0x00200000
143 #define CONFIG_NETARM_EEPROM
144 /* #ifdef CONFIG_NETARM_EEPROM */
145 #define PHYS_NVRAM_1 0x20000000 /* EEPROM Bank #1 */
146 #define PHYS_NVRAM_SIZE 0x00002000 /* 8 KB */
149 #define PHYS_EXT_1 0x30000000 /* Extensions Bank #1 */
150 #define PHYS_EXT_SIZE 0x01000000 /* 32 MB memory mapped I/O */
152 #define CFG_FLASH_BASE PHYS_FLASH_1
153 #define CFG_FLASH_SIZE PHYS_FLASH_1_SIZE
155 /*-----------------------------------------------------------------------
156 * FLASH and environment organization
158 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
159 #define CFG_MAX_FLASH_SECT 35 /* max number of sectors on one chip */
160 #define CFG_MAIN_SECT_SIZE 0x00010000 /* main size of sectors on one chip */
162 /* timeout values are in ticks */
163 #define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
164 #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
166 /* environment settings */
167 #define CFG_ENV_IS_IN_FLASH
168 #undef CFG_ENV_IS_NOWHERE
170 #define CFG_ENV_ADDR 0x1001C000 /* environment start address */
171 #define CFG_ENV_SECT_SIZE 0x10000 /* Total Size of Environment Sector */
172 #define CFG_ENV_SIZE 0x4000 /* max size for environment */
174 /* Flash banks JFFS2 should use */
175 #define CFG_JFFS2_FIRST_BANK 0
176 #define CFG_JFFS2_FIRST_SECTOR 8
177 #define CFG_JFFS2_NUM_BANKS 2
179 #endif /* __CONFIG_H */