2 * Configuation settings for the Hitachi Solution Engine 7750
4 * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 * SPDX-License-Identifier: GPL-2.0+
12 #define CONFIG_CPU_SH7750 1
13 /* #define CONFIG_CPU_SH7751 1 */
14 /* #define CONFIG_CPU_TYPE_R 1 */
15 #define CONFIG_MS7750SE 1
16 #define __LITTLE_ENDIAN__ 1
18 #define CONFIG_DISPLAY_BOARDINFO
21 * Command line configuration.
23 #define CONFIG_CONS_SCIF1 1
25 #define CONFIG_ENV_OVERWRITE 1
28 #define CONFIG_SYS_SDRAM_BASE (0x8C000000)
29 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
31 #define CONFIG_SYS_LONGHELP
32 #define CONFIG_SYS_PBSIZE 256
33 #define CONFIG_SYS_MAXARGS 16
34 #define CONFIG_SYS_BARGSIZE 512
36 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000
37 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
38 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000)
41 /* #define CONFIG_SYS_FLASH_BASE (0xA1000000)*/
42 #define CONFIG_SYS_FLASH_BASE (0xA0000000)
43 #define CONFIG_SYS_MAX_FLASH_BANKS (1) /* Max number of
46 #define CONFIG_SYS_MAX_FLASH_SECT 142
47 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
49 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)
50 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) /* Address of u-boot image in Flash */
51 #define CONFIG_SYS_MONITOR_LEN (128 * 1024)
52 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Size of DRAM reserved for malloc() use */
54 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
55 #define CONFIG_SYS_RX_ETH_BUFFER (8)
57 #define CONFIG_SYS_FLASH_CFI
58 #define CONFIG_FLASH_CFI_DRIVER
59 #undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE
60 #undef CONFIG_SYS_FLASH_QUIET_TEST
61 #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
63 #define CONFIG_ENV_SECT_SIZE 0x20000
64 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
65 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
66 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000
67 #define CONFIG_SYS_FLASH_WRITE_TOUT 500
70 #define CONFIG_SYS_CLK_FREQ 33333333
71 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
72 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
73 #define CONFIG_SYS_TMU_CLK_DIV 4
75 #endif /* __MS7750SE_H */