2 * (C) Copyright 2011 Freescale Semiconductor, Inc.
3 * Author: Fabio Estevam <fabio.estevam@freescale.com>
6 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
7 * on behalf of DENX Software Engineering GmbH
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 #ifndef __MX28EVK_CONFIG_H__
20 #define __MX28EVK_CONFIG_H__
22 /* SoC configurations */
23 #define CONFIG_MX28 /* i.MX28 SoC */
25 #define CONFIG_MXS_GPIO /* GPIO control */
26 #define CONFIG_SYS_HZ 1000 /* Ticks per second */
28 #define CONFIG_MACH_TYPE MACH_TYPE_MX28EVK
30 #include <asm/arch/regs-base.h>
32 #define CONFIG_SYS_NO_FLASH
33 #define CONFIG_BOARD_EARLY_INIT_F
34 #define CONFIG_ARCH_MISC_INIT
38 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE
39 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
40 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
41 #define CONFIG_SPL_LIBCOMMON_SUPPORT
42 #define CONFIG_SPL_LIBGENERIC_SUPPORT
43 #define CONFIG_SPL_GPIO_SUPPORT
46 #include <config_cmd_default.h>
47 #define CONFIG_DISPLAY_CPUINFO
48 #define CONFIG_DOS_PARTITION
50 #define CONFIG_CMD_CACHE
51 #define CONFIG_CMD_DATE
52 #define CONFIG_CMD_DHCP
53 #define CONFIG_CMD_FAT
54 #define CONFIG_CMD_GPIO
55 #define CONFIG_CMD_MII
56 #define CONFIG_CMD_MMC
57 #define CONFIG_CMD_NET
58 #define CONFIG_CMD_NFS
59 #define CONFIG_CMD_PING
60 #define CONFIG_CMD_SETEXPR
62 #define CONFIG_CMD_SPI
63 #define CONFIG_CMD_USB
64 #define CONFIG_CMD_BOOTZ
66 /* Memory configurations */
67 #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
68 #define PHYS_SDRAM_1 0x40000000 /* Base address */
69 #define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */
70 #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
71 #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
72 #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
73 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
74 /* Point initial SP in SRAM so SPL can use it too. */
76 #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
77 #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
79 #define CONFIG_SYS_INIT_SP_OFFSET \
80 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
81 #define CONFIG_SYS_INIT_SP_ADDR \
82 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
85 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
86 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
87 * binary. In case there was more of this mess, 0x100 bytes are skipped.
89 #define CONFIG_SYS_TEXT_BASE 0x40000100
91 #define CONFIG_ENV_OVERWRITE
92 /* U-Boot general configurations */
93 #define CONFIG_SYS_LONGHELP
94 #define CONFIG_SYS_PROMPT "MX28EVK U-Boot > "
95 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
96 #define CONFIG_SYS_PBSIZE \
97 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
98 /* Print buffer size */
99 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
100 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
101 /* Boot argument buffer size */
102 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
103 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
104 #define CONFIG_CMDLINE_EDITING /* Command history etc */
105 #define CONFIG_SYS_HUSH_PARSER
108 #define CONFIG_PL011_SERIAL
109 #define CONFIG_PL011_CLOCK 24000000
110 #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
111 #define CONFIG_CONS_INDEX 0
112 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
115 #define CONFIG_APBH_DMA
118 #define CONFIG_ENV_IS_IN_MMC
119 #ifdef CONFIG_ENV_IS_IN_MMC
120 #define CONFIG_ENV_OFFSET (256 * 1024)
121 #define CONFIG_ENV_SIZE (16 * 1024)
122 #define CONFIG_SYS_MMC_ENV_DEV 0
124 #define CONFIG_CMD_SAVEENV
125 #ifdef CONFIG_CMD_MMC
127 #define CONFIG_GENERIC_MMC
128 #define CONFIG_BOUNCE_BUFFER
129 #define CONFIG_MXS_MMC
133 #ifdef CONFIG_CMD_NAND
134 #define CONFIG_NAND_MXS
135 #define CONFIG_SYS_MAX_NAND_DEVICE 1
136 #define CONFIG_SYS_NAND_BASE 0x60000000
137 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
140 /* Ethernet on SOC (FEC) */
141 #ifdef CONFIG_CMD_NET
142 #define CONFIG_NET_MULTI
143 #define CONFIG_ETHPRIME "FEC0"
144 #define CONFIG_FEC_MXC
146 #define CONFIG_FEC_XCV_TYPE RMII
147 #define CONFIG_MX28_FEC_MAC_IN_OCOTP
151 #ifdef CONFIG_CMD_DATE
152 #define CONFIG_RTC_MXS
156 #ifdef CONFIG_CMD_USB
157 #define CONFIG_USB_EHCI
158 #define CONFIG_USB_EHCI_MXS
159 #define CONFIG_EHCI_MXS_PORT1
160 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
161 #define CONFIG_EHCI_IS_TDI
162 #define CONFIG_USB_STORAGE
163 #define CONFIG_USB_HOST_ETHER
164 #define CONFIG_USB_ETHER_ASIX
165 #define CONFIG_USB_ETHER_SMSC95XX
169 #ifdef CONFIG_CMD_I2C
170 #define CONFIG_I2C_MXS
171 #define CONFIG_HARD_I2C
172 #define CONFIG_SYS_I2C_SPEED 400000
176 #ifdef CONFIG_CMD_SPI
177 #define CONFIG_HARD_SPI
178 #define CONFIG_MXS_SPI
179 #define CONFIG_SPI_HALF_DUPLEX
180 #define CONFIG_DEFAULT_SPI_BUS 2
181 #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
185 #define CONFIG_SPI_FLASH
186 #define CONFIG_SF_DEFAULT_BUS 2
187 #define CONFIG_SF_DEFAULT_CS 0
188 /* this may vary and depends on the installed chip */
189 #define CONFIG_SPI_FLASH_SST
190 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
191 #define CONFIG_SF_DEFAULT_SPEED 24000000
193 /* (redundant) environemnt in SPI flash */
194 #ifdef CONFIG_ENV_IS_IN_SPI_FLASH
195 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
196 #define CONFIG_ENV_SIZE 0x1000 /* 4KB */
197 #define CONFIG_ENV_OFFSET 0x40000 /* 256K */
198 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
199 #define CONFIG_ENV_SECT_SIZE 0x1000
200 #define CONFIG_ENV_SPI_CS 0
201 #define CONFIG_ENV_SPI_BUS 2
202 #define CONFIG_ENV_SPI_MAX_HZ 24000000
203 #define CONFIG_ENV_SPI_MODE SPI_MODE_0
209 #define CONFIG_CMDLINE_TAG
210 #define CONFIG_SETUP_MEMORY_TAGS
211 #define CONFIG_BOOTDELAY 1
212 #define CONFIG_BOOTFILE "uImage"
213 #define CONFIG_LOADADDR 0x42000000
214 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
215 #define CONFIG_OF_LIBFDT
217 /* Extra Environments */
218 #define CONFIG_EXTRA_ENV_SETTINGS \
219 "update_nand_full_filename=u-boot.nand\0" \
220 "update_nand_firmware_filename=u-boot.sb\0" \
221 "update_sd_firmware_filename=u-boot.sd\0" \
222 "update_nand_firmware_maxsz=0x100000\0" \
223 "update_nand_stride=0x40\0" /* MX28 datasheet ch. 12.12 */ \
224 "update_nand_count=0x4\0" /* MX28 datasheet ch. 12.12 */ \
225 "update_nand_get_fcb_size=" /* Get size of FCB blocks */ \
228 "setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \
229 "setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \
230 "update_nand_full=" /* Update FCB, DBBT and FW */ \
231 "if tftp ${update_nand_full_filename} ; then " \
232 "run update_nand_get_fcb_size ; " \
233 "nand scrub -y 0x0 ${filesize} ; " \
234 "nand write.raw ${loadaddr} 0x0 ${fcb_sz} ; " \
235 "setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \
236 "setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \
237 "nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \
239 "update_nand_firmware=" /* Update only firmware */ \
240 "if tftp ${update_nand_firmware_filename} ; then " \
241 "run update_nand_get_fcb_size ; " \
242 "setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \
243 "setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; " \
244 "setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \
245 "nand erase ${fcb_sz} ${fw_sz} ; " \
246 "nand write ${loadaddr} ${fcb_sz} ${filesize} ; " \
247 "nand write ${loadaddr} ${fw_off} ${filesize} ; " \
249 "update_sd_firmware=" /* Update the SD firmware partition */ \
250 "if mmc rescan ; then " \
251 "if tftp ${update_sd_firmware_filename} ; then " \
252 "setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \
253 "setexpr fw_sz ${fw_sz} + 1 ; " \
254 "mmc write ${loadaddr} 0x800 ${fw_sz} ; " \
257 "script=boot.scr\0" \
259 "console_fsl=ttyAM0\0" \
260 "console_mainline=ttyAMA0\0" \
261 "fdt_file=imx28-evk.dtb\0" \
262 "fdt_addr=0x41000000\0" \
267 "mmcroot=/dev/mmcblk0p3 rw rootwait\0" \
268 "mmcargs=setenv bootargs console=${console_mainline},${baudrate} " \
269 "root=${mmcroot}\0" \
271 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
272 "bootscript=echo Running bootscript from mmc ...; " \
274 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
275 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
276 "mmcboot=echo Booting from mmc ...; " \
278 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
279 "if run loadfdt; then " \
280 "bootm ${loadaddr} - ${fdt_addr}; " \
282 "if test ${boot_fdt} = try; then " \
285 "echo WARN: Cannot load the DT; " \
291 "netargs=setenv bootargs console=${console_mainline},${baudrate} " \
293 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
294 "netboot=echo Booting from net ...; " \
296 "if test ${ip_dyn} = yes; then " \
297 "setenv get_cmd dhcp; " \
299 "setenv get_cmd tftp; " \
301 "${get_cmd} ${uimage}; " \
302 "if test ${boot_fdt} = yes; then " \
303 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
304 "bootm ${loadaddr} - ${fdt_addr}; " \
306 "if test ${boot_fdt} = try; then " \
309 "echo WARN: Cannot load the DT; " \
316 #define CONFIG_BOOTCOMMAND \
317 "mmc dev ${mmcdev}; if mmc rescan; then " \
318 "if run loadbootscript; then " \
321 "if run loaduimage; then " \
323 "else run netboot; " \
326 "else run netboot; fi"
328 #endif /* __MX28EVK_CONFIG_H__ */