2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
4 * (C) Copyright 2009 Freescale Semiconductor, Inc.
6 * Configuration settings for the MX51EVK Board
8 * SPDX-License-Identifier: GPL-2.0+
14 /* High Level Configuration Options */
16 #define CONFIG_SYS_FSL_CLK
17 #define CONFIG_SYS_TEXT_BASE 0x97800000
19 #include <asm/arch/imx-regs.h>
21 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
22 #define CONFIG_SETUP_MEMORY_TAGS
23 #define CONFIG_INITRD_TAG
24 #define CONFIG_REVISION_TAG
26 #define CONFIG_MACH_TYPE MACH_TYPE_MX51_BABBAGE
28 * Size of malloc() pool
30 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
35 #define CONFIG_FSL_IIM
37 #define CONFIG_MXC_UART
38 #define CONFIG_MXC_UART_BASE UART1_BASE
39 #define CONFIG_MXC_GPIO
45 #define CONFIG_MXC_SPI
49 #define CONFIG_POWER_SPI
50 #define CONFIG_POWER_FSL
51 #define CONFIG_FSL_PMIC_BUS 0
52 #define CONFIG_FSL_PMIC_CS 0
53 #define CONFIG_FSL_PMIC_CLK 2500000
54 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
55 #define CONFIG_FSL_PMIC_BITLEN 32
56 #define CONFIG_RTC_MC13XXX
61 #define CONFIG_FSL_ESDHC
62 #define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR
63 #define CONFIG_SYS_FSL_ESDHC_NUM 2
70 #define CONFIG_FEC_MXC
71 #define IMX_FEC_BASE FEC_BASE_ADDR
72 #define CONFIG_FEC_MXC_PHYADDR 0x1F
75 #define CONFIG_USB_EHCI_MX5
76 #define CONFIG_MXC_USB_PORT 1
77 #define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI
78 #define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED
80 /* Framebuffer and LCD */
81 #define CONFIG_PREBOOT
82 #define CONFIG_VIDEO_IPUV3
83 #define CONFIG_VIDEO_BMP_RLE8
84 #define CONFIG_SPLASH_SCREEN
85 #define CONFIG_BMP_16BPP
86 #define CONFIG_VIDEO_LOGO
88 /* allow to overwrite serial and ethaddr */
89 #define CONFIG_ENV_OVERWRITE
90 #define CONFIG_CONS_INDEX 1
92 #define CONFIG_ETHPRIME "FEC0"
94 #define CONFIG_LOADADDR 0x92000000 /* loadaddr env var */
96 #define CONFIG_EXTRA_ENV_SETTINGS \
99 "fdt_file=imx51-babbage.dtb\0" \
100 "fdt_addr=0x91000000\0" \
105 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
106 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
107 "root=${mmcroot}\0" \
109 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
110 "bootscript=echo Running bootscript from mmc ...; " \
112 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
113 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
114 "mmcboot=echo Booting from mmc ...; " \
116 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
117 "if run loadfdt; then " \
118 "bootz ${loadaddr} - ${fdt_addr}; " \
120 "if test ${boot_fdt} = try; then " \
123 "echo WARN: Cannot load the DT; " \
129 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
131 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
132 "netboot=echo Booting from net ...; " \
134 "if test ${ip_dyn} = yes; then " \
135 "setenv get_cmd dhcp; " \
137 "setenv get_cmd tftp; " \
139 "${get_cmd} ${image}; " \
140 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
141 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
142 "bootz ${loadaddr} - ${fdt_addr}; " \
144 "if test ${boot_fdt} = try; then " \
147 "echo ERROR: Cannot load the DT; " \
155 #define CONFIG_BOOTCOMMAND \
156 "mmc dev ${mmcdev}; if mmc rescan; then " \
157 "if run loadbootscript; then " \
160 "if run loadimage; then " \
162 "else run netboot; " \
165 "else run netboot; fi"
167 #define CONFIG_ARP_TIMEOUT 200UL
170 * Miscellaneous configurable options
172 #define CONFIG_SYS_LONGHELP /* undef to save memory */
173 #define CONFIG_AUTO_COMPLETE
175 #define CONFIG_SYS_MEMTEST_START 0x90000000
176 #define CONFIG_SYS_MEMTEST_END 0x90010000
178 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
180 #define CONFIG_CMDLINE_EDITING
182 /*-----------------------------------------------------------------------
183 * Physical Memory Map
185 #define CONFIG_NR_DRAM_BANKS 1
186 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
187 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
189 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
190 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
191 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
193 #define CONFIG_SYS_INIT_SP_OFFSET \
194 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
195 #define CONFIG_SYS_INIT_SP_ADDR \
196 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
198 #define CONFIG_SYS_DDR_CLKSEL 0
199 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100
200 #define CONFIG_SYS_MAIN_PWR_ON
202 /*-----------------------------------------------------------------------
203 * environment organization
205 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
206 #define CONFIG_ENV_SIZE (8 * 1024)
207 #define CONFIG_SYS_MMC_ENV_DEV 0