2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
4 * (C) Copyright 2009 Freescale Semiconductor, Inc.
6 * Configuration settings for the MX51EVK Board
8 * SPDX-License-Identifier: GPL-2.0+
14 /* High Level Configuration Options */
16 #define CONFIG_SYS_FSL_CLK
18 #include <asm/arch/imx-regs.h>
20 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
21 #define CONFIG_SETUP_MEMORY_TAGS
22 #define CONFIG_INITRD_TAG
23 #define CONFIG_REVISION_TAG
25 #define CONFIG_MACH_TYPE MACH_TYPE_MX51_BABBAGE
27 * Size of malloc() pool
29 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
34 #define CONFIG_FSL_IIM
36 #define CONFIG_MXC_UART
37 #define CONFIG_MXC_UART_BASE UART1_BASE
41 #define CONFIG_POWER_SPI
42 #define CONFIG_POWER_FSL
43 #define CONFIG_FSL_PMIC_BUS 0
44 #define CONFIG_FSL_PMIC_CS 0
45 #define CONFIG_FSL_PMIC_CLK 2500000
46 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
47 #define CONFIG_FSL_PMIC_BITLEN 32
48 #define CONFIG_RTC_MC13XXX
53 #define CONFIG_FSL_ESDHC
54 #define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR
55 #define CONFIG_SYS_FSL_ESDHC_NUM 2
62 #define CONFIG_FEC_MXC
63 #define IMX_FEC_BASE FEC_BASE_ADDR
64 #define CONFIG_FEC_MXC_PHYADDR 0x1F
67 #define CONFIG_USB_EHCI_MX5
68 #define CONFIG_MXC_USB_PORT 1
69 #define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI
70 #define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED
72 /* Framebuffer and LCD */
73 #define CONFIG_PREBOOT
74 #define CONFIG_VIDEO_IPUV3
75 #define CONFIG_VIDEO_BMP_RLE8
76 #define CONFIG_SPLASH_SCREEN
77 #define CONFIG_BMP_16BPP
78 #define CONFIG_VIDEO_LOGO
80 /* allow to overwrite serial and ethaddr */
81 #define CONFIG_ENV_OVERWRITE
82 #define CONFIG_CONS_INDEX 1
84 #define CONFIG_ETHPRIME "FEC0"
86 #define CONFIG_LOADADDR 0x92000000 /* loadaddr env var */
88 #define CONFIG_EXTRA_ENV_SETTINGS \
91 "fdt_file=imx51-babbage.dtb\0" \
92 "fdt_addr=0x91000000\0" \
97 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
98 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
101 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
102 "bootscript=echo Running bootscript from mmc ...; " \
104 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
105 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
106 "mmcboot=echo Booting from mmc ...; " \
108 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
109 "if run loadfdt; then " \
110 "bootz ${loadaddr} - ${fdt_addr}; " \
112 "if test ${boot_fdt} = try; then " \
115 "echo WARN: Cannot load the DT; " \
121 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
123 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
124 "netboot=echo Booting from net ...; " \
126 "if test ${ip_dyn} = yes; then " \
127 "setenv get_cmd dhcp; " \
129 "setenv get_cmd tftp; " \
131 "${get_cmd} ${image}; " \
132 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
133 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
134 "bootz ${loadaddr} - ${fdt_addr}; " \
136 "if test ${boot_fdt} = try; then " \
139 "echo ERROR: Cannot load the DT; " \
147 #define CONFIG_BOOTCOMMAND \
148 "mmc dev ${mmcdev}; if mmc rescan; then " \
149 "if run loadbootscript; then " \
152 "if run loadimage; then " \
154 "else run netboot; " \
157 "else run netboot; fi"
159 #define CONFIG_ARP_TIMEOUT 200UL
162 * Miscellaneous configurable options
165 #define CONFIG_SYS_MEMTEST_START 0x90000000
166 #define CONFIG_SYS_MEMTEST_END 0x90010000
168 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
170 /*-----------------------------------------------------------------------
171 * Physical Memory Map
173 #define CONFIG_NR_DRAM_BANKS 1
174 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
175 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
177 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
178 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
179 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
181 #define CONFIG_SYS_INIT_SP_OFFSET \
182 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
183 #define CONFIG_SYS_INIT_SP_ADDR \
184 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
186 #define CONFIG_SYS_DDR_CLKSEL 0
187 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100
188 #define CONFIG_SYS_MAIN_PWR_ON
190 /*-----------------------------------------------------------------------
191 * environment organization
193 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
194 #define CONFIG_ENV_SIZE (8 * 1024)
195 #define CONFIG_SYS_MMC_ENV_DEV 0