2 * Copyright (C) 2011 Freescale Semiconductor, Inc.
4 * Configuration settings for the MX53SMD Freescale board.
6 * SPDX-License-Identifier: GPL-2.0+
12 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_SMD
14 #include <asm/arch/imx-regs.h>
16 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
17 #define CONFIG_SETUP_MEMORY_TAGS
18 #define CONFIG_INITRD_TAG
19 #define CONFIG_REVISION_TAG
21 #define CONFIG_SYS_FSL_CLK
23 /* Size of malloc() pool */
24 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
26 #define CONFIG_MXC_UART
27 #define CONFIG_MXC_UART_BASE UART1_BASE
30 #define CONFIG_SYS_I2C
31 #define CONFIG_SYS_I2C_MXC
32 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
33 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
34 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
37 #define CONFIG_FSL_ESDHC
38 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
39 #define CONFIG_SYS_FSL_ESDHC_NUM 1
42 #define CONFIG_HAS_ETH1
45 #define CONFIG_FEC_MXC
46 #define IMX_FEC_BASE FEC_BASE_ADDR
47 #define CONFIG_FEC_MXC_PHYADDR 0x1F
49 /* allow to overwrite serial and ethaddr */
50 #define CONFIG_ENV_OVERWRITE
52 /* Command definition */
54 #define CONFIG_ETHPRIME "FEC0"
56 #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
58 #define CONFIG_EXTRA_ENV_SETTINGS \
63 "mmcroot=/dev/mmcblk0p3 rw\0" \
64 "mmcrootfstype=ext3 rootwait\0" \
65 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
67 "rootfstype=${mmcrootfstype}\0" \
69 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
70 "bootscript=echo Running bootscript from mmc ...; " \
72 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
73 "mmcboot=echo Booting from mmc ...; " \
76 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
78 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
79 "netboot=echo Booting from net ...; " \
81 "dhcp ${uimage}; bootm\0" \
83 #define CONFIG_BOOTCOMMAND \
84 "mmc dev ${mmcdev}; if mmc rescan; then " \
85 "if run loadbootscript; then " \
88 "if run loaduimage; then " \
90 "else run netboot; " \
93 "else run netboot; fi"
94 #define CONFIG_ARP_TIMEOUT 200UL
96 /* Miscellaneous configurable options */
98 #define CONFIG_SYS_MEMTEST_START 0x70000000
99 #define CONFIG_SYS_MEMTEST_END 0x70010000
101 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
103 /* Physical Memory Map */
104 #define CONFIG_NR_DRAM_BANKS 2
105 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
106 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
107 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
108 #define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
109 #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
111 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
112 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
113 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
115 #define CONFIG_SYS_INIT_SP_OFFSET \
116 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
117 #define CONFIG_SYS_INIT_SP_ADDR \
118 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
120 /* environment organization */
121 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
122 #define CONFIG_ENV_SIZE (8 * 1024)
123 #define CONFIG_SYS_MMC_ENV_DEV 0
125 #endif /* __CONFIG_H */