2 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
4 * SPDX-License-Identifier: GPL-2.0
10 #if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
11 #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */
12 #define COUNTER_FREQUENCY CONFIG_SC_TIMER_CLK
14 #ifndef CONFIG_SYS_L2CACHE_OFF
15 #define CONFIG_SYS_L2_PL310
16 #define CONFIG_SYS_PL310_BASE L2_PL310_BASE
21 #define CONFIG_BOARD_POSTCLK_INIT
22 #define CONFIG_MXC_GPT_HCLK
24 #define CONFIG_SYS_BOOTM_LEN 0x1000000
26 #include <linux/sizes.h>
27 #include <asm/arch/imx-regs.h>
28 #include <asm/mach-imx/gpio.h>
34 #define CONFIG_SYS_FSL_CLK
37 #define CONFIG_CMDLINE_TAG
38 #define CONFIG_SETUP_MEMORY_TAGS
39 #define CONFIG_INITRD_TAG
40 #define CONFIG_REVISION_TAG
43 #if defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \
44 defined(CONFIG_MX6SX) || \
45 defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
46 #define CONFIG_LOADADDR 0x82000000
48 #define CONFIG_LOADADDR 0x12000000
50 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
52 /* allow to overwrite serial and ethaddr */
53 #define CONFIG_ENV_OVERWRITE
55 /* Filesystems and image support */
57 /* Miscellaneous configurable options */
58 #define CONFIG_SYS_CBSIZE 512
59 #define CONFIG_SYS_MAXARGS 32
62 #define CONFIG_BOUNCE_BUFFER
63 #define CONFIG_FSL_USDHC
66 #define CONFIG_MXC_OCOTP
68 /* Secure boot (HAB) support */
69 #ifdef CONFIG_SECURE_BOOT
70 #define CONFIG_CSF_SIZE 0x2000
71 #ifdef CONFIG_SPL_BUILD
72 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT