2 * Copyright 2013 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale i.MX6SL EVK board.
6 * SPDX-License-Identifier: GPL-2.0+
12 #include <asm/arch/imx-regs.h>
13 #include <asm/imx-common/gpio.h>
14 #include <linux/sizes.h>
15 #include "mx6_common.h"
18 #define CONFIG_DISPLAY_CPUINFO
19 #define CONFIG_DISPLAY_BOARDINFO
21 #define MACH_TYPE_MX6SLEVK 4307
22 #define CONFIG_MACH_TYPE MACH_TYPE_MX6SLEVK
24 #define CONFIG_CMDLINE_TAG
25 #define CONFIG_SETUP_MEMORY_TAGS
26 #define CONFIG_INITRD_TAG
27 #define CONFIG_REVISION_TAG
29 #define CONFIG_SYS_GENERIC_BOARD
31 /* Size of malloc() pool */
32 #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
34 #define CONFIG_BOARD_EARLY_INIT_F
35 #define CONFIG_MXC_GPIO
37 #define CONFIG_MXC_UART
38 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
41 #define CONFIG_FSL_ESDHC
42 #define CONFIG_FSL_USDHC
43 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
46 #define CONFIG_CMD_MMC
47 #define CONFIG_GENERIC_MMC
48 #define CONFIG_CMD_FAT
49 #define CONFIG_DOS_PARTITION
52 #define CONFIG_CMD_I2C
53 #define CONFIG_SYS_I2C
54 #define CONFIG_SYS_I2C_MXC
55 #define CONFIG_SYS_I2C_SPEED 100000
59 #define CONFIG_POWER_I2C
60 #define CONFIG_POWER_PFUZE100
61 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
63 #define CONFIG_CMD_PING
64 #define CONFIG_CMD_DHCP
65 #define CONFIG_CMD_MII
66 #define CONFIG_CMD_NET
67 #define CONFIG_FEC_MXC
69 #define IMX_FEC_BASE ENET_BASE_ADDR
70 #define CONFIG_FEC_XCV_TYPE RMII
71 #define CONFIG_ETHPRIME "FEC"
72 #define CONFIG_FEC_MXC_PHYADDR 0
75 #define CONFIG_PHY_SMSC
77 /* allow to overwrite serial and ethaddr */
78 #define CONFIG_ENV_OVERWRITE
79 #define CONFIG_CONS_INDEX 1
80 #define CONFIG_BAUDRATE 115200
82 /* Command definition */
83 #include <config_cmd_default.h>
85 #undef CONFIG_CMD_IMLS
87 #define CONFIG_BOOTDELAY 3
89 #define CONFIG_LOADADDR 0x82000000
90 #define CONFIG_SYS_TEXT_BASE 0x87800000
92 #define CONFIG_EXTRA_ENV_SETTINGS \
96 "fdt_high=0xffffffff\0" \
97 "initrd_high=0xffffffff\0" \
98 "fdt_file=imx6sl-evk.dtb\0" \
99 "fdt_addr=0x88000000\0" \
104 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
105 "mmcargs=setenv bootargs console=${console},${baudrate} " \
106 "root=${mmcroot}\0" \
108 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
109 "bootscript=echo Running bootscript from mmc ...; " \
111 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
112 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
113 "mmcboot=echo Booting from mmc ...; " \
115 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
116 "if run loadfdt; then " \
117 "bootz ${loadaddr} - ${fdt_addr}; " \
119 "if test ${boot_fdt} = try; then " \
122 "echo WARN: Cannot load the DT; " \
128 "netargs=setenv bootargs console=${console},${baudrate} " \
130 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
131 "netboot=echo Booting from net ...; " \
133 "if test ${ip_dyn} = yes; then " \
134 "setenv get_cmd dhcp; " \
136 "setenv get_cmd tftp; " \
138 "${get_cmd} ${image}; " \
139 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
140 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
141 "bootz ${loadaddr} - ${fdt_addr}; " \
143 "if test ${boot_fdt} = try; then " \
146 "echo WARN: Cannot load the DT; " \
153 #define CONFIG_BOOTCOMMAND \
154 "mmc dev ${mmcdev};" \
155 "mmc dev ${mmcdev}; if mmc rescan; then " \
156 "if run loadbootscript; then " \
159 "if run loadimage; then " \
161 "else run netboot; " \
164 "else run netboot; fi"
166 /* Miscellaneous configurable options */
167 #define CONFIG_SYS_LONGHELP
168 #define CONFIG_SYS_HUSH_PARSER
169 #define CONFIG_AUTO_COMPLETE
170 #define CONFIG_SYS_CBSIZE 256
172 #define CONFIG_SYS_MAXARGS 16
173 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
175 #define CONFIG_SYS_MEMTEST_START 0x80000000
176 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_512M)
178 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
180 #define CONFIG_CMDLINE_EDITING
181 #define CONFIG_STACKSIZE SZ_128K
183 /* Physical Memory Map */
184 #define CONFIG_NR_DRAM_BANKS 1
185 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
186 #define PHYS_SDRAM_SIZE SZ_1G
188 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
189 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
190 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
192 #define CONFIG_SYS_INIT_SP_OFFSET \
193 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
194 #define CONFIG_SYS_INIT_SP_ADDR \
195 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
197 /* FLASH and environment organization */
198 #define CONFIG_SYS_NO_FLASH
200 #define CONFIG_ENV_SIZE SZ_8K
202 #if defined CONFIG_SYS_BOOT_SPINOR
203 #define CONFIG_ENV_IS_IN_SPI_FLASH
204 #define CONFIG_ENV_OFFSET (768 * 1024)
205 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
206 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
207 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
208 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
209 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
211 #define CONFIG_ENV_OFFSET (8 * SZ_64K)
212 #define CONFIG_ENV_IS_IN_MMC
215 #define CONFIG_OF_LIBFDT
216 #define CONFIG_CMD_BOOTZ
218 #ifndef CONFIG_SYS_DCACHE_OFF
219 #define CONFIG_CMD_CACHE
222 #define CONFIG_CMD_SF
224 #define CONFIG_SPI_FLASH
225 #define CONFIG_SPI_FLASH_STMICRO
226 #define CONFIG_MXC_SPI
227 #define CONFIG_SF_DEFAULT_BUS 0
228 #define CONFIG_SF_DEFAULT_CS 0
229 #define CONFIG_SF_DEFAULT_SPEED 20000000
230 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
234 #define CONFIG_CMD_USB
235 #ifdef CONFIG_CMD_USB
236 #define CONFIG_USB_EHCI
237 #define CONFIG_USB_EHCI_MX6
238 #define CONFIG_USB_STORAGE
239 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
240 #define CONFIG_USB_HOST_ETHER
241 #define CONFIG_USB_ETHER_ASIX
242 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
243 #define CONFIG_MXC_USB_FLAGS 0
244 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
247 #define CONFIG_SYS_FSL_USDHC_NUM 3
248 #if defined(CONFIG_ENV_IS_IN_MMC)
249 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC2*/
252 #endif /* __CONFIG_H */