2 * Copyright (C) 2015 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale i.MX6UL 14x14 EVK board.
6 * SPDX-License-Identifier: GPL-2.0+
8 #ifndef __MX6UL_14X14_EVK_CONFIG_H
9 #define __MX6UL_14X14_EVK_CONFIG_H
12 #include <asm/arch/imx-regs.h>
13 #include <linux/sizes.h>
14 #include "mx6_common.h"
15 #include <asm/imx-common/gpio.h>
17 #define is_mx6ul_9x9_evk() CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK)
20 #define CONFIG_SPL_LIBCOMMON_SUPPORT
21 #define CONFIG_SPL_MMC_SUPPORT
24 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
26 #define CONFIG_DISPLAY_CPUINFO
27 #define CONFIG_DISPLAY_BOARDINFO
29 /* Size of malloc() pool */
30 #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
32 #define CONFIG_BOARD_EARLY_INIT_F
33 #define CONFIG_BOARD_LATE_INIT
35 #define CONFIG_MXC_UART
36 #define CONFIG_MXC_UART_BASE UART1_BASE
39 #ifdef CONFIG_FSL_USDHC
40 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
42 /* NAND pin conflicts with usdhc2 */
43 #ifdef CONFIG_NAND_MXS
44 #define CONFIG_SYS_FSL_USDHC_NUM 1
46 #define CONFIG_SYS_FSL_USDHC_NUM 2
49 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
53 #define CONFIG_CMD_I2C
55 #define CONFIG_SYS_I2C
56 #define CONFIG_SYS_I2C_MXC
57 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
58 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
59 #define CONFIG_SYS_I2C_SPEED 100000
61 /* PMIC only for 9X9 EVK */
63 #define CONFIG_POWER_I2C
64 #define CONFIG_POWER_PFUZE3000
65 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
68 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
70 #define CONFIG_EXTRA_ENV_SETTINGS \
74 "fdt_high=0xffffffff\0" \
75 "initrd_high=0xffffffff\0" \
76 "fdt_file=undefined\0" \
77 "fdt_addr=0x83000000\0" \
80 "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
81 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
82 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
83 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
84 "mmcautodetect=yes\0" \
85 "mmcargs=setenv bootargs console=${console},${baudrate} " \
88 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
89 "bootscript=echo Running bootscript from mmc ...; " \
91 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
92 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
93 "mmcboot=echo Booting from mmc ...; " \
95 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
96 "if run loadfdt; then " \
97 "bootz ${loadaddr} - ${fdt_addr}; " \
99 "if test ${boot_fdt} = try; then " \
102 "echo WARN: Cannot load the DT; " \
108 "netargs=setenv bootargs console=${console},${baudrate} " \
110 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
111 "netboot=echo Booting from net ...; " \
113 "if test ${ip_dyn} = yes; then " \
114 "setenv get_cmd dhcp; " \
116 "setenv get_cmd tftp; " \
118 "${get_cmd} ${image}; " \
119 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
120 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
121 "bootz ${loadaddr} - ${fdt_addr}; " \
123 "if test ${boot_fdt} = try; then " \
126 "echo WARN: Cannot load the DT; " \
133 "if test $fdt_file = undefined; then " \
134 "if test $board_name = EVK && test $board_rev = 9X9; then " \
135 "setenv fdt_file imx6ul-9x9-evk.dtb; fi; " \
136 "if test $board_name = EVK && test $board_rev = 14X14; then " \
137 "setenv fdt_file imx6ul-14x14-evk.dtb; fi; " \
138 "if test $fdt_file = undefined; then " \
139 "echo WARNING: Could not determine dtb to use; fi; " \
142 #define CONFIG_BOOTCOMMAND \
144 "mmc dev ${mmcdev};" \
145 "mmc dev ${mmcdev}; if mmc rescan; then " \
146 "if run loadbootscript; then " \
149 "if run loadimage; then " \
151 "else run netboot; " \
154 "else run netboot; fi"
156 /* Miscellaneous configurable options */
157 #define CONFIG_CMD_MEMTEST
158 #define CONFIG_SYS_MEMTEST_START 0x80000000
159 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000)
161 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
162 #define CONFIG_SYS_HZ 1000
164 #define CONFIG_CMDLINE_EDITING
165 #define CONFIG_STACKSIZE SZ_128K
167 /* Physical Memory Map */
168 #define CONFIG_NR_DRAM_BANKS 1
169 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
171 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
172 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
173 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
175 #define CONFIG_SYS_INIT_SP_OFFSET \
176 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
177 #define CONFIG_SYS_INIT_SP_ADDR \
178 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
180 /* FLASH and environment organization */
181 #define CONFIG_SYS_NO_FLASH
183 #define CONFIG_ENV_SIZE SZ_8K
184 #define CONFIG_ENV_IS_IN_MMC
185 #define CONFIG_ENV_OFFSET (8 * SZ_64K)
186 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
187 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
188 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
190 #define CONFIG_OF_LIBFDT
191 #define CONFIG_CMD_BOOTZ
192 #define CONFIG_CMD_BMODE
194 #ifndef CONFIG_SYS_DCACHE_OFF
195 #define CONFIG_CMD_CACHE
198 #ifdef CONFIG_FSL_QSPI
199 #define CONFIG_CMD_SF
200 #define CONFIG_SPI_FLASH
201 #define CONFIG_SPI_FLASH_BAR
202 #define CONFIG_SF_DEFAULT_BUS 0
203 #define CONFIG_SF_DEFAULT_CS 0
204 #define CONFIG_SF_DEFAULT_SPEED 40000000
205 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
206 #define FSL_QSPI_FLASH_NUM 1
207 #define FSL_QSPI_FLASH_SIZE SZ_32M
211 #define CONFIG_CMD_USB
212 #ifdef CONFIG_CMD_USB
213 #define CONFIG_USB_EHCI
214 #define CONFIG_USB_EHCI_MX6
215 #define CONFIG_USB_STORAGE
216 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
217 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
218 #define CONFIG_MXC_USB_FLAGS 0
219 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
222 #ifdef CONFIG_CMD_NET
223 #define CONFIG_FEC_MXC
225 #define CONFIG_FEC_ENET_DEV 1
227 #if (CONFIG_FEC_ENET_DEV == 0)
228 #define IMX_FEC_BASE ENET_BASE_ADDR
229 #define CONFIG_FEC_MXC_PHYADDR 0x2
230 #define CONFIG_FEC_XCV_TYPE RMII
231 #elif (CONFIG_FEC_ENET_DEV == 1)
232 #define IMX_FEC_BASE ENET2_BASE_ADDR
233 #define CONFIG_FEC_MXC_PHYADDR 0x1
234 #define CONFIG_FEC_XCV_TYPE RMII
236 #define CONFIG_ETHPRIME "FEC"
238 #define CONFIG_PHYLIB
239 #define CONFIG_PHY_MICREL
242 #define CONFIG_IMX_THERMAL
244 #ifndef CONFIG_SPL_BUILD
247 #define CONFIG_CFB_CONSOLE
248 #define CONFIG_VIDEO_MXS
249 #define CONFIG_VIDEO_LOGO
250 #define CONFIG_VIDEO_SW_CURSOR
251 #define CONFIG_VGA_AS_SINGLE_DEVICE
252 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
253 #define CONFIG_SPLASH_SCREEN
254 #define CONFIG_SPLASH_SCREEN_ALIGN
255 #define CONFIG_CMD_BMP
256 #define CONFIG_BMP_16BPP
257 #define CONFIG_VIDEO_BMP_RLE8
258 #define CONFIG_VIDEO_BMP_LOGO
259 #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR