2 * Copyright (C) 2015 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale i.MX6UL 14x14 EVK board.
6 * SPDX-License-Identifier: GPL-2.0+
8 #ifndef __MX6UL_14X14_EVK_CONFIG_H
9 #define __MX6UL_14X14_EVK_CONFIG_H
12 #include <asm/arch/imx-regs.h>
13 #include <linux/sizes.h>
14 #include "mx6_common.h"
15 #include <asm/imx-common/gpio.h>
18 #define CONFIG_SPL_LIBCOMMON_SUPPORT
19 #define CONFIG_SPL_MMC_SUPPORT
20 #define CONFIG_SPL_FAT_SUPPORT
24 #define CONFIG_ROM_UNIFIED_SECTIONS
25 #define CONFIG_SYS_GENERIC_BOARD
26 #define CONFIG_DISPLAY_CPUINFO
27 #define CONFIG_DISPLAY_BOARDINFO
29 /* Size of malloc() pool */
30 #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
32 #define CONFIG_BOARD_EARLY_INIT_F
33 #define CONFIG_BOARD_LATE_INIT
35 #define CONFIG_MXC_UART
36 #define CONFIG_MXC_UART_BASE UART1_BASE
38 #define CONFIG_CMD_FUSE
39 #ifdef CONFIG_CMD_FUSE
40 #define CONFIG_MXC_OCOTP
44 #ifdef CONFIG_FSL_USDHC
45 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
47 /* NAND pin conflicts with usdhc2 */
48 #ifdef CONFIG_NAND_MXS
49 #define CONFIG_SYS_FSL_USDHC_NUM 1
51 #define CONFIG_SYS_FSL_USDHC_NUM 2
54 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
57 #undef CONFIG_BOOTM_NETBSD
58 #undef CONFIG_BOOTM_PLAN9
59 #undef CONFIG_BOOTM_RTEMS
61 #undef CONFIG_CMD_EXPORTENV
62 #undef CONFIG_CMD_IMPORTENV
65 #define CONFIG_CMD_I2C
67 #define CONFIG_SYS_I2C
68 #define CONFIG_SYS_I2C_MXC
69 #define CONFIG_SYS_I2C_SPEED 100000
72 #define PHYS_SDRAM_SIZE SZ_512M
74 #undef CONFIG_CMD_IMLS
76 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
78 #define CONFIG_EXTRA_ENV_SETTINGS \
82 "fdt_high=0xffffffff\0" \
83 "initrd_high=0xffffffff\0" \
84 "fdt_file=imx6ul-14x14-evk.dtb\0" \
85 "fdt_addr=0x83000000\0" \
88 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
89 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
90 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
91 "mmcautodetect=yes\0" \
92 "mmcargs=setenv bootargs console=${console},${baudrate} " \
95 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
96 "bootscript=echo Running bootscript from mmc ...; " \
98 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
99 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
100 "mmcboot=echo Booting from mmc ...; " \
102 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
103 "if run loadfdt; then " \
104 "bootz ${loadaddr} - ${fdt_addr}; " \
106 "if test ${boot_fdt} = try; then " \
109 "echo WARN: Cannot load the DT; " \
115 "netargs=setenv bootargs console=${console},${baudrate} " \
117 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
118 "netboot=echo Booting from net ...; " \
120 "if test ${ip_dyn} = yes; then " \
121 "setenv get_cmd dhcp; " \
123 "setenv get_cmd tftp; " \
125 "${get_cmd} ${image}; " \
126 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
127 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
128 "bootz ${loadaddr} - ${fdt_addr}; " \
130 "if test ${boot_fdt} = try; then " \
133 "echo WARN: Cannot load the DT; " \
140 #define CONFIG_BOOTCOMMAND \
141 "mmc dev ${mmcdev};" \
142 "mmc dev ${mmcdev}; if mmc rescan; then " \
143 "if run loadbootscript; then " \
146 "if run loadimage; then " \
148 "else run netboot; " \
151 "else run netboot; fi"
153 /* Miscellaneous configurable options */
154 /* Print Buffer Size */
155 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
157 #define CONFIG_CMD_MEMTEST
158 #define CONFIG_SYS_MEMTEST_START 0x80000000
159 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000000)
161 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
162 #define CONFIG_SYS_HZ 1000
164 #define CONFIG_CMDLINE_EDITING
165 #define CONFIG_STACKSIZE SZ_128K
167 /* Physical Memory Map */
168 #define CONFIG_NR_DRAM_BANKS 1
169 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
171 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
172 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
173 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
175 #define CONFIG_SYS_INIT_SP_OFFSET \
176 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
177 #define CONFIG_SYS_INIT_SP_ADDR \
178 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
180 /* FLASH and environment organization */
181 #define CONFIG_SYS_NO_FLASH
183 #define CONFIG_ENV_SIZE SZ_8K
184 #define CONFIG_ENV_IS_IN_MMC
185 #define CONFIG_ENV_OFFSET (8 * SZ_64K)
186 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
187 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
188 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
190 #define CONFIG_OF_LIBFDT
191 #define CONFIG_CMD_BOOTZ
192 #define CONFIG_CMD_BMODE
194 #ifndef CONFIG_SYS_DCACHE_OFF
195 #define CONFIG_CMD_CACHE
198 #define CONFIG_FSL_QSPI
199 #ifdef CONFIG_FSL_QSPI
200 #define CONFIG_CMD_SF
201 #define CONFIG_SPI_FLASH
202 #define CONFIG_SPI_FLASH_STMICRO
203 #define CONFIG_SPI_FLASH_BAR
204 #define CONFIG_SF_DEFAULT_BUS 0
205 #define CONFIG_SF_DEFAULT_CS 0
206 #define CONFIG_SF_DEFAULT_SPEED 40000000
207 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
208 #define FSL_QSPI_FLASH_NUM 1
209 #define FSL_QSPI_FLASH_SIZE SZ_32M
213 #define CONFIG_CMD_USB
214 #ifdef CONFIG_CMD_USB
215 #define CONFIG_USB_EHCI
216 #define CONFIG_USB_EHCI_MX6
217 #define CONFIG_USB_STORAGE
218 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
219 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
220 #define CONFIG_MXC_USB_FLAGS 0
221 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
224 #define CONFIG_IMX6_THERMAL