2 * Configuration settings for the TI OMAP3 EVM board.
4 * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/
7 * Manikandan Pillai <mani.pillai@ti.com>
8 * Derived from Beagle Board and 3430 SDP code by
9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Syed Mohammed Khasim <khasim@ti.com>
12 * Manikandan Pillai <mani.pillai@ti.com>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33 #ifndef __OMAP3EVM_CONFIG_H
34 #define __OMAP3EVM_CONFIG_H
36 #include <asm/arch/cpu.h>
37 #include <asm/arch/omap3.h>
39 /* =============================================================================
40 * This section holds the common definitions that correspond to the
41 * current default configuration - omap3_evm_config
42 * =============================================================================
45 /* ----------------------------------------------------------------------------
46 * Supported U-boot commands
47 * ----------------------------------------------------------------------------
50 /* Default commands to include */
51 #include <config_cmd_default.h>
53 #define CONFIG_CMD_EXT2 /* EXT2 Support */
54 #define CONFIG_CMD_FAT /* FAT support */
55 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */
57 #define CONFIG_CMD_I2C /* I2C serial bus support */
58 #define CONFIG_CMD_MMC /* MMC support */
59 #define CONFIG_CMD_NAND /* NAND support */
60 #define CONFIG_CMD_DHCP
61 #define CONFIG_CMD_PING
63 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
64 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
65 #undef CONFIG_CMD_IMI /* iminfo */
66 #undef CONFIG_CMD_IMLS /* List all found images */
68 /* ----------------------------------------------------------------------------
69 * Supported U-boot features
70 * ----------------------------------------------------------------------------
72 #define CONFIG_SYS_LONGHELP
73 #define CONFIG_SYS_HUSH_PARSER
75 /* Display CPU and Board information */
76 #define CONFIG_DISPLAY_CPUINFO
77 #define CONFIG_DISPLAY_BOARDINFO
79 /* Allow to overwrite serial and ethaddr */
80 #define CONFIG_ENV_OVERWRITE
82 /* Add auto-completion support */
83 #define CONFIG_AUTO_COMPLETE
85 /* ----------------------------------------------------------------------------
87 * ----------------------------------------------------------------------------
92 #define CONFIG_GENERIC_MMC
93 #define CONFIG_OMAP_HSMMC
94 #define CONFIG_DOS_PARTITION
98 * Enable CONFIG_MUSB_HCD for Host functionalities MSC, keyboard
99 * Enable CONFIG_MUSB_UDD for Device functionalities.
101 #define CONFIG_USB_OMAP3
102 #define CONFIG_MUSB_HCD
103 /* #define CONFIG_MUSB_UDC */
105 /* -----------------------------------------------------------------------------
106 * Default environment
107 * -----------------------------------------------------------------------------
109 #define CONFIG_BOOTDELAY 10
111 #define CONFIG_EXTRA_ENV_SETTINGS \
112 "loadaddr=0x82000000\0" \
116 "console=ttyO0,115200n8\0" \
117 "mmcargs=setenv bootargs console=${console} " \
118 "mem=${memsize}\0 " \
119 "root=/dev/mmcblk0p2 rw " \
120 "rootfstype=ext3 rootwait\0" \
121 "nandargs=setenv bootargs console=${console} " \
122 "mem=${memsize}\0 " \
123 "root=/dev/mtdblock4 rw " \
124 "rootfstype=jffs2\0" \
125 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
126 "bootscript=echo Running bootscript from mmc ...; " \
127 "source ${loadaddr}\0" \
128 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
129 "mmcboot=echo Booting from mmc ...; " \
131 "bootm ${loadaddr}\0" \
132 "nandboot=echo Booting from nand ...; " \
134 "onenand read ${loadaddr} 280000 400000; " \
135 "bootm ${loadaddr}\0" \
137 #define CONFIG_BOOTCOMMAND \
138 "if mmc rescan ${mmcdev}; then " \
139 "if run loadbootscript; then " \
142 "if run loaduimage; then " \
144 "else run nandboot; " \
147 "else run nandboot; fi"
149 /* =============================================================================
150 * This section holds the common definitions that can be used by
151 * all OMAP3EVM based configurations.
152 * =============================================================================
156 * High level configuration options
158 #define CONFIG_OMAP /* This is TI OMAP core */
159 #define CONFIG_OMAP34XX /* belonging to 34XX family */
160 #define CONFIG_OMAP3430 /* which is in a 3430 */
162 #define CONFIG_SDRC /* The chip has SDRC controller */
164 #define CONFIG_OMAP3_EVM /* This is a OMAP3 EVM */
165 #define CONFIG_OMAP3_MICRON_DDR /* with MICRON DDR part */
166 #define CONFIG_TWL4030_POWER /* with TWL4030 PMIC */
168 #undef CONFIG_USE_IRQ /* no support for IRQs */
171 * Clock related definitions
173 #define V_OSCK 26000000 /* Clock output from T2 */
174 #define V_SCLK (V_OSCK >> 1)
177 * OMAP3 has 12 GP timers, they can be driven by the system clock
178 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
179 * This rate is divided by a local divisor.
181 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
182 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
183 #define CONFIG_SYS_HZ 1000
185 /* Size of environment - 128KB */
186 #define CONFIG_ENV_SIZE (128 << 10)
188 /* Size of malloc pool */
189 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
193 * These values are used in start.S
195 #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
197 #ifdef CONFIG_USE_IRQ
198 #define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */
199 #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */
203 * Physical Memory Map
204 * Note 1: CS1 may or may not be populated
205 * Note 2: SDRAM size is expected to be at least 32MB
207 #define CONFIG_NR_DRAM_BANKS 2
208 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
209 #define PHYS_SDRAM_1_SIZE (32 << 20)
210 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
212 /* SDRAM Bank Allocation method */
215 /* Limits for memtest */
216 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
217 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
218 0x01F00000) /* 31MB */
220 /* Default load address */
221 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
223 /* -----------------------------------------------------------------------------
225 * -----------------------------------------------------------------------------
229 * NS16550 Configuration
231 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
233 #define CONFIG_SYS_NS16550
234 #define CONFIG_SYS_NS16550_SERIAL
235 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
236 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
239 * select serial console configuration
241 #define CONFIG_CONS_INDEX 1
242 #define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */
243 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
244 #define CONFIG_BAUDRATE 115200
245 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
251 #define CONFIG_HARD_I2C
252 #define CONFIG_DRIVER_OMAP34XX_I2C
254 #define CONFIG_SYS_I2C_SPEED 100000
255 #define CONFIG_SYS_I2C_SLAVE 1
256 #define CONFIG_SYS_I2C_BUS 0
257 #define CONFIG_SYS_I2C_BUS_SELECT 1
262 #define PISMO1_NAND_SIZE GPMC_SIZE_128M
263 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M
265 /* Monitor at start of flash - Reserve 2 sectors */
266 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
268 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
270 /* Start location & size of environment */
271 #define ONENAND_ENV_OFFSET 0x260000
272 #define SMNAND_ENV_OFFSET 0x260000
274 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
279 /* Physical address to access NAND */
280 #define CONFIG_SYS_NAND_ADDR NAND_BASE
282 /* Physical address to access NAND at CS0 */
283 #define CONFIG_SYS_NAND_BASE NAND_BASE
285 /* Max number of NAND devices */
286 #define CONFIG_SYS_MAX_NAND_DEVICE 1
288 /* Timeout values (in ticks) */
289 #define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
290 #define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
292 /* Flash banks JFFS2 should use */
293 #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
294 CONFIG_SYS_MAX_NAND_DEVICE)
296 #define CONFIG_SYS_JFFS2_MEM_NAND
297 #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
298 #define CONFIG_SYS_JFFS2_NUM_BANKS 1
300 #define CONFIG_JFFS2_NAND
301 /* nand device jffs2 lives on */
302 #define CONFIG_JFFS2_DEV "nand0"
303 /* Start of jffs2 partition */
304 #define CONFIG_JFFS2_PART_OFFSET 0x680000
305 /* Size of jffs2 partition */
306 #define CONFIG_JFFS2_PART_SIZE 0xf980000
311 #ifdef CONFIG_USB_OMAP3
313 #ifdef CONFIG_MUSB_HCD
314 #define CONFIG_CMD_USB
316 #define CONFIG_USB_STORAGE
317 #define CONGIG_CMD_STORAGE
318 #define CONFIG_CMD_FAT
320 #ifdef CONFIG_USB_KEYBOARD
321 #define CONFIG_SYS_USB_EVENT_POLL
322 #define CONFIG_PREBOOT "usb start"
323 #endif /* CONFIG_USB_KEYBOARD */
325 #endif /* CONFIG_MUSB_HCD */
327 #ifdef CONFIG_MUSB_UDC
328 /* USB device configuration */
329 #define CONFIG_USB_DEVICE
330 #define CONFIG_USB_TTY
331 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
333 /* Change these to suit your needs */
334 #define CONFIG_USBD_VENDORID 0x0451
335 #define CONFIG_USBD_PRODUCTID 0x5678
336 #define CONFIG_USBD_MANUFACTURER "Texas Instruments"
337 #define CONFIG_USBD_PRODUCT_NAME "EVM"
338 #endif /* CONFIG_MUSB_UDC */
340 #endif /* CONFIG_USB_OMAP3 */
342 /* ----------------------------------------------------------------------------
344 * ----------------------------------------------------------------------------
346 #define CONFIG_SYS_PROMPT "OMAP3_EVM # "
347 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
348 #define CONFIG_SYS_MAXARGS 16 /* max args for a command */
350 #define CONFIG_MISC_INIT_R
352 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
353 #define CONFIG_SETUP_MEMORY_TAGS
354 #define CONFIG_INITRD_TAG
355 #define CONFIG_REVISION_TAG
357 /* Size of Console IO buffer */
358 #define CONFIG_SYS_CBSIZE 512
360 /* Size of print buffer */
361 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
362 sizeof(CONFIG_SYS_PROMPT) + 16)
364 /* Size of bootarg buffer */
365 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
367 #define CONFIG_BOOTFILE uImage
372 #if defined(CONFIG_CMD_NAND)
373 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
375 #define CONFIG_NAND_OMAP_GPMC
376 #define GPMC_NAND_ECC_LP_x16_LAYOUT
377 #define CONFIG_ENV_IS_IN_NAND
378 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
379 #elif defined(CONFIG_CMD_ONENAND)
380 #define CONFIG_SYS_FLASH_BASE PISMO1_ONEN_BASE
381 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
383 #define CONFIG_ENV_IS_IN_ONENAND
384 #define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET
387 #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
389 #if defined(CONFIG_CMD_NET)
391 /* Ethernet (SMSC9115 from SMSC9118 family) */
392 #define CONFIG_SMC911X
393 #define CONFIG_SMC911X_32_BIT
394 #define CONFIG_SMC911X_BASE 0x2C000000
397 #define CONFIG_BOOTP_SUBNETMASK 0x00000001
398 #define CONFIG_BOOTP_GATEWAY 0x00000002
399 #define CONFIG_BOOTP_HOSTNAME 0x00000004
400 #define CONFIG_BOOTP_BOOTPATH 0x00000010
402 #endif /* CONFIG_CMD_NET */
404 /* Support for relocation */
405 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
406 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
407 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
408 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
409 CONFIG_SYS_INIT_RAM_SIZE - \
410 GENERATED_GBL_DATA_SIZE)
412 /* -----------------------------------------------------------------------------
414 * -----------------------------------------------------------------------------
416 #define CONFIG_SYS_NO_FLASH
418 /* Uncomment to define the board revision statically */
419 /* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */
421 /* -----------------------------------------------------------------------------
422 * Default environment
423 * -----------------------------------------------------------------------------
425 #define CONFIG_BOOTDELAY 10
426 #define CONFIG_BOOTFILE "uImage"
428 #define CONFIG_EXTRA_ENV_SETTINGS \
429 "loadaddr=0x82000000\0" \
432 "console=ttyO0,115200n8\0" \
433 "mmcargs=setenv bootargs console=${console} " \
434 "root=/dev/mmcblk0p2 rw " \
435 "rootfstype=ext3 rootwait\0" \
436 "nandargs=setenv bootargs console=${console} " \
437 "root=/dev/mtdblock4 rw " \
438 "rootfstype=jffs2\0" \
439 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
440 "bootscript=echo Running bootscript from mmc ...; " \
441 "source ${loadaddr}\0" \
442 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
443 "mmcboot=echo Booting from mmc ...; " \
445 "bootm ${loadaddr}\0" \
446 "nandboot=echo Booting from nand ...; " \
448 "onenand read ${loadaddr} 280000 400000; " \
449 "bootm ${loadaddr}\0" \
451 #define CONFIG_BOOTCOMMAND \
452 "if mmc rescan ${mmcdev}; then " \
453 "if run loadbootscript; then " \
456 "if run loaduimage; then " \
458 "else run nandboot; " \
461 "else run nandboot; fi"
463 #endif /* __OMAP3EVM_CONFIG_H */