2 * Configuration settings for the TI OMAP3 EVM board.
4 * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/
7 * Manikandan Pillai <mani.pillai@ti.com>
8 * Derived from Beagle Board and 3430 SDP code by
9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Syed Mohammed Khasim <khasim@ti.com>
12 * Manikandan Pillai <mani.pillai@ti.com>
14 * SPDX-License-Identifier: GPL-2.0+
17 #ifndef __OMAP3EVM_CONFIG_H
18 #define __OMAP3EVM_CONFIG_H
20 #include <asm/arch/cpu.h>
21 #include <asm/arch/omap.h>
23 /* ----------------------------------------------------------------------------
24 * Supported U-Boot features
25 * ----------------------------------------------------------------------------
27 #define CONFIG_SYS_LONGHELP
29 /* Allow to overwrite serial and ethaddr */
30 #define CONFIG_ENV_OVERWRITE
32 /* Add auto-completion support */
33 #define CONFIG_AUTO_COMPLETE
35 /* ----------------------------------------------------------------------------
37 * ----------------------------------------------------------------------------
41 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
42 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
44 /* Partition tables */
48 * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard
49 * Enable CONFIG_USB_MUSB_UDD for Device functionalities.
51 #define CONFIG_USB_OMAP3
52 #define CONFIG_USB_MUSB_HCD
53 /* #define CONFIG_USB_MUSB_UDC */
56 #define CONFIG_SPL_NAND_SIMPLE
57 #define CONFIG_SPL_NAND_BASE
58 #define CONFIG_SPL_NAND_DRIVERS
59 #define CONFIG_SPL_NAND_ECC
60 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
61 #define CONFIG_SYS_NAND_PAGE_COUNT 64
62 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
63 #define CONFIG_SYS_NAND_OOBSIZE 64
64 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
65 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
66 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
68 #define CONFIG_SYS_NAND_ECCSIZE 512
69 #define CONFIG_SYS_NAND_ECCBYTES 3
70 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
71 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
72 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
75 * High level configuration options
78 #define CONFIG_SDRC /* The chip has SDRC controller */
81 * Clock related definitions
83 #define V_OSCK 26000000 /* Clock output from T2 */
84 #define V_SCLK (V_OSCK >> 1)
87 * OMAP3 has 12 GP timers, they can be driven by the system clock
88 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
89 * This rate is divided by a local divisor.
91 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
92 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
94 /* Size of environment - 128KB */
95 #define CONFIG_ENV_SIZE (128 << 10)
97 /* Size of malloc pool */
98 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
101 * Physical Memory Map
102 * Note 1: CS1 may or may not be populated
103 * Note 2: SDRAM size is expected to be at least 32MB
105 #define CONFIG_NR_DRAM_BANKS 2
106 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
107 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
109 /* Limits for memtest */
110 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
111 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
112 0x01F00000) /* 31MB */
114 /* Default load address */
115 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
117 /* -----------------------------------------------------------------------------
119 * -----------------------------------------------------------------------------
123 * NS16550 Configuration
125 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
127 #define CONFIG_SYS_NS16550_SERIAL
128 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
129 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
132 * select serial console configuration
134 #define CONFIG_CONS_INDEX 1
135 #define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */
136 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
137 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
143 #define CONFIG_SYS_I2C
144 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000
145 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
146 #define CONFIG_SYS_I2C_OMAP24XX
151 /* Monitor at start of flash - Reserve 2 sectors */
152 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
154 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
156 /* Start location & size of environment */
157 #define ONENAND_ENV_OFFSET 0x260000
158 #define SMNAND_ENV_OFFSET 0x260000
160 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
165 /* Physical address to access NAND */
166 #define CONFIG_SYS_NAND_ADDR NAND_BASE
168 /* Physical address to access NAND at CS0 */
169 #define CONFIG_SYS_NAND_BASE NAND_BASE
171 /* Max number of NAND devices */
172 #define CONFIG_SYS_MAX_NAND_DEVICE 1
173 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
174 /* Timeout values (in ticks) */
175 #define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
176 #define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
178 /* Flash banks JFFS2 should use */
179 #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
180 CONFIG_SYS_MAX_NAND_DEVICE)
182 #define CONFIG_SYS_JFFS2_MEM_NAND
183 #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
184 #define CONFIG_SYS_JFFS2_NUM_BANKS 1
186 #define CONFIG_JFFS2_NAND
187 /* nand device jffs2 lives on */
188 #define CONFIG_JFFS2_DEV "nand0"
189 /* Start of jffs2 partition */
190 #define CONFIG_JFFS2_PART_OFFSET 0x680000
191 /* Size of jffs2 partition */
192 #define CONFIG_JFFS2_PART_SIZE 0xf980000
197 #ifdef CONFIG_USB_OMAP3
199 #ifdef CONFIG_USB_MUSB_HCD
201 #ifdef CONFIG_USB_KEYBOARD
202 #define CONFIG_SYS_USB_EVENT_POLL
203 #define CONFIG_PREBOOT "usb start"
204 #endif /* CONFIG_USB_KEYBOARD */
206 #endif /* CONFIG_USB_MUSB_HCD */
208 #ifdef CONFIG_USB_MUSB_UDC
209 /* USB device configuration */
210 #define CONFIG_USB_DEVICE
211 #define CONFIG_USB_TTY
213 /* Change these to suit your needs */
214 #define CONFIG_USBD_VENDORID 0x0451
215 #define CONFIG_USBD_PRODUCTID 0x5678
216 #define CONFIG_USBD_MANUFACTURER "Texas Instruments"
217 #define CONFIG_USBD_PRODUCT_NAME "EVM"
218 #endif /* CONFIG_USB_MUSB_UDC */
220 #endif /* CONFIG_USB_OMAP3 */
222 /* ----------------------------------------------------------------------------
224 * ----------------------------------------------------------------------------
226 #define CONFIG_SYS_MAXARGS 16 /* max args for a command */
228 #define CONFIG_MISC_INIT_R
230 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
231 #define CONFIG_SETUP_MEMORY_TAGS
232 #define CONFIG_INITRD_TAG
233 #define CONFIG_REVISION_TAG
235 /* Size of Console IO buffer */
236 #define CONFIG_SYS_CBSIZE 512
238 /* Size of print buffer */
239 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
240 sizeof(CONFIG_SYS_PROMPT) + 16)
242 /* Size of bootarg buffer */
243 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
245 #define CONFIG_BOOTFILE "uImage"
250 #if defined(CONFIG_CMD_NAND)
251 #define CONFIG_SYS_FLASH_BASE NAND_BASE
253 #define CONFIG_NAND_OMAP_GPMC
254 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
255 #elif defined(CONFIG_CMD_ONENAND)
256 #define CONFIG_SYS_FLASH_BASE ONENAND_MAP
257 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
260 #if !defined(CONFIG_ENV_IS_NOWHERE)
261 #if defined(CONFIG_CMD_NAND)
262 #elif defined(CONFIG_CMD_ONENAND)
263 #define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET
265 #endif /* CONFIG_ENV_IS_NOWHERE */
267 #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
269 #if defined(CONFIG_CMD_NET)
271 /* Ethernet (SMSC9115 from SMSC9118 family) */
272 #define CONFIG_SMC911X
273 #define CONFIG_SMC911X_32_BIT
274 #define CONFIG_SMC911X_BASE 0x2C000000
277 #define CONFIG_BOOTP_SUBNETMASK 0x00000001
278 #define CONFIG_BOOTP_GATEWAY 0x00000002
279 #define CONFIG_BOOTP_HOSTNAME 0x00000004
280 #define CONFIG_BOOTP_BOOTPATH 0x00000010
282 #endif /* CONFIG_CMD_NET */
284 /* Support for relocation */
285 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
286 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
287 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
288 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
289 CONFIG_SYS_INIT_RAM_SIZE - \
290 GENERATED_GBL_DATA_SIZE)
292 /* -----------------------------------------------------------------------------
294 * -----------------------------------------------------------------------------
297 /* Uncomment to define the board revision statically */
298 /* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */
300 /* Defines for SPL */
301 #define CONFIG_SPL_FRAMEWORK
302 #define CONFIG_SPL_TEXT_BASE 0x40200800
303 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
304 CONFIG_SPL_TEXT_BASE)
306 #define CONFIG_SPL_BSS_START_ADDR 0x80000000
307 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
309 #define CONFIG_SPL_OMAP3_ID_NAND
310 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
313 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
314 * 64 bytes before this address should be set aside for u-boot.img's
315 * header. That is 0x800FFFC0--0x80100000 should not be used for any
318 #define CONFIG_SYS_TEXT_BASE 0x80100000
319 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
320 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
322 /* -----------------------------------------------------------------------------
323 * Default environment
324 * -----------------------------------------------------------------------------
327 #define CONFIG_EXTRA_ENV_SETTINGS \
328 "loadaddr=0x82000000\0" \
331 "console=ttyO0,115200n8\0" \
332 "mmcargs=setenv bootargs console=${console} " \
333 "root=/dev/mmcblk0p2 rw " \
334 "rootfstype=ext3 rootwait\0" \
335 "nandargs=setenv bootargs console=${console} " \
336 "root=/dev/mtdblock4 rw " \
337 "rootfstype=jffs2\0" \
338 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
339 "bootscript=echo Running bootscript from mmc ...; " \
340 "source ${loadaddr}\0" \
341 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
342 "mmcboot=echo Booting from mmc ...; " \
344 "bootm ${loadaddr}\0" \
345 "nandboot=echo Booting from nand ...; " \
347 "onenand read ${loadaddr} 280000 400000; " \
348 "bootm ${loadaddr}\0" \
350 #define CONFIG_BOOTCOMMAND \
351 "mmc dev ${mmcdev}; if mmc rescan; then " \
352 "if run loadbootscript; then " \
355 "if run loaduimage; then " \
357 "else run nandboot; " \
360 "else run nandboot; fi"
362 #endif /* __OMAP3EVM_CONFIG_H */