2 * Configuration settings for the Gumstix Overo board.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * High Level Configuration Options
26 #define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */
27 #define CONFIG_OMAP 1 /* in a TI OMAP core */
28 #define CONFIG_OMAP34XX 1 /* which is a 34XX */
29 #define CONFIG_OMAP3430 1 /* which is in a 3430 */
30 #define CONFIG_OMAP3_OVERO 1 /* working with overo */
32 #define CONFIG_SDRC /* The chip has SDRC controller */
34 #include <asm/arch/cpu.h> /* get chip and board defs */
35 #include <asm/arch/omap3.h>
38 * Display CPU and Board information
40 #define CONFIG_DISPLAY_CPUINFO 1
41 #define CONFIG_DISPLAY_BOARDINFO 1
44 #define V_OSCK 26000000 /* Clock output from T2 */
45 #define V_SCLK (V_OSCK >> 1)
47 #undef CONFIG_USE_IRQ /* no support for IRQs */
48 #define CONFIG_MISC_INIT_R
50 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
51 #define CONFIG_SETUP_MEMORY_TAGS 1
52 #define CONFIG_INITRD_TAG 1
53 #define CONFIG_REVISION_TAG 1
55 #define CONFIG_OF_LIBFDT 1
58 * Size of malloc() pool
60 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
62 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
69 * NS16550 Configuration
71 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
73 #define CONFIG_SYS_NS16550
74 #define CONFIG_SYS_NS16550_SERIAL
75 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
76 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
79 * select serial console configuration
81 #define CONFIG_CONS_INDEX 3
82 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
83 #define CONFIG_SERIAL3 3
85 /* allow to overwrite serial and ethaddr */
86 #define CONFIG_ENV_OVERWRITE
87 #define CONFIG_BAUDRATE 115200
88 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
90 #define CONFIG_GENERIC_MMC 1
92 #define CONFIG_OMAP_HSMMC 1
93 #define CONFIG_DOS_PARTITION 1
95 /* DDR - I use Micron DDR */
96 #define CONFIG_OMAP3_MICRON_DDR 1
98 /* commands to include */
99 #include <config_cmd_default.h>
101 #define CONFIG_CMD_CACHE
102 #define CONFIG_CMD_EXT2 /* EXT2 Support */
103 #define CONFIG_CMD_FAT /* FAT support */
104 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */
106 #define CONFIG_CMD_I2C /* I2C serial bus support */
107 #define CONFIG_CMD_MMC /* MMC support */
108 #define CONFIG_CMD_NAND /* NAND support */
110 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
111 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
112 #undef CONFIG_CMD_IMI /* iminfo */
113 #undef CONFIG_CMD_IMLS /* List all found images */
114 #undef CONFIG_CMD_NFS /* NFS support */
115 #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
117 #define CONFIG_SYS_NO_FLASH
118 #define CONFIG_HARD_I2C 1
119 #define CONFIG_SYS_I2C_SPEED 100000
120 #define CONFIG_SYS_I2C_SLAVE 1
121 #define CONFIG_SYS_I2C_BUS 0
122 #define CONFIG_SYS_I2C_BUS_SELECT 1
123 #define CONFIG_I2C_MULTI_BUS 1
124 #define CONFIG_DRIVER_OMAP34XX_I2C 1
129 #define CONFIG_TWL4030_POWER 1
130 #define CONFIG_TWL4030_LED 1
135 #define CONFIG_SYS_NAND_QUIET_TEST 1
136 #define CONFIG_NAND_OMAP_GPMC
137 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
139 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
142 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1
144 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
146 #define CONFIG_JFFS2_NAND
147 /* nand device jffs2 lives on */
148 #define CONFIG_JFFS2_DEV "nand0"
149 /* start of jffs2 partition */
150 #define CONFIG_JFFS2_PART_OFFSET 0x680000
151 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
154 /* Environment information */
155 #define CONFIG_BOOTDELAY 5
157 #define CONFIG_EXTRA_ENV_SETTINGS \
158 "loadaddr=0x82000000\0" \
159 "console=ttyS2,115200n8\0" \
162 "dvimode=1024x768MR-16@60\0" \
163 "defaultdisplay=dvi\0" \
165 "mmcroot=/dev/mmcblk0p2 rw\0" \
166 "mmcrootfstype=ext3 rootwait\0" \
167 "nandroot=/dev/mtdblock4 rw\0" \
168 "nandrootfstype=jffs2\0" \
169 "mmcargs=setenv bootargs console=${console} " \
170 "mpurate=${mpurate} " \
172 "omapfb.mode=dvi:${dvimode} " \
174 "omapdss.def_disp=${defaultdisplay} " \
176 "rootfstype=${mmcrootfstype}\0" \
177 "nandargs=setenv bootargs console=${console} " \
178 "mpurate=${mpurate} " \
180 "omapfb.mode=dvi:${dvimode} " \
182 "omapdss.def_disp=${defaultdisplay} " \
183 "root=${nandroot} " \
184 "rootfstype=${nandrootfstype}\0" \
185 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
186 "bootscript=echo Running bootscript from mmc ...; " \
187 "source ${loadaddr}\0" \
188 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
189 "mmcboot=echo Booting from mmc ...; " \
191 "bootm ${loadaddr}\0" \
192 "nandboot=echo Booting from nand ...; " \
194 "nand read ${loadaddr} 280000 400000; " \
195 "bootm ${loadaddr}\0" \
197 #define CONFIG_BOOTCOMMAND \
198 "if mmc rescan ${mmcdev}; then " \
199 "if run loadbootscript; then " \
202 "if run loaduimage; then " \
204 "else run nandboot; " \
207 "else run nandboot; fi"
209 #define CONFIG_AUTO_COMPLETE 1
211 * Miscellaneous configurable options
213 #define CONFIG_SYS_LONGHELP /* undef to save memory */
214 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
215 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
216 #define CONFIG_SYS_PROMPT "Overo # "
217 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
218 /* Print Buffer Size */
219 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
220 sizeof(CONFIG_SYS_PROMPT) + 16)
221 #define CONFIG_SYS_MAXARGS 16 /* max number of command */
223 /* Boot Argument Buffer Size */
224 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
225 /* memtest works on */
226 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
227 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
228 0x01F00000) /* 31MB */
230 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
233 * OMAP3 has 12 GP timers, they can be driven by the system clock
234 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
235 * This rate is divided by a local divisor.
237 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
238 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
239 #define CONFIG_SYS_HZ 1000
241 /*-----------------------------------------------------------------------
244 * The stack sizes are set up in start.S using the settings below
246 #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
247 #ifdef CONFIG_USE_IRQ
248 #define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */
249 #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */
252 /*-----------------------------------------------------------------------
253 * Physical Memory Map
255 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
256 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
257 #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
258 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
260 /* SDRAM Bank Allocation method */
263 /*-----------------------------------------------------------------------
264 * FLASH and environment organization
267 /* **** PISMO SUPPORT *** */
269 /* Configure the PISMO */
270 #define PISMO1_NAND_SIZE GPMC_SIZE_128M
271 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M
273 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
275 #if defined(CONFIG_CMD_NAND)
276 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
279 /* Monitor at start of flash */
280 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
281 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
283 #define CONFIG_ENV_IS_IN_NAND 1
284 #define ONENAND_ENV_OFFSET 0x240000 /* environment starts here */
285 #define SMNAND_ENV_OFFSET 0x240000 /* environment starts here */
287 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
288 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
289 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
291 #if defined(CONFIG_CMD_NET)
292 /*----------------------------------------------------------------------------
293 * SMSC9211 Ethernet from SMSC9118 family
294 *----------------------------------------------------------------------------
297 #define CONFIG_NET_MULTI
298 #define CONFIG_SMC911X 1
299 #define CONFIG_SMC911X_32_BIT
300 #define CONFIG_SMC911X_BASE 0x2C000000
302 #endif /* (CONFIG_CMD_NET) */
304 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
305 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
306 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
307 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
308 CONFIG_SYS_INIT_RAM_SIZE - \
309 GENERATED_GBL_DATA_SIZE)
311 #endif /* __CONFIG_H */