2 * Palm LifeDrive configuration file
4 * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * High Level Board Configuration Options
28 #define CONFIG_PXA27X 1 /* Marvell PXA270 CPU */
29 #define CONFIG_PALMLD 1 /* Palm LifeDrive board */
32 * Environment settings
34 #define CONFIG_ENV_OVERWRITE
35 #define CONFIG_SYS_MALLOC_LEN (128*1024)
36 #define CONFIG_SYS_GBL_DATA_SIZE 128
38 #define CONFIG_BOOTCOMMAND \
39 "if mmcinfo && fatload mmc 0 0xa0000000 uboot.script ; then " \
40 "source 0xa0000000; " \
44 #define CONFIG_BOOTARGS "console=tty0 console=ttyS0,9600"
45 #define CONFIG_TIMESTAMP
46 #define CONFIG_BOOTDELAY 2 /* Autoboot delay */
47 #define CONFIG_CMDLINE_TAG
48 #define CONFIG_SETUP_MEMORY_TAGS
50 #define CONFIG_LZMA /* LZMA compression support */
53 * Serial Console Configuration
55 #define CONFIG_PXA_SERIAL
56 #define CONFIG_FFUART 1
57 #define CONFIG_BAUDRATE 9600
58 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
61 * Bootloader Components Configuration
63 #include <config_cmd_default.h>
66 #define CONFIG_CMD_ENV
67 #undef CONFIG_CMD_IMLS
68 #define CONFIG_CMD_MMC
69 #define CONFIG_CMD_IDE
73 * MMC Card Configuration
77 #define CONFIG_GENERIC_MMC
78 #define CONFIG_PXA_MMC_GENERIC
79 #define CONFIG_SYS_MMC_BASE 0xF0000000
80 #define CONFIG_CMD_FAT
81 #define CONFIG_CMD_EXT2
82 #define CONFIG_DOS_PARTITION
89 #define CONFIG_LQ038J7DH53
90 #define CONFIG_VIDEO_LOGO
91 #define CONFIG_CMD_BMP
92 #define CONFIG_SPLASH_SCREEN
93 #define CONFIG_SPLASH_SCREEN_ALIGN
94 #define CONFIG_VIDEO_BMP_GZIP
95 #define CONFIG_VIDEO_BMP_RLE8
96 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
102 #ifdef CONFIG_CMD_KGDB
103 #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */
104 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
108 * HUSH Shell Configuration
110 #define CONFIG_SYS_HUSH_PARSER 1
111 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
113 #define CONFIG_SYS_LONGHELP
114 #ifdef CONFIG_SYS_HUSH_PARSER
115 #define CONFIG_SYS_PROMPT "$ "
117 #define CONFIG_SYS_PROMPT "=> "
119 #define CONFIG_SYS_CBSIZE 256
120 #define CONFIG_SYS_PBSIZE \
121 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
122 #define CONFIG_SYS_MAXARGS 16
123 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
124 #define CONFIG_SYS_DEVICE_NULLDEV 1
127 * Clock Configuration
129 #undef CONFIG_SYS_CLKS_IN_HZ
130 #define CONFIG_SYS_HZ 3250000 /* Timer @ 3250000 Hz */
131 #define CONFIG_SYS_CPUSPEED 0x210 /* 416MHz ; N=2,L=16 */
136 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
137 #ifdef CONFIG_USE_IRQ
138 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
139 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
145 #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
146 #define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
147 #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
149 #define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */
150 #define CONFIG_SYS_DRAM_SIZE 0x02000000 /* 32 MB DRAM */
152 #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
153 #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
155 #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_DRAM_BASE
157 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
158 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
163 #ifdef CONFIG_CMD_FLASH
164 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
165 #define PHYS_FLASH_SIZE 0x00080000 /* 512 KB */
166 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
168 #define CONFIG_SYS_FLASH_CFI
169 #define CONFIG_FLASH_CFI_DRIVER 1
171 #define CONFIG_FLASH_CFI_LEGACY
172 #define CONFIG_SYS_FLASH_LEGACY_512Kx16
174 #define CONFIG_SYS_MONITOR_BASE 0
175 #define CONFIG_SYS_MONITOR_LEN 0x40000
177 #define CONFIG_SYS_MAX_FLASH_BANKS 1
178 #define CONFIG_SYS_MAX_FLASH_SECT 256
180 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
182 #define CONFIG_SYS_FLASH_ERASE_TOUT (25*CONFIG_SYS_HZ)
183 #define CONFIG_SYS_FLASH_WRITE_TOUT (25*CONFIG_SYS_HZ)
184 #define CONFIG_SYS_FLASH_LOCK_TOUT (25*CONFIG_SYS_HZ)
185 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (25*CONFIG_SYS_HZ)
186 #define CONFIG_SYS_FLASH_PROTECTION
188 #define CONFIG_ENV_IS_IN_FLASH 1
189 #define CONFIG_ENV_SECT_SIZE 0x10000
191 #define CONFIG_SYS_NO_FLASH
192 #define CONFIG_ENV_IS_NOWHERE
195 #define CONFIG_ENV_ADDR 0x40000
196 #define CONFIG_ENV_SIZE 0x4000
201 #ifdef CONFIG_CMD_IDE
203 #undef CONFIG_IDE_LED
204 #undef CONFIG_IDE_RESET
208 #define CONFIG_SYS_IDE_MAXBUS 1
209 #define CONFIG_SYS_IDE_MAXDEVICE 1
211 #define CONFIG_SYS_ATA_BASE_ADDR 0x20000000
212 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0
214 #define CONFIG_SYS_ATA_DATA_OFFSET 0x10
215 #define CONFIG_SYS_ATA_REG_OFFSET 0x10
216 #define CONFIG_SYS_ATA_ALT_OFFSET 0x10
218 #define CONFIG_SYS_ATA_STRIDE 1
224 #define CONFIG_SYS_GAFR0_L_VAL 0x00000000
225 #define CONFIG_SYS_GAFR0_U_VAL 0xa5180012
226 #define CONFIG_SYS_GAFR1_L_VAL 0x69988056
227 #define CONFIG_SYS_GAFR1_U_VAL 0xaaa580aa
228 #define CONFIG_SYS_GAFR2_L_VAL 0x6aaaaaaa
229 #define CONFIG_SYS_GAFR2_U_VAL 0x01040001
230 #define CONFIG_SYS_GAFR3_L_VAL 0x540a950c
231 #define CONFIG_SYS_GAFR3_U_VAL 0x00000009
232 #define CONFIG_SYS_GPCR0_VAL 0x00000000
233 #define CONFIG_SYS_GPCR1_VAL 0x00000000
234 #define CONFIG_SYS_GPCR2_VAL 0x00000000
235 #define CONFIG_SYS_GPCR3_VAL 0x00000000
236 #define CONFIG_SYS_GPDR0_VAL 0xc26b0000
237 #define CONFIG_SYS_GPDR1_VAL 0xfcdfaa93
238 #define CONFIG_SYS_GPDR2_VAL 0x7bbaffff
239 #define CONFIG_SYS_GPDR3_VAL 0x006ff38d
240 #define CONFIG_SYS_GPSR0_VAL 0x0d9e45ee
241 #define CONFIG_SYS_GPSR1_VAL 0x03affdae
242 #define CONFIG_SYS_GPSR2_VAL 0x07554000
243 #define CONFIG_SYS_GPSR3_VAL 0x01bc0785
245 #define CONFIG_SYS_PSSR_VAL 0x30
250 #define CONFIG_SYS_CKEN 0x01ffffff
251 #define CONFIG_SYS_CCCR 0x02000210
256 #define CONFIG_SYS_MSC0_VAL 0x7ff844c8
257 #define CONFIG_SYS_MSC1_VAL 0x7ff86ab4
258 #define CONFIG_SYS_MSC2_VAL 0x7ff87ff8
259 #define CONFIG_SYS_MDCNFG_VAL 0x0B880acd
260 #define CONFIG_SYS_MDREFR_VAL 0x201fa031
261 #define CONFIG_SYS_MDMRS_VAL 0x00320032
262 #define CONFIG_SYS_FLYCNFG_VAL 0x00000000
263 #define CONFIG_SYS_SXCNFG_VAL 0x40044004
266 * PCMCIA and CF Interfaces
268 #define CONFIG_SYS_MECR_VAL 0x00000003
269 #define CONFIG_SYS_MCMEM0_VAL 0x0001c391
270 #define CONFIG_SYS_MCMEM1_VAL 0x0001c391
271 #define CONFIG_SYS_MCATT0_VAL 0x0001c391
272 #define CONFIG_SYS_MCATT1_VAL 0x0001c391
273 #define CONFIG_SYS_MCIO0_VAL 0x00014611
274 #define CONFIG_SYS_MCIO1_VAL 0x0001c391
276 #endif /* __CONFIG_H */