2 * Copyright (C) 2009, Ilya Yanok, Emcraft Systems, <yanok@emcraft.com>
4 * Configuration settings for the Dave/DENX QongEVB-LITE board.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <asm/arch/mx31-regs.h>
27 /* High Level Configuration Options */
28 #define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
29 #define CONFIG_MX31 1 /* in a mx31 */
31 #define CONFIG_MX31_HCLK_FREQ 26000000 /* 26MHz */
32 #define CONFIG_MX31_CLK32 32768
34 #define CONFIG_DISPLAY_CPUINFO
35 #define CONFIG_DISPLAY_BOARDINFO
37 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
38 #define CONFIG_SETUP_MEMORY_TAGS 1
39 #define CONFIG_INITRD_TAG 1
42 * Size of malloc() pool
44 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
45 /* size in bytes reserved for initial data */
46 #define CONFIG_SYS_GBL_DATA_SIZE 128
52 #define CONFIG_MXC_UART 1
53 #define CONFIG_SYS_MX31_UART1 1
55 #define CONFIG_MXC_GPIO
57 #define CONFIG_MXC_SPI
58 #define CONFIG_DEFAULT_SPI_BUS 1
59 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
60 #define CONFIG_RTC_MC13783
62 #define CONFIG_FSL_PMIC
63 #define CONFIG_FSL_PMIC_BUS 1
64 #define CONFIG_FSL_PMIC_CS 0
65 #define CONFIG_FSL_PMIC_CLK 100000
66 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
70 #define CONFIG_QONG_FPGA 1
71 #define CONFIG_FPGA_BASE (CS1_BASE)
72 #define CONFIG_FPGA_LATTICE
73 #define CONFIG_FPGA_COUNT 1
75 #ifdef CONFIG_QONG_FPGA
78 #define CONFIG_DNET_BASE (CS1_BASE + QONG_FPGA_PERIPH_SIZE)
79 #define CONFIG_NET_MULTI 1
81 /* Framebuffer and LCD */
83 #define CONFIG_VIDEO_MX3
84 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
85 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
86 #define LCD_BPP LCD_COLOR16
87 #define CONFIG_SPLASH_SCREEN
88 #define CONFIG_CMD_BMP
89 #define CONFIG_BMP_16BPP
90 #define CONFIG_DISPLAY_COM57H5M10XRC
93 #define CONFIG_CMD_USB
95 #define CONFIG_USB_EHCI /* Enable EHCI USB support */
96 #define CONFIG_USB_EHCI_MXC
97 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
98 #define CONFIG_MXC_USB_PORT 2
99 #define CONFIG_MXC_USB_PORTSC (MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT)
100 #define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED
101 #define CONFIG_EHCI_IS_TDI
102 #define CONFIG_USB_STORAGE
103 #define CONFIG_DOS_PARTITION
104 #define CONFIG_SUPPORT_VFAT
105 #define CONFIG_CMD_FAT
106 #endif /* CONFIG_CMD_USB */
109 * Reducing the ARP timeout from default 5 seconds to 200ms we speed up the
110 * initial TFTP transfer, should the user wish one, significantly.
112 #define CONFIG_ARP_TIMEOUT 200UL
114 #endif /* CONFIG_QONG_FPGA */
116 #define CONFIG_CONS_INDEX 1
117 #define CONFIG_BAUDRATE 115200
118 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
120 /***********************************************************
122 ***********************************************************/
124 #include <config_cmd_default.h>
126 #define CONFIG_CMD_CACHE
127 #define CONFIG_CMD_PING
128 #define CONFIG_CMD_DHCP
129 #define CONFIG_CMD_NET
130 #define CONFIG_CMD_MII
131 #define CONFIG_CMD_NAND
132 #define CONFIG_CMD_SPI
133 #define CONFIG_CMD_DATE
134 #define BOARD_LATE_INIT
137 * You can compile in a MAC address and your custom net settings by using
138 * the following syntax.
140 * #define CONFIG_ETHADDR xx:xx:xx:xx:xx:xx
141 * #define CONFIG_SERVERIP <server ip>
142 * #define CONFIG_IPADDR <board ip>
143 * #define CONFIG_GATEWAYIP <gateway ip>
144 * #define CONFIG_NETMASK <your netmask>
147 #define CONFIG_BOOTDELAY 5
149 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
151 #define xstr(s) str(s)
154 #define CONFIG_EXTRA_ENV_SETTINGS \
156 "nfsargs=setenv bootargs root=/dev/nfs rw " \
157 "nfsroot=${serverip}:${rootpath}\0" \
158 "ramargs=setenv bootargs root=/dev/ram rw\0" \
159 "addip=setenv bootargs ${bootargs} " \
160 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
161 ":${hostname}:${netdev}:off panic=1\0" \
162 "addtty=setenv bootargs ${bootargs}" \
163 " console=ttymxc0,${baudrate}\0" \
164 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
165 "addmisc=setenv bootargs ${bootargs}\0" \
166 "uboot_addr=A0000000\0" \
167 "kernel_addr=A00A0000\0" \
168 "ramdisk_addr=A0300000\0" \
169 "u-boot=qong/u-boot.bin\0" \
170 "kernel_addr_r=80800000\0" \
172 "bootfile=qong/uImage\0" \
173 "rootpath=/opt/eldk-4.2-arm/armVFP\0" \
174 "flash_self=run ramargs addip addtty addmtd addmisc;" \
175 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
176 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
177 "bootm ${kernel_addr}\0" \
178 "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
179 "run nfsargs addip addtty addmtd addmisc;" \
181 "bootcmd=run flash_self\0" \
182 "load=tftp ${loadaddr} ${u-boot}\0" \
183 "update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) \
184 " +${filesize};era " xstr(CONFIG_SYS_MONITOR_BASE) \
185 " +${filesize};cp.b ${fileaddr} " \
186 xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \
187 "upd=run load update\0" \
190 * Miscellaneous configurable options
192 #define CONFIG_SYS_LONGHELP /* undef to save memory */
193 #define CONFIG_SYS_PROMPT "=> "
194 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
195 /* Print Buffer Size */
196 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
197 sizeof(CONFIG_SYS_PROMPT) + 16)
198 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
199 /* Boot Argument Buffer Size */
200 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
202 /* memtest works on first 255MB of RAM */
203 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
204 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0xff000000)
206 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
208 #define CONFIG_SYS_HZ 1000
210 #define CONFIG_CMDLINE_EDITING 1
211 #define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
212 #ifdef CONFIG_SYS_HUSH_PARSER
213 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
216 #define CONFIG_MISC_INIT_R 1
217 /*-----------------------------------------------------------------------
220 * The stack sizes are set up in start.S using the settings below
222 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
224 /*-----------------------------------------------------------------------
225 * Physical Memory Map
227 #define CONFIG_NR_DRAM_BANKS 1
228 #define PHYS_SDRAM_1 CSD0_BASE
229 #define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
236 extern void qong_nand_plat_init(void *chip);
237 extern int qong_nand_rdy(void *chip);
239 #define CONFIG_NAND_PLAT
240 #define CONFIG_SYS_MAX_NAND_DEVICE 1
241 #define CONFIG_SYS_NAND_BASE CS3_BASE
242 #define NAND_PLAT_INIT() qong_nand_plat_init(nand)
244 #define QONG_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 24))
245 #define QONG_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 23))
246 #define QONG_NAND_WRITE(addr, cmd) \
248 __REG8(addr) = cmd; \
251 #define NAND_PLAT_WRITE_CMD(chip, cmd) QONG_NAND_WRITE(QONG_NAND_CLE(chip), cmd)
252 #define NAND_PLAT_WRITE_ADR(chip, cmd) QONG_NAND_WRITE(QONG_NAND_ALE(chip), cmd)
253 #define NAND_PLAT_DEV_READY(chip) (qong_nand_rdy(chip))
255 /*-----------------------------------------------------------------------
256 * FLASH and environment organization
258 #define CONFIG_SYS_FLASH_BASE CS0_BASE
259 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
260 /* max number of sectors on one chip */
261 #define CONFIG_SYS_MAX_FLASH_SECT 1024
262 /* Monitor at beginning of flash */
263 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
264 #define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256KiB */
266 #define CONFIG_ENV_IS_IN_FLASH 1
267 #define CONFIG_ENV_SECT_SIZE 0x20000
268 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
269 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x80000)
271 /* Address and size of Redundant Environment Sector */
272 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
273 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
275 /*-----------------------------------------------------------------------
276 * CFI FLASH driver setup
278 /* Flash memory is CFI compliant */
279 #define CONFIG_SYS_FLASH_CFI 1
280 /* Use drivers/cfi_flash.c */
281 #define CONFIG_FLASH_CFI_DRIVER 1
282 /* Use buffered writes (~10x faster) */
283 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
284 /* Use hardware sector protection */
285 #define CONFIG_SYS_FLASH_PROTECTION 1
290 #define CONFIG_CMD_JFFS2
291 #define CONFIG_CMD_UBI
292 #define CONFIG_CMD_UBIFS
293 #define CONFIG_RBTREE
294 #define CONFIG_MTD_PARTITIONS
295 #define CONFIG_CMD_MTDPARTS
297 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
298 #define CONFIG_FLASH_CFI_MTD
299 #define MTDIDS_DEFAULT "nor0=physmap-flash.0"
300 #define MTDPARTS_DEFAULT \
301 "mtdparts=physmap-flash.0:384k(U-Boot),128k(env1)," \
302 "128k(env2),2432k(kernel),13m(ramdisk),-(user)"
304 /* additions for new relocation code, must added to all boards */
305 #undef CONFIG_SYS_ARM_WITHOUT_RELOC /* This board is tested with relocation support */
306 #define CONFIG_SYS_SDRAM_BASE 0x80000000
307 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
308 #define CONFIG_SYS_INIT_RAM_END IRAM_SIZE
309 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
310 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)
312 #define CONFIG_BOARD_EARLY_INIT_F 1
314 #endif /* __CONFIG_H */