2 * Configuation settings for the Renesas Solutions r0p7734 board
4 * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
6 * SPDX-License-Identifier: GPL-2.0+
13 #define CONFIG_CPU_SH7734 1
14 #define CONFIG_R0P7734 1
15 #define CONFIG_400MHZ_MODE 1
16 /* #define CONFIG_533MHZ_MODE 1 */
18 #define CONFIG_BOARD_LATE_INIT
19 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000
21 #define CONFIG_CMD_MII
22 #define CONFIG_CMD_SDRAM
23 #define CONFIG_CMD_ENV
25 #define CONFIG_BAUDRATE 115200
26 #define CONFIG_BOOTDELAY 3
27 #define CONFIG_BOOTARGS "console=ttySC3,115200"
29 #define CONFIG_VERSION_VARIABLE
30 #undef CONFIG_SHOW_BOOT_PROGRESS
33 #define CONFIG_SH_ETHER 1
34 #define CONFIG_SH_ETHER_USE_PORT (0)
35 #define CONFIG_SH_ETHER_PHY_ADDR (0x0)
37 #define CONFIG_PHY_SMSC 1
38 #define CONFIG_BITBANGMII
39 #define CONFIG_BITBANGMII_MULTI
40 #define CONFIG_SH_ETHER_SH7734_MII (0x00) /* MII */
41 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
42 #ifndef CONFIG_SH_ETHER
43 # define CONFIG_SMC911X
44 # define CONFIG_SMC911X_16_BIT
45 # define CONFIG_SMC911X_BASE (0x84000000)
49 #define CONFIG_SH_SH7734_I2C 1
50 #define CONFIG_HARD_I2C 1
51 #define CONFIG_I2C_MULTI_BUS 1
52 #define CONFIG_SYS_MAX_I2C_BUS 2
53 #define CONFIG_SYS_I2C_MODULE 0
54 #define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
55 #define CONFIG_SYS_I2C_SLAVE 0x50
56 #define CONFIG_SH_I2C_DATA_HIGH 4
57 #define CONFIG_SH_I2C_DATA_LOW 5
58 #define CONFIG_SH_I2C_CLOCK 500000000
59 #define CONFIG_SH_I2C_BASE0 0xFFC70000
60 #define CONFIG_SH_I2C_BASE1 0xFFC7100
62 /* undef to save memory */
63 #define CONFIG_SYS_LONGHELP
64 /* Monitor Command Prompt */
65 /* Buffer size for input from the Console */
66 #define CONFIG_SYS_CBSIZE 256
67 /* Buffer size for Console output */
68 #define CONFIG_SYS_PBSIZE 256
69 /* max args accepted for monitor commands */
70 #define CONFIG_SYS_MAXARGS 16
71 /* Buffer size for Boot Arguments passed to kernel */
72 #define CONFIG_SYS_BARGSIZE 512
73 /* List of legal baudrate settings for this board */
74 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
77 #define CONFIG_SCIF_CONSOLE 1
79 #define CONFIG_CONS_SCIF3 1
81 /* Suppress display of console information at boot */
82 #undef CONFIG_SYS_CONSOLE_INFO_QUIET
83 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
84 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
87 #define CONFIG_SYS_SDRAM_BASE (0x88000000)
88 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024)
89 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
91 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
92 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 100 * 1024 * 1024)
93 /* Enable alternate, more extensive, memory test */
94 #undef CONFIG_SYS_ALT_MEMTEST
95 /* Scratch address used by the alternate memory test */
96 #undef CONFIG_SYS_MEMTEST_SCRATCH
98 /* Enable temporary baudrate change while serial download */
99 #undef CONFIG_SYS_LOADS_BAUD_CHANGE
102 #define CONFIG_FLASH_CFI_DRIVER 1
103 #define CONFIG_SYS_FLASH_CFI
104 #undef CONFIG_SYS_FLASH_QUIET_TEST
105 #define CONFIG_SYS_FLASH_EMPTY_INFO
106 #define CONFIG_SYS_FLASH_BASE (0xA0000000)
107 #define CONFIG_SYS_MAX_FLASH_SECT 512
109 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */
110 #define CONFIG_SYS_MAX_FLASH_BANKS 1
111 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
113 /* Timeout for Flash erase operations (in ms) */
114 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
115 /* Timeout for Flash write operations (in ms) */
116 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
117 /* Timeout for Flash set sector lock bit operations (in ms) */
118 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
119 /* Timeout for Flash clear lock bit operations (in ms) */
120 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
123 * Use hardware flash sectors protection instead
124 * of U-Boot software protection
126 #undef CONFIG_SYS_FLASH_PROTECTION
127 #undef CONFIG_SYS_DIRECT_FLASH_TFTP
129 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
130 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
132 #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
133 /* Size of DRAM reserved for malloc() use */
134 #define CONFIG_SYS_MALLOC_LEN (256 * 1024)
135 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
138 #define CONFIG_ENV_IS_IN_FLASH
139 #define CONFIG_ENV_OVERWRITE 1
140 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
141 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
142 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
143 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
144 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
145 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
148 #if defined(CONFIG_400MHZ_MODE)
149 #define CONFIG_SYS_CLK_FREQ 50000000
151 #define CONFIG_SYS_CLK_FREQ 44444444
153 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
154 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
155 #define CONFIG_SYS_TMU_CLK_DIV 4
157 #endif /* __R0P7734_H */