2 * (C) Copyright 2015 Rockchip Electronics Co., Ltd
4 * SPDX-License-Identifier: GPL-2.0+
6 #ifndef __CONFIG_RK3036_COMMON_H
7 #define __CONFIG_RK3036_COMMON_H
9 #include <asm/arch/hardware.h>
10 #include "rockchip-common.h"
12 #define CONFIG_NR_DRAM_BANKS 1
13 #define CONFIG_SYS_MALLOC_LEN (32 << 20)
14 #define CONFIG_SYS_CBSIZE 1024
15 #define CONFIG_SKIP_LOWLEVEL_INIT
17 #define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
18 #define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */
19 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
21 #define CONFIG_SYS_INIT_SP_ADDR 0x60100000
22 #define CONFIG_SYS_LOAD_ADDR 0x60800800
23 #define CONFIG_SPL_STACK 0x10081fff
24 #define CONFIG_SPL_TEXT_BASE 0x10081000
26 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (4 << 10)
27 #define CONFIG_ROCKCHIP_CHIP_TAG "RK30"
30 #define CONFIG_BOUNCE_BUFFER
32 #define CONFIG_SYS_SDRAM_BASE 0x60000000
33 #define CONFIG_NR_DRAM_BANKS 1
34 #define SDRAM_BANK_SIZE (512UL << 20UL)
35 #define SDRAM_MAX_SIZE (CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE)
37 #define CONFIG_SPI_FLASH
39 #define CONFIG_SPI_FLASH_GIGADEVICE
40 #define CONFIG_SF_DEFAULT_SPEED 20000000
42 #ifndef CONFIG_SPL_BUILD
45 /* usb mass storage */
46 #define CONFIG_CMD_USB_MASS_STORAGE
49 #define ENV_MEM_LAYOUT_SETTINGS \
50 "scriptaddr=0x60000000\0" \
51 "pxefile_addr_r=0x60100000\0" \
52 "fdt_addr_r=0x61f00000\0" \
53 "kernel_addr_r=0x62000000\0" \
54 "ramdisk_addr_r=0x64000000\0"
56 #include <config_distro_bootcmd.h>
58 /* Linux fails to load the fdt if it's loaded above 512M on a evb-rk3036 board,
59 * so limit the fdt reallocation to that */
60 #define CONFIG_EXTRA_ENV_SETTINGS \
61 "fdt_high=0x7fffffff\0" \
62 "partitions=" PARTS_DEFAULT \
63 ENV_MEM_LAYOUT_SETTINGS \
67 #define CONFIG_PREBOOT