2 * (C) Copyright 2015-2016 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
6 * Configuration settings for the Freescale S32V234 EVB board.
12 #ifndef CONFIG_SPL_BUILD
13 #include <config_distro_defaults.h>
16 #include <asm/arch/imx-regs.h>
18 #define CONFIG_S32V234
21 #define CONFIG_DISPLAY_BOARDINFO
25 #define GICD_BASE 0x7D001000
26 #define GICC_BASE 0x7D002000
28 #define CONFIG_REMAKE_ELF
29 #undef CONFIG_RUN_FROM_IRAM_ONLY
31 #define CONFIG_RUN_FROM_DDR1
32 #undef CONFIG_RUN_FROM_DDR0
34 /* Run by default from DDR1 */
35 #ifdef CONFIG_RUN_FROM_DDR0
36 #define DDR_BASE_ADDR 0x80000000
38 #define DDR_BASE_ADDR 0xC0000000
41 #define CONFIG_MACH_TYPE 4146
43 #define CONFIG_SKIP_LOWLEVEL_INIT
46 #define CONFIG_CMD_CACHE
48 #define CONFIG_SYS_FULL_VA
50 /* Enable passing of ATAGs */
51 #define CONFIG_CMDLINE_TAG
53 /* SMP Spin Table Definitions */
54 #define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
56 /* Generic Timer Definitions */
57 #define COUNTER_FREQUENCY (1000000000) /* 1000MHz */
58 #define CONFIG_SYS_FSL_ERRATUM_A008585
60 /* Size of malloc() pool */
61 #ifdef CONFIG_RUN_FROM_IRAM_ONLY
62 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1 * 1024 * 1024)
64 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
66 #define CONFIG_BOARD_EARLY_INIT_F
68 #define CONFIG_DM_SERIAL
69 #define CONFIG_FSL_LINFLEXUART
70 #define LINFLEXUART_BASE LINFLEXD0_BASE_ADDR
72 #define CONFIG_DEBUG_UART_LINFLEXUART
73 #define CONFIG_DEBUG_UART_BASE LINFLEXUART_BASE
75 /* Allow to overwrite serial and ethaddr */
76 #define CONFIG_ENV_OVERWRITE
77 #define CONFIG_SYS_UART_PORT (1)
78 #define CONFIG_BAUDRATE 115200
80 #undef CONFIG_CMD_IMLS
83 #define CONFIG_FSL_ESDHC
84 #define CONFIG_FSL_USDHC
85 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC_BASE_ADDR
86 #define CONFIG_SYS_FSL_ESDHC_NUM 1
88 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111
90 #define CONFIG_CMD_MMC
91 #define CONFIG_GENERIC_MMC
92 /* #define CONFIG_CMD_EXT2 EXT2 Support */
93 #define CONFIG_CMD_FAT /* FAT support */
94 #define CONFIG_DOS_PARTITION
99 #define CONFIG_CMD_PING
100 #define CONFIG_CMD_DHCP
101 #define CONFIG_CMD_MII
102 #define CONFIG_FEC_MXC
104 #define IMX_FEC_BASE ENET_BASE_ADDR
105 #define CONFIG_FEC_XCV_TYPE RMII
106 #define CONFIG_FEC_MXC_PHYADDR 0
107 #define CONFIG_PHYLIB
108 #define CONFIG_PHY_MICREL
111 #if 0 /* Disable until the I2C driver will be updated */
114 #define CONFIG_CMD_I2C
115 #define CONFIG_HARD_I2C
116 #define CONFIG_I2C_MXC
117 #define CONFIG_SYS_I2C_BASE I2C0_BASE_ADDR
118 #define CONFIG_SYS_I2C_SPEED 100000
121 #if 0 /* Disable until the FLASH will be implemented */
122 #define CONFIG_SYS_USE_NAND
125 #ifdef CONFIG_SYS_USE_NAND
126 /* Nand Flash Configs */
127 #define CONFIG_CMD_NAND
128 #define CONFIG_JFFS2_NAND
129 #define MTD_NAND_FSL_NFC_SWECC 1
130 #define CONFIG_NAND_FSL_NFC
131 #define CONFIG_SYS_NAND_BASE 0x400E0000
132 #define CONFIG_SYS_MAX_NAND_DEVICE 1
133 #define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE
134 #define CONFIG_SYS_NAND_SELECT_DEVICE
135 #define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
138 #define CONFIG_CMD_DHCP
140 #define CONFIG_LOADADDR 0xC307FFC0
141 #define CONFIG_BOOTARGS "console=ttyLF0 root=/dev/ram rw"
143 #define CONFIG_CMD_ENV
144 #define CONFIG_EXTRA_ENV_SETTINGS \
145 "boot_scripts=boot.scr.uimg boot.scr\0" \
146 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
147 "console=ttyLF0,115200\0" \
148 "fdt_file=s32v234-evb.dtb\0" \
149 "fdt_high=0xffffffff\0" \
150 "initrd_high=0xffffffff\0" \
151 "fdt_addr_r=0xC2000000\0" \
152 "kernel_addr_r=0xC307FFC0\0" \
153 "ramdisk_addr_r=0xC4000000\0" \
154 "ramdisk=rootfs.uimg\0"\
156 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
157 "update_sd_firmware_filename=u-boot.imx\0" \
158 "update_sd_firmware=" \
159 "if test ${ip_dyn} = yes; then " \
160 "setenv get_cmd dhcp; " \
162 "setenv get_cmd tftp; " \
164 "if mmc dev ${mmcdev}; then " \
165 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
166 "setexpr fw_sz ${filesize} / 0x200; " \
167 "setexpr fw_sz ${fw_sz} + 1; " \
168 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
171 "loadramdisk=fatload mmc ${mmcdev}:${mmcpart} ${ramdisk_addr} ${ramdisk}\0" \
172 "jtagboot=echo Booting using jtag...; " \
173 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
174 "jtagsdboot=echo Booting loading Linux with ramdisk from SD...; " \
175 "run loaduimage; run loadramdisk; run loadfdt;"\
176 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
177 "boot_net_usb_start=true\0" \
180 #define BOOT_TARGET_DEVICES(func) \
185 #define CONFIG_BOOTCOMMAND \
188 #include <config_distro_bootcmd.h>
190 /* Miscellaneous configurable options */
191 #define CONFIG_SYS_LONGHELP /* undef to save memory */
192 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
193 #define CONFIG_SYS_PROMPT "=> "
194 #undef CONFIG_AUTO_COMPLETE
195 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
196 #define CONFIG_SYS_PBSIZE \
197 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
198 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
199 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
200 #define CONFIG_CMDLINE_EDITING
202 #define CONFIG_CMD_MEMTEST
203 #define CONFIG_SYS_MEMTEST_START (DDR_BASE_ADDR)
204 #define CONFIG_SYS_MEMTEST_END (DDR_BASE_ADDR + 0x7C00000)
206 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
207 #define CONFIG_SYS_HZ 1000
209 #define CONFIG_SYS_TEXT_BASE 0x3E800000 /* SDRAM */
211 #ifdef CONFIG_RUN_FROM_IRAM_ONLY
212 #define CONFIG_SYS_MALLOC_BASE (DDR_BASE_ADDR)
217 * The stack sizes are set up in start.S using the settings below
219 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
223 #define CONFIG_CMD_PXE
224 #define CONFIG_BOOTP_PXE
225 #define CONFIG_BOOTP_PXE_CLIENTARCH 0x100
228 /* Physical memory map */
229 /* EVB board has 2x256 MB DDR chips, DDR0 and DDR1, u-boot is using just one */
230 #define CONFIG_NR_DRAM_BANKS 1
231 #define PHYS_SDRAM (DDR_BASE_ADDR)
232 #define PHYS_SDRAM_SIZE (256 * 1024 * 1024)
234 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
235 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
236 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
238 #define CONFIG_SYS_INIT_SP_OFFSET \
239 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
240 #define CONFIG_SYS_INIT_SP_ADDR \
241 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
243 /* FLASH and environment organization */
244 #define CONFIG_SYS_NO_FLASH
246 #define CONFIG_ENV_SIZE (8 * 1024)
247 #define CONFIG_ENV_IS_IN_MMC
249 #define CONFIG_ENV_OFFSET (12 * 64 * 1024)
250 #define CONFIG_SYS_MMC_ENV_DEV 0
253 #define CONFIG_BOOTP_BOOTFILESIZE
254 #define CONFIG_BOOTP_BOOTPATH
255 #define CONFIG_BOOTP_GATEWAY
256 #define CONFIG_BOOTP_HOSTNAME