2 * Copyright (C) 2015 Marek Vasut <marex@denx.de>
4 * SPDX-License-Identifier: GPL-2.0+
6 #ifndef __CONFIG_SAMTEC_VINING_FPGA_H__
7 #define __CONFIG_SAMTEC_VINING_FPGA_H__
9 #include <asm/arch/base_addr_ac5.h>
12 #define CONFIG_FAT_WRITE
13 #define CONFIG_HW_WATCHDOG
15 /* Memory configurations */
16 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on VINING_FPGA */
19 #define CONFIG_BOOTFILE "openwrt-socfpga-socfpga_cyclone5_vining_fpga-fit-uImage.itb"
20 #define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
21 #define CONFIG_BOOTCOMMAND "run selboot"
22 #define CONFIG_LOADADDR 0x01000000
23 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
26 #ifdef CONFIG_CMD_EEPROM
27 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
28 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
29 #define CONFIG_SYS_I2C_EEPROM_BUS 0
30 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
31 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
42 /* Ethernet on SoC (EMAC) */
43 #if defined(CONFIG_CMD_NET)
44 #define CONFIG_BOOTP_SEND_HOSTNAME
46 #define CONFIG_PHY_MICREL
47 #define CONFIG_PHY_MICREL_KSZ9021
50 /* Extra Environment */
51 #define CONFIG_HOSTNAME socfpga_vining_fpga
54 * Active LOW GPIO buttons:
55 * A: GPIO 77 ... the button between USB B and ethernet
56 * B: GPIO 78 ... the button between USB A ports
59 * if button B is not pressed, boot normal Linux system immediatelly
60 * if button B is pressed, wait $bootdelay and boot recovery system
62 #define CONFIG_PREBOOT \
63 "setenv hostname vining-${unit_serial} ; " \
64 "setenv PS1 \"${unit_ident} (${unit_serial}) => \" ; " \
65 "if gpio input 78 ; then " \
66 "setenv bootdelay 10 ; " \
67 "setenv boottype rcvr ; " \
69 "setenv bootdelay 5 ; " \
70 "setenv boottype norm ; " \
73 #define CONFIG_EXTRA_ENV_SETTINGS \
77 "bootscript=boot.scr\0" \
80 "ubipart=ubi0:rootfs\0" \
81 "ubisfcs=1\0" /* Default is flash at CS#1 */ \
83 "hostname=vining_fpga\0" \
84 "kernel_addr_r=0x10000000\0" \
85 "mtdparts_0=ff705000.spi.0:" \
91 "-(rcvrfs)\0" /* Recovery */ \
92 "mtdparts_1=ff705000.spi.1:" \
95 "update_filename=u-boot-with-spl-dtb.sfp\0" \
96 "update_qspi_offset=0x0\0" \
97 "update_qspi=" /* Update the QSPI firmware */ \
98 "if sf probe ; then " \
99 "if tftp ${update_filename} ; then " \
100 "sf update ${loadaddr} ${update_qspi_offset} ${filesize} ; " \
103 "fpga_filename=output_file.rbf\0" \
104 "load_fpga=" /* Load FPGA bitstream */ \
105 "if tftp ${fpga_filename} ; then " \
106 "fpga load 0 $loadaddr $filesize ; " \
110 "setenv bootargs ${bootargs} " \
111 "console=${consdev},${baudrate}\0" \
113 "setenv bootargs ${bootargs} " \
114 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
115 "${netmask}:${hostname}:${netdev}:off\0" \
117 "setenv bootargs ${bootargs} ${miscargs}\0" \
119 "setenv mtdparts \"${mtdparts_0};${mtdparts_1}\" ; " \
120 "setenv bootargs ${bootargs} mtdparts=${mtdparts}\0" \
121 "addargs=run addcons addmtd addmisc\0" \
123 "ubi part ${ubimtd} ; ubifsmount ${ubipart} ; " \
124 "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \
126 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
127 "miscargs=nohlt panic=1\0" \
129 "setenv bootargs ubi.mtd=${ubimtdnr} " \
130 "root=${ubipart} rootfstype=ubifs\0" \
132 "setenv bootargs root=/dev/nfs rw " \
133 "nfsroot=${serverip}:${rootpath},v3,tcp\0" \
135 "if test \"${boottype}\" = \"rcvr\" ; then " \
136 "setenv ubisfcs 0 ; " \
137 "setenv ubimtd rcvrfs ; " \
138 "setenv ubimtdnr 5 ; " \
139 "setenv mtdparts mtdparts=${mtdparts_0} ; " \
140 "setenv mtdids nor0=ff705000.spi.0 ; " \
141 "setenv ubipart ubi0:rootfs ; " \
143 "setenv ubisfcs 1 ; " \
144 "setenv ubimtd rootfs ; " \
145 "setenv ubimtdnr 6 ; " \
146 "setenv mtdparts mtdparts=${mtdparts_1} ; " \
147 "setenv mtdids nor0=ff705000.spi.1 ; " \
148 "setenv ubipart ubi0:rootfs ; " \
150 "sf probe 0:${ubisfcs}\0" \
152 "run ubi_sfsel ubiload ubiargs addargs ; " \
153 "bootm ${kernel_addr_r}\0" \
155 "run ubiload nfsargs addip addargs ; " \
156 "bootm ${kernel_addr_r}\0" \
158 "run netload ubiargs addargs ; " \
159 "bootm ${kernel_addr_r}\0" \
161 "run netload nfsargs addip addargs ; " \
162 "bootm ${kernel_addr_r}\0" \
163 "selboot=" /* Select from where to boot. */ \
164 "if test \"${bootmode}\" = \"qspi\" ; then " \
166 "if test \"${boottype}\" = \"rcvr\" ; then " \
167 "echo \"Booting recovery system\" ; " \
168 "led 3 on ; " /* Bottom RED */ \
170 "led 1 on ; " /* Top RED */ \
172 "else echo \"Unsupported boot mode: \"${bootmode} ; " \
175 #define CONFIG_CMD_UBIFS
176 #define CONFIG_RBTREE
178 #define MTDPARTS_DEFAULT \
179 "mtdparts=ff705000.spi.0:" \
185 "-(rcvrfs);" /* Recovery */ \
187 #define CONFIG_ENV_IS_IN_SPI_FLASH
188 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
189 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
190 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
191 #define CONFIG_ENV_OFFSET 0x100000
192 #define CONFIG_ENV_OFFSET_REDUND \
193 (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
195 #define CONFIG_MISC_INIT_R
197 /* Support changing the prompt string */
198 #define CONFIG_CMDLINE_PS_SUPPORT
200 /* The rest of the configuration is shared */
201 #include <configs/socfpga_common.h>
203 #endif /* __CONFIG_SAMTEC_VINING_FPGA_H__ */