git.sur5r.net Git - u-boot/blob - include/configs/tbs2910.h

   1 /*
   2  * Copyright (C) 2014 Soeren Moch <smoch@web.de>
   3  *
   4  * Configuration settings for the TBS2910 MatrixARM board.
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __TBS2910_CONFIG_H
  10 #define __TBS2910_CONFIG_H
  11
  12 #include "mx6_common.h"
  13
  14 /* General configuration */
  15 #define CONFIG_SYS_THUMB_BUILD
  16
  17 #define CONFIG_MACH_TYPE                3980
  18
  19 #define CONFIG_BOARD_EARLY_INIT_F
  20
  21 #define CONFIG_SYS_PROMPT               "Matrix U-Boot> "
  22 #define CONFIG_SYS_HZ                   1000
  23
  24 /* Physical Memory Map */
  25 #define CONFIG_NR_DRAM_BANKS            1
  26 #define CONFIG_SYS_SDRAM_BASE           MMDC0_ARB_BASE_ADDR
  27
  28 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
  29 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
  30 #define CONFIG_SYS_INIT_SP_OFFSET \
  31         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  32 #define CONFIG_SYS_INIT_SP_ADDR \
  33         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  34
  35 #define CONFIG_SYS_MALLOC_LEN           (128 * 1024 * 1024)
  36
  37 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
  38 #define CONFIG_SYS_MEMTEST_END \
  39         (CONFIG_SYS_MEMTEST_START + 500 * 1024 * 1024)
  40
  41 #define CONFIG_SYS_BOOTMAPSZ            0x6C000000
  42
  43 /* Serial console */
  44 #define CONFIG_MXC_UART
  45 #define CONFIG_MXC_UART_BASE            UART1_BASE /* select UART1/UART2 */
  46 #define CONFIG_BAUDRATE                 115200
  47
  48 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
  49 #define CONFIG_CONSOLE_MUX
  50 #define CONFIG_CONS_INDEX               1
  51
  52 /* *** Command definition *** */
  53 #define CONFIG_CMD_BMODE
  54 #define CONFIG_CMD_MEMTEST
  55 #define CONFIG_CMD_TIME
  56
  57 /* Filesystems / image support */
  58 #define CONFIG_EFI_PARTITION
  59 #define CONFIG_FIT
  60
  61 /* MMC */
  62 #define CONFIG_SYS_FSL_USDHC_NUM        3
  63 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC4_BASE_ADDR
  64 #define CONFIG_SUPPORT_EMMC_BOOT
  65
  66 /* Ethernet */
  67 #define CONFIG_FEC_MXC
  68 #define CONFIG_CMD_PING
  69 #define CONFIG_CMD_DHCP
  70 #define CONFIG_CMD_MII
  71 #define CONFIG_FEC_MXC
  72 #define CONFIG_MII
  73 #define IMX_FEC_BASE                    ENET_BASE_ADDR
  74 #define CONFIG_FEC_XCV_TYPE             RGMII
  75 #define CONFIG_ETHPRIME                 "FEC"
  76 #define CONFIG_FEC_MXC_PHYADDR          4
  77 #define CONFIG_PHYLIB
  78 #define CONFIG_PHY_ATHEROS
  79
  80 /* Framebuffer */
  81 #define CONFIG_VIDEO
  82 #ifdef CONFIG_VIDEO
  83 #define CONFIG_VIDEO_IPUV3
  84 #define CONFIG_IPUV3_CLK                260000000
  85 #define CONFIG_CFB_CONSOLE
  86 #define CONFIG_CFB_CONSOLE_ANSI
  87 #define CONFIG_VIDEO_SW_CURSOR
  88 #define CONFIG_VGA_AS_SINGLE_DEVICE
  89 #define CONFIG_VIDEO_BMP_RLE8
  90 #define CONFIG_IMX_HDMI
  91 #define CONFIG_IMX_VIDEO_SKIP
  92 #define CONFIG_CMD_HDMIDETECT
  93 #endif
  94
  95 /* PCI */
  96 #define CONFIG_CMD_PCI
  97 #ifdef CONFIG_CMD_PCI
  98 #define CONFIG_PCI
  99 #define CONFIG_PCI_PNP
 100 #define CONFIG_PCI_SCAN_SHOW
 101 #define CONFIG_PCIE_IMX
 102 #define CONFIG_PCIE_IMX_PERST_GPIO      IMX_GPIO_NR(7, 12)
 103 #endif
 104
 105 /* SATA */
 106 #define CONFIG_CMD_SATA
 107 #ifdef CONFIG_CMD_SATA
 108 #define CONFIG_DWC_AHSATA
 109 #define CONFIG_SYS_SATA_MAX_DEVICE      1
 110 #define CONFIG_DWC_AHSATA_PORT_ID       0
 111 #define CONFIG_DWC_AHSATA_BASE_ADDR     SATA_ARB_BASE_ADDR
 112 #define CONFIG_LBA48
 113 #define CONFIG_LIBATA
 114 #endif
 115
 116 /* USB */
 117 #define CONFIG_CMD_USB
 118 #ifdef CONFIG_CMD_USB
 119 #define CONFIG_USB_EHCI
 120 #define CONFIG_USB_EHCI_MX6
 121 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
 122 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 123 #define CONFIG_MXC_USB_PORTSC           (PORT_PTS_UTMI | PORT_PTS_PTW)
 124 #define CONFIG_USB_STORAGE
 125 #define CONFIG_CMD_USB_MASS_STORAGE
 126 #ifdef CONFIG_CMD_USB_MASS_STORAGE
 127 #define CONFIG_CI_UDC
 128 #define CONFIG_USBD_HS
 129 #define CONFIG_USB_GADGET
 130 #define CONFIG_USB_GADGET_MASS_STORAGE
 131 #define CONFIG_USB_GADGET_DUALSPEED
 132 #define CONFIG_USB_GADGET_VBUS_DRAW     0
 133 #define CONFIG_USBDOWNLOAD_GADGET
 134 #define CONFIG_G_DNL_VENDOR_NUM         0x0525
 135 #define CONFIG_G_DNL_PRODUCT_NUM        0xa4a5
 136 #define CONFIG_G_DNL_MANUFACTURER       "TBS"
 137 #endif /* CONFIG_CMD_USB_MASS_STORAGE */
 138 #define CONFIG_USB_KEYBOARD
 139 #ifdef CONFIG_USB_KEYBOARD
 140 #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
 141 #define CONFIG_SYS_STDIO_DEREGISTER
 142 #define CONFIG_PREBOOT \
 143         "if hdmidet; then " \
 144                 "usb start; " \
 145                 "run set_con_usb_hdmi; " \
 146         "else " \
 147                 "run set_con_serial; " \
 148         "fi;"
 149 #endif /* CONFIG_USB_KEYBOARD */
 150 #endif /* CONFIG_CMD_USB      */
 151
 152 /* RTC */
 153 #define CONFIG_CMD_DATE
 154 #ifdef CONFIG_CMD_DATE
 155 #define CONFIG_CMD_I2C
 156 #define CONFIG_RTC_DS1307
 157 #define CONFIG_SYS_RTC_BUS_NUM          2
 158 #endif
 159
 160 /* I2C */
 161 #define CONFIG_CMD_I2C
 162 #ifdef CONFIG_CMD_I2C
 163 #define CONFIG_SYS_I2C
 164 #define CONFIG_SYS_I2C_MXC
 165 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
 166 #define CONFIG_SYS_I2C_SPEED            100000
 167 #define CONFIG_I2C_EDID
 168 #endif
 169
 170 /* Fuses */
 171 #define CONFIG_CMD_FUSE
 172 #ifdef CONFIG_CMD_FUSE
 173 #define CONFIG_MXC_OCOTP
 174 #endif
 175
 176 /* Environment organization */
 177 #define CONFIG_ENV_IS_IN_MMC
 178 #define CONFIG_SYS_MMC_ENV_DEV          2
 179 #define CONFIG_SYS_MMC_ENV_PART         1
 180 #define CONFIG_ENV_SIZE                 (8 * 1024)
 181 #define CONFIG_ENV_OFFSET               (384 * 1024)
 182 #define CONFIG_ENV_OVERWRITE
 183
 184 #define CONFIG_EXTRA_ENV_SETTINGS \
 185         "bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \
 186         "bootargs_mmc2=video=mxcfb0:dev=hdmi,1920x1080M@60 " \
 187                         "video=mxcfb1:off video=mxcfb2:off fbmem=28M\0" \
 188         "bootargs_mmc3=root=/dev/mmcblk0p1 rootwait consoleblank=0 quiet\0" \
 189         "bootargs_mmc=setenv bootargs ${bootargs_mmc1} ${bootargs_mmc2} " \
 190                         "${bootargs_mmc3}\0" \
 191         "bootargs_upd=setenv bootargs console=ttymxc0,115200 " \
 192                         "rdinit=/sbin/init enable_wait_mode=off\0" \
 193         "bootcmd_mmc=run bootargs_mmc; mmc dev 2; " \
 194                         "mmc read 0x10800000 0x800 0x4000; bootm\0" \
 195         "bootcmd_up1=load mmc 1 0x10800000 uImage\0" \
 196         "bootcmd_up2=load mmc 1 0x10d00000 uramdisk.img; " \
 197                         "run bootargs_upd; " \
 198                         "bootm 0x10800000 0x10d00000\0" \
 199         "console=ttymxc0\0" \
 200         "fan=gpio set 92\0" \
 201         "set_con_serial=setenv stdin serial; " \
 202                         "setenv stdout serial; " \
 203                         "setenv stderr serial;\0" \
 204         "set_con_usb_hdmi=setenv stdin serial,usbkbd; " \
 205                         "setenv stdout serial,vga; " \
 206                         "setenv stderr serial,vga;\0"
 207
 208 #define CONFIG_BOOTCOMMAND \
 209         "mmc rescan; " \
 210         "if run bootcmd_up1; then " \
 211                 "run bootcmd_up2; " \
 212         "else " \
 213                 "run bootcmd_mmc; " \
 214         "fi"
 215
 216 #endif                         /* __TBS2910_CONFIG_H * */