git.sur5r.net Git - u-boot/blob - include/configs/thunderx_88xx.h

   1 /**
   2  * (C) Copyright 2014, Cavium Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5 **/
   6
   7 #ifndef __THUNDERX_88XX_H__
   8 #define __THUNDERX_88XX_H__
   9
  10 #define CONFIG_REMAKE_ELF
  11
  12 #define CONFIG_THUNDERX
  13
  14 #define CONFIG_SYS_64BIT
  15
  16 #define CONFIG_SYS_NO_FLASH
  17
  18
  19 #define CONFIG_IDENT_STRING     \
  20         " for Cavium Thunder CN88XX ARM v8 Multi-Core"
  21 #define CONFIG_BOOTP_VCI_STRING         "Diagnostics"
  22
  23 #define MEM_BASE                        0x00500000
  24
  25 #define CONFIG_SYS_FULL_VA
  26
  27 #define CONFIG_SYS_LOWMEM_BASE          MEM_BASE
  28
  29 #define CONFIG_SYS_MEM_MAP              {{0x000000000000UL, 0x40000000000UL, \
  30                                           PTE_BLOCK_MEMTYPE(MT_NORMAL) |     \
  31                                           PTE_BLOCK_NON_SHARE},      \
  32                                          {0x800000000000UL, 0x40000000000UL, \
  33                                           PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | \
  34                                           PTE_BLOCK_NON_SHARE},      \
  35                                          {0x840000000000UL, 0x40000000000UL, \
  36                                           PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | \
  37                                           PTE_BLOCK_NON_SHARE},      \
  38                                         }
  39
  40 #define CONFIG_SYS_MEM_MAP_SIZE         3
  41
  42 #define CONFIG_SYS_VA_BITS              48
  43 #define CONFIG_SYS_PTL2_BITS            42
  44 #define CONFIG_SYS_BLOCK_SHIFT          29
  45 #define CONFIG_SYS_PTL1_ENTRIES         64
  46 #define CONFIG_SYS_PTL2_ENTRIES         8192
  47
  48 #define CONFIG_SYS_PGTABLE_SIZE         \
  49         ((CONFIG_SYS_PTL1_ENTRIES + \
  50           CONFIG_SYS_MEM_MAP_SIZE * CONFIG_SYS_PTL2_ENTRIES) * 8)
  51
  52 /* Link Definitions */
  53 #define CONFIG_SYS_TEXT_BASE            0x00500000
  54 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
  55
  56 /* SMP Spin Table Definitions */
  57 #define CPU_RELEASE_ADDR                (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
  58
  59
  60 /* Generic Timer Definitions */
  61 #define COUNTER_FREQUENCY               (0x1800000)     /* 24MHz */
  62
  63
  64 #define CONFIG_SYS_MEMTEST_START        MEM_BASE
  65 #define CONFIG_SYS_MEMTEST_END          (MEM_BASE + PHYS_SDRAM_1_SIZE)
  66
  67 /* Size of malloc() pool */
  68 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1024 * 1024)
  69
  70 /* PL011 Serial Configuration */
  71
  72 #define CONFIG_PL01X_SERIAL
  73 #define CONFIG_PL011_CLOCK              24000000
  74 #define CONFIG_CONS_INDEX               1
  75
  76 /* Generic Interrupt Controller Definitions */
  77 #define GICD_BASE                       (0x801000000000)
  78 #define GICR_BASE                       (0x801000002000)
  79 #define CONFIG_SYS_SERIAL0              0x87e024000000
  80 #define CONFIG_SYS_SERIAL1              0x87e025000000
  81
  82 #define CONFIG_BAUDRATE                 115200
  83
  84 /* Command line configuration */
  85 #define CONFIG_MENU
  86
  87 /* BOOTP options */
  88 #define CONFIG_BOOTP_BOOTFILESIZE
  89 #define CONFIG_BOOTP_BOOTPATH
  90 #define CONFIG_BOOTP_GATEWAY
  91 #define CONFIG_BOOTP_HOSTNAME
  92 #define CONFIG_BOOTP_PXE
  93 #define CONFIG_BOOTP_PXE_CLIENTARCH     0x100
  94
  95 /* Miscellaneous configurable options */
  96 #define CONFIG_SYS_LOAD_ADDR            (MEM_BASE)
  97
  98 /* Physical Memory Map */
  99 #define CONFIG_NR_DRAM_BANKS            1
 100 #define PHYS_SDRAM_1                    (MEM_BASE)        /* SDRAM Bank #1 */
 101 #define PHYS_SDRAM_1_SIZE               (0x80000000-MEM_BASE)   /* 2048 MB */
 102 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 103
 104 /* Initial environment variables */
 105 #define UBOOT_IMG_HEAD_SIZE             0x40
 106 /* C80000 - 0x40 */
 107 #define CONFIG_EXTRA_ENV_SETTINGS       \
 108                                         "kernel_addr=08007ffc0\0"       \
 109                                         "fdt_addr=0x94C00000\0"         \
 110                                         "fdt_high=0x9fffffff\0"
 111
 112 #define CONFIG_BOOTARGS                 \
 113                                         "console=ttyAMA0,115200n8 " \
 114                                         "earlycon=pl011,0x87e024000000 " \
 115                                         "debug maxcpus=48 rootwait rw "\
 116                                         "root=/dev/sda2 coherent_pool=16M"
 117 #define CONFIG_BOOTDELAY                5
 118
 119 /* Do not preserve environment */
 120 #define CONFIG_ENV_IS_NOWHERE           1
 121 #define CONFIG_ENV_SIZE                 0x1000
 122
 123 /* Monitor Command Prompt */
 124 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 125 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 126                                          sizeof(CONFIG_SYS_PROMPT) + 16)
 127 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 128 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 129 #define CONFIG_SYS_LONGHELP
 130 #define CONFIG_CMDLINE_EDITING          1
 131 #define CONFIG_SYS_MAXARGS              64              /* max command args */
 132 #define CONFIG_NO_RELOCATION            1
 133 #define CONFIG_LIB_RAND
 134 #define PLL_REF_CLK                     50000000        /* 50 MHz */
 135 #define NS_PER_REF_CLK_TICK             (1000000000/PLL_REF_CLK)
 136
 137 #endif /* __THUNDERX_88XX_H__ */