2 * (C) Copyright 2002-2003
3 * Gary Jennejohn <gj@denx.de>
5 * Configuation settings for the TRAB board.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #ifdef CONFIG_OLD_VERSION /* Old configuration: */
30 #define CONFIG_RAM_16MB /* 16 MB SDRAM */
32 #define CONFIG_FLASH_8MB /* 8 MB Flash */
35 * If we are developing, we might want to start armboot from ram
36 * so we MUST NOT initialize critical regs like mem-timing ...
38 #define CONFIG_INIT_CRITICAL /* undef for developing */
41 * High Level Configuration Options
44 #define CONFIG_ARM920T 1 /* This is an arm920t CPU */
45 #define CONFIG_S3C2400 1 /* in a SAMSUNG S3C2400 SoC */
46 #define CONFIG_TRAB 1 /* on a TRAB Board */
47 #undef CONFIG_TRAB_50MHZ /* run the CPU at 50 MHz */
48 #define LITTLEENDIAN 1 /* used by usb_ohci.c */
50 /* automatic software updates (see board/trab/auto_update.c) */
51 #define CONFIG_AUTO_UPDATE 1
53 /* input clock of PLL */
54 #define CONFIG_SYS_CLK_FREQ 12000000 /* TRAB has 12 MHz input clock */
56 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
58 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
59 #define CONFIG_SETUP_MEMORY_TAGS 1
60 #define CONFIG_INITRD_TAG 1
62 #define CFG_DEVICE_NULLDEV 1 /* enble null device */
63 #define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
65 /***********************************************************
67 * the TRAB is equipped with an ATMEL 24C04 EEPROM at
68 * address 0x54 with 8bit addressing
69 ***********************************************************/
70 #define CONFIG_HARD_I2C /* I2C with hardware support */
71 #define CFG_I2C_SPEED 100000 /* I2C speed */
72 #define CFG_I2C_SLAVE 0x7F /* I2C slave addr */
74 #define CFG_I2C_EEPROM_ADDR 0x54 /* EEPROM address */
75 #define CFG_I2C_EEPROM_ADDR_LEN 1 /* 1 address byte */
77 #define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x01
78 #define CFG_EEPROM_PAGE_WRITE_BITS 3 /* 8 bytes page write mode on 24C04 */
79 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
82 #define CONFIG_USB_OHCI 1
83 #define CONFIG_USB_STORAGE 1
84 #define CONFIG_DOS_PARTITION 1
87 * Size of malloc() pool
89 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
94 #define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
95 #define CS8900_BASE 0x07000300 /* agrees with WIN CE PA */
96 #define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
98 #define CONFIG_DRIVER_S3C24X0_I2C 1 /* we use the buildin I2C controller */
100 #define CONFIG_VFD 1 /* VFD linear frame buffer driver */
101 #define VFD_TEST_LOGO 1 /* output a test logo to the VFDs */
104 * select serial console configuration
106 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on TRAB */
108 #define CONFIG_HWFLOW /* include RTS/CTS flow control support */
110 #define CONFIG_MODEM_SUPPORT 1 /* enable modem initialization stuff */
112 #define CONFIG_MODEM_KEY_MAGIC "23" /* hold down these keys to enable modem */
115 * The following enables modem debugging stuff. The dbg() and
116 * 'char screen[1024]' are used for debug printfs. Unfortunately,
117 * it is usable only from BDI
119 #undef CONFIG_MODEM_SUPPORT_DEBUG
121 /* allow to overwrite serial and ethaddr */
122 #define CONFIG_ENV_OVERWRITE
124 #define CONFIG_BAUDRATE 115200
126 #define CONFIG_TIMESTAMP 1 /* Print timestamp info for images */
128 /* Use s3c2400's RTC */
129 #define CONFIG_RTC_S3C24X0 1
132 #define CONFIG_COMMANDS_ADD_HWFLOW CFG_CMD_HWFLOW
134 #define CONFIG_COMMANDS_ADD_HWFLOW 0
138 #define CONFIG_COMMANDS_ADD_VFD CFG_CMD_VFD
140 #define CONFIG_COMMANDS_ADD_VFD 0
143 #ifdef CONFIG_DRIVER_S3C24X0_I2C
144 #define CONFIG_COMMANDS_ADD_EEPROM CFG_CMD_EEPROM
145 #define CONFIG_COMMANDS_I2C CFG_CMD_I2C
147 #define CONFIG_COMMANDS_ADD_EEPROM 0
148 #define CONFIG_COMMANDS_I2C 0
152 #define CONFIG_COMMANDS ((CONFIG_CMD_DFL & ~CFG_CMD_CACHE) | \
155 CONFIG_COMMANDS_ADD_HWFLOW | \
156 CONFIG_COMMANDS_ADD_VFD | \
157 CONFIG_COMMANDS_ADD_EEPROM | \
160 CONFIG_COMMANDS_I2C )
162 #define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
165 CONFIG_COMMANDS_ADD_HWFLOW | \
166 CONFIG_COMMANDS_ADD_VFD | \
167 CONFIG_COMMANDS_ADD_EEPROM | \
170 CONFIG_COMMANDS_I2C )
174 #define CFG_HUSH_PARSER 1 /* use "hush" command parser */
176 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
177 #include <cmd_confdefs.h>
179 #define CONFIG_BOOTDELAY 5
180 #define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */
181 #define CONFIG_PREBOOT "echo;echo *** booting ***;echo"
182 #define CONFIG_BOOTARGS "console=ttyS0"
183 #define CONFIG_NETMASK 255.255.0.0
184 #define CONFIG_IPADDR 192.168.3.68
185 #define CONFIG_HOSTNAME trab
186 #define CONFIG_SERVERIP 192.168.3.1
187 #define CONFIG_BOOTCOMMAND "burn_in"
189 #ifndef CONFIG_FLASH_8MB /* current config: 16 MB flash */
190 #ifdef CFG_HUSH_PARSER
191 #define CONFIG_EXTRA_ENV_SETTINGS \
192 "nfs_args=setenv bootargs root=/dev/nfs rw " \
193 "nfsroot=$serverip:$rootpath\0" \
194 "rootpath=/opt/eldk/arm_920TDI\0" \
195 "ram_args=setenv bootargs root=/dev/ram rw\0" \
196 "add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
197 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
198 "add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
199 "u-boot=/tftpboot/TRAB/u-boot.bin\0" \
200 "load=tftp C100000 ${u-boot}\0" \
201 "update=protect off 0 5FFFF;era 0 5FFFF;" \
202 "cp.b C100000 0 $filesize\0" \
203 "loadfile=/tftpboot/TRAB/uImage\0" \
204 "loadaddr=c400000\0" \
205 "net_load=tftpboot $loadaddr $loadfile\0" \
206 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
207 "kernel_addr=00060000\0" \
208 "flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
210 "mdm_init2=ATS0=1\0" \
211 "mdm_flow_control=rts/cts\0"
212 #else /* !CFG_HUSH_PARSER */
213 #define CONFIG_EXTRA_ENV_SETTINGS \
214 "nfs_args=setenv bootargs root=/dev/nfs rw " \
215 "nfsroot=$(serverip):$(rootpath)\0" \
216 "rootpath=/opt/eldk/arm_920TDI\0" \
217 "ram_args=setenv bootargs root=/dev/ram rw\0" \
218 "add_net=setenv bootargs $(bootargs) ethaddr=$(ethaddr) " \
219 "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off\0" \
220 "add_misc=setenv bootargs $(bootargs) console=ttyS0 panic=1\0" \
221 "u-boot=/tftpboot/TRAB/u-boot.bin\0" \
222 "load=tftp C100000 $(u-boot)\0" \
223 "update=protect off 0 5FFFF;era 0 5FFFF;" \
224 "cp.b C100000 0 $(filesize)\0" \
225 "loadfile=/tftpboot/TRAB/uImage\0" \
226 "loadaddr=c400000\0" \
227 "net_load=tftpboot $(loadaddr) $(loadfile)\0" \
228 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
229 "kernel_addr=000C0000\0" \
230 "flash_nfs=run nfs_args add_net add_misc;bootm $(kernel_addr)\0" \
232 "mdm_init2=ATS0=1\0" \
233 "mdm_flow_control=rts/cts\0"
234 #endif /* CFG_HUSH_PARSER */
235 #else /* CONFIG_FLASH_8MB => 8 MB flash */
236 #ifdef CFG_HUSH_PARSER
237 #define CONFIG_EXTRA_ENV_SETTINGS \
238 "nfs_args=setenv bootargs root=/dev/nfs rw " \
239 "nfsroot=$serverip:$rootpath\0" \
240 "rootpath=/opt/eldk/arm_920TDI\0" \
241 "ram_args=setenv bootargs root=/dev/ram rw\0" \
242 "add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
243 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
244 "add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
245 "u-boot=/tftpboot/TRAB/u-boot.bin-old\0" \
246 "load=tftp C100000 ${u-boot}\0" \
247 "update=protect off 0 3FFFF;era 0 3FFFF;" \
248 "cp.b C100000 0 $filesize;" \
249 "setenv filesize;saveenv\0" \
250 "loadfile=/tftpboot/TRAB/uImage\0" \
251 "loadaddr=C400000\0" \
252 "net_load=tftpboot $loadaddr $loadfile\0" \
253 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
254 "kernel_addr=000C0000\0" \
255 "flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
257 "mdm_init2=ATS0=1\0" \
258 "mdm_flow_control=rts/cts\0"
259 #else /* !CFG_HUSH_PARSER */
260 #define CONFIG_EXTRA_ENV_SETTINGS \
261 "nfs_args=setenv bootargs root=/dev/nfs rw " \
262 "nfsroot=$(serverip):$(rootpath)\0" \
263 "rootpath=/opt/eldk/arm_920TDI\0" \
264 "ram_args=setenv bootargs root=/dev/ram rw\0" \
265 "add_net=setenv bootargs $(bootargs) ethaddr=$(ethaddr) " \
266 "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off\0" \
267 "add_misc=setenv bootargs $(bootargs) console=ttyS0 panic=1\0" \
268 "u-boot=/tftpboot/TRAB/u-boot.bin-old\0" \
269 "load=tftp C100000 $(u-boot)\0" \
270 "update=protect off 0 3FFFF;era 0 3FFFF;" \
271 "cp.b C100000 0 $(filesize);" \
272 "setenv filesize;saveenv\0" \
273 "loadfile=/tftpboot/TRAB/uImage\0" \
274 "loadaddr=C400000\0" \
275 "net_load=tftpboot $(loadaddr) $(loadfile)\0" \
276 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
277 "kernel_addr=000C0000\0" \
278 "flash_nfs=run nfs_args add_net add_misc;bootm $(kernel_addr)\0" \
280 "mdm_init2=ATS0=1\0" \
281 "mdm_flow_control=rts/cts\0"
282 #endif /* CFG_HUSH_PARSER */
283 #endif /* CONFIG_FLASH_8MB */
285 #if 0 /* disabled for development */
286 #define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
287 #define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d sec...\n"
288 #define CONFIG_AUTOBOOT_DELAY_STR "system" /* 1st password */
291 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
292 #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
293 /* what's this ? it's not used anywhere */
294 #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
298 * Miscellaneous configurable options
300 #define CFG_LONGHELP /* undef to save memory */
301 #define CFG_PROMPT "TRAB # " /* Monitor Command Prompt */
302 #ifdef CFG_HUSH_PARSER
303 #define CFG_PROMPT_HUSH_PS2 "> "
306 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
307 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
308 #define CFG_MAXARGS 16 /* max number of command args */
309 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
311 #define CFG_MEMTEST_START 0x0C000000 /* memtest works on */
312 #define CFG_MEMTEST_END 0x0D000000 /* 16 MB in DRAM */
314 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
316 #define CFG_LOAD_ADDR 0x0CF00000 /* default load address */
318 #ifdef CONFIG_TRAB_50MHZ
319 /* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
320 /* it to wrap 100 times (total 1562500) to get 1 sec. */
321 /* this should _really_ be calculated !! */
322 #define CFG_HZ 1562500
324 /* the PWM TImer 4 uses a counter of 10390 for 10 ms, so we need */
325 /* it to wrap 100 times (total 1039000) to get 1 sec. */
326 /* this should _really_ be calculated !! */
327 #define CFG_HZ 1039000
330 /* valid baudrates */
331 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
333 #define CONFIG_MISC_INIT_R /* have misc_init_r() function */
335 /*-----------------------------------------------------------------------
336 * burn-in test stuff.
338 * BURN_IN_CYCLE_DELAY defines the seconds to wait between each burn-in cycle
339 * Because the burn-in test itself causes also an delay of about 4 seconds,
340 * this time must be subtracted from the desired overall burn-in cycle time.
342 #define BURN_IN_CYCLE_DELAY 296 /* seconds between burn-in cycles */
344 /*-----------------------------------------------------------------------
347 * The stack sizes are set up in start.S using the settings below
349 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
350 #ifdef CONFIG_USE_IRQ
351 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
352 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
355 /*-----------------------------------------------------------------------
356 * Physical Memory Map
358 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
359 #define PHYS_SDRAM_1 0x0C000000 /* SDRAM Bank #1 */
360 #ifndef CONFIG_RAM_16MB
361 #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
363 #define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
366 #define CFG_FLASH_BASE 0x00000000 /* Flash Bank #1 */
368 /* The following #defines are needed to get flash environment right */
369 #define CFG_MONITOR_BASE CFG_FLASH_BASE
370 #define CFG_MONITOR_LEN (256 << 10)
372 /*-----------------------------------------------------------------------
373 * FLASH and environment organization
375 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
376 #ifndef CONFIG_FLASH_8MB
377 #define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
379 #define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
382 /* timeout values are in ticks */
383 #define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
384 #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
386 #define CFG_ENV_IS_IN_FLASH 1
388 /* Address and size of Primary Environment Sector */
389 #ifndef CONFIG_FLASH_8MB
390 #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x60000)
391 #define CFG_ENV_SIZE 0x4000
392 #define CFG_ENV_SECT_SIZE 0x20000
394 #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x4000)
395 #define CFG_ENV_SIZE 0x4000
396 #define CFG_ENV_SECT_SIZE 0x4000
399 /* Address and size of Redundant Environment Sector */
400 #define CFG_ENV_OFFSET_REDUND (CFG_ENV_ADDR+CFG_ENV_SECT_SIZE)
401 #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
403 /* Initial value of the on-board touch screen brightness */
404 #define CFG_BRIGHTNESS 0x20
406 #endif /* __CONFIG_H */