2 * (C) Copyright 2003-2006 Wolfgang Denk, DENX Software Engineering,
5 * See file CREDITS for list of people who contributed to this project.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc., 59
19 * Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 * High Level Configuration Options
29 #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
30 #define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
31 #define CONFIG_V38B 1 /* ...on V38B board */
33 #define CONFIG_SYS_TEXT_BASE 0xFF000000
35 #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ...running at 33.000000MHz */
37 #define CONFIG_RTC_PCF8563 1 /* has PCF8563 RTC */
38 #define CONFIG_MPC5200_DDR 1 /* has DDR SDRAM */
40 #undef CONFIG_HW_WATCHDOG /* don't use watchdog */
42 #define CONFIG_NETCONSOLE 1
44 #define CONFIG_BOARD_EARLY_INIT_R 1 /* do board-specific init */
45 #define CONFIG_BOARD_EARLY_INIT_F 1 /* do board-specific init */
46 #define CONFIG_MISC_INIT_R
48 #define CONFIG_SYS_XLB_PIPELINING 1 /* gives better performance */
50 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
51 #define BOOTFLAG_WARM 0x02 /* Software reboot */
53 #define CONFIG_HIGH_BATS 1 /* High BATs supported */
56 * Serial console configuration
58 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
59 #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
60 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
65 #define SDRAM_DDR 1 /* is DDR */
66 /* Settings for XLB = 132 MHz */
67 #define SDRAM_MODE 0x018D0000
68 #define SDRAM_EMODE 0x40090000
69 #define SDRAM_CONTROL 0x704f0f00
70 #define SDRAM_CONFIG1 0x73722930
71 #define SDRAM_CONFIG2 0x47770000
72 #define SDRAM_TAPDELAY 0x10000000
82 #define CONFIG_MAC_PARTITION 1
83 #define CONFIG_DOS_PARTITION 1
88 #define CONFIG_USB_OHCI
89 #define CONFIG_USB_STORAGE
90 #define CONFIG_USB_CLOCK 0x0001BBBB
91 #define CONFIG_USB_CONFIG 0x00001000
97 #define CONFIG_BOOTP_BOOTFILESIZE
98 #define CONFIG_BOOTP_BOOTPATH
99 #define CONFIG_BOOTP_GATEWAY
100 #define CONFIG_BOOTP_HOSTNAME
104 * Command line configuration.
106 #include <config_cmd_default.h>
108 #define CONFIG_CMD_FAT
109 #define CONFIG_CMD_I2C
110 #define CONFIG_CMD_IDE
111 #define CONFIG_CMD_PING
112 #define CONFIG_CMD_DHCP
113 #define CONFIG_CMD_DIAG
114 #define CONFIG_CMD_IRQ
115 #define CONFIG_CMD_JFFS2
116 #define CONFIG_CMD_MII
117 #define CONFIG_CMD_SDRAM
118 #define CONFIG_CMD_DATE
119 #define CONFIG_CMD_USB
120 #define CONFIG_CMD_FAT
123 #define CONFIG_TIMESTAMP /* Print image info with timestamp */
126 * Boot low with 16 MB Flash
128 #define CONFIG_SYS_LOWBOOT 1
129 #define CONFIG_SYS_LOWBOOT16 1
134 #define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
136 #define CONFIG_PREBOOT "echo;" \
137 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
140 #undef CONFIG_BOOTARGS
142 #define CONFIG_EXTRA_ENV_SETTINGS \
143 "bootcmd=run net_nfs\0" \
145 "baudrate=115200\0" \
146 "preboot=echo;echo Type \"run flash_nfs\" to mount root " \
147 "filesystem over NFS; echo\0" \
149 "ramargs=setenv bootargs root=/dev/ram rw wdt=off \0" \
150 "addip=setenv bootargs $(bootargs) " \
151 "ip=$(ipaddr):$(serverip):$(gatewayip):" \
152 "$(netmask):$(hostname):$(netdev):off panic=1\0" \
153 "flash_nfs=run nfsargs addip;bootm $(kernel_addr)\0" \
154 "flash_self=run ramargs addip;bootm $(kernel_addr) " \
155 "$(ramdisk_addr)\0" \
156 "net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0" \
157 "nfsargs=setenv bootargs root=/dev/nfs rw " \
158 "nfsroot=$(serverip):$(rootpath) wdt=off\0" \
161 "rootpath=/opt/eldk-3.1.1/ppc_6xx\0" \
162 "update=prot off ff000000 ff03ffff; era ff000000 ff03ffff; " \
163 "cp.b 200000 ff000000 $(filesize);" \
164 "prot on ff000000 ff03ffff\0" \
165 "load=tftp 200000 $(u-boot)\0" \
166 "netmask=255.255.0.0\0" \
167 "ipaddr=192.168.160.18\0" \
168 "serverip=192.168.1.1\0" \
169 "ethaddr=00:e0:ee:00:05:2e\0" \
170 "bootfile=/tftpboot/v38b/uImage\0" \
171 "u-boot=/tftpboot/v38b/u-boot.bin\0" \
174 #define CONFIG_BOOTCOMMAND "run net_nfs"
177 * IPB Bus clocking configuration.
179 #undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
184 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
185 #define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
186 #define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
187 #define CONFIG_SYS_I2C_SLAVE 0x7F
190 * EEPROM configuration
192 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
193 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
194 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
195 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
200 #define CONFIG_SYS_I2C_RTC_ADDR 0x51
203 * Flash configuration - use CFI driver
205 #define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
206 #define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */
207 #define CONFIG_SYS_FLASH_CFI_AMD_RESET 1
208 #define CONFIG_SYS_FLASH_BASE 0xFF000000
209 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
210 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
211 #define CONFIG_SYS_FLASH_SIZE 0x01000000 /* 16 MiB */
212 #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */
213 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* flash write speed-up */
216 * Environment settings
218 #define CONFIG_ENV_IS_IN_FLASH 1
219 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000)
220 #define CONFIG_ENV_SIZE 0x10000
221 #define CONFIG_ENV_SECT_SIZE 0x10000
222 #define CONFIG_ENV_OVERWRITE 1
227 #define CONFIG_SYS_MBAR 0xF0000000
228 #define CONFIG_SYS_SDRAM_BASE 0x00000000
229 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
231 /* Use SRAM until RAM will be available */
232 #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
233 #define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE /* End of used area in DPRAM */
235 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
236 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
237 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
239 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
240 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
241 # define CONFIG_SYS_RAMBOOT 1
244 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256kB for Monitor */
245 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128kB for malloc() */
246 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Linux initial memory map */
249 * Ethernet configuration
251 #define CONFIG_MPC5xxx_FEC 1
252 #define CONFIG_MPC5xxx_FEC_MII100
253 #define CONFIG_PHY_ADDR 0x00
259 #define CONFIG_SYS_GPS_PORT_CONFIG 0x90001404
262 * Miscellaneous configurable options
264 #define CONFIG_SYS_LONGHELP /* undef to save memory */
265 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
266 #if defined(CONFIG_CMD_KGDB)
267 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
269 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
271 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
272 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
273 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
275 #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
276 #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
278 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
280 #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
282 #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
283 #if defined(CONFIG_CMD_KGDB)
284 # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
288 * Various low-level settings
290 #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
291 #define CONFIG_SYS_HID0_FINAL HID0_ICE
293 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
294 #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
295 #define CONFIG_SYS_BOOTCS_CFG 0x00047801
296 #define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
297 #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
299 #define CONFIG_SYS_CS_BURST 0x00000000
300 #define CONFIG_SYS_CS_DEADCYCLE 0x33333333
302 #define CONFIG_SYS_RESET_ADDRESS 0xff000000
305 * IDE/ATA (supports IDE harddisk)
307 #undef CONFIG_IDE_8xx_PCCARD /* Don't use IDE with PC Card Adapter */
308 #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
309 #undef CONFIG_IDE_LED /* LED for ide not supported */
311 #define CONFIG_IDE_RESET /* reset for ide supported */
312 #define CONFIG_IDE_PREINIT
314 #define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
315 #define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
317 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
319 #define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
321 #define CONFIG_SYS_ATA_DATA_OFFSET (0x0060) /* data I/O offset */
323 #define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET) /* normal register accesses offset */
325 #define CONFIG_SYS_ATA_ALT_OFFSET (0x005C) /* alternate registers offset */
327 #define CONFIG_SYS_ATA_STRIDE 4 /* Interval between registers */
332 #define CONFIG_STATUS_LED /* Status LED enabled */
333 #define CONFIG_BOARD_SPECIFIC_LED /* version has board specific leds */
335 #define CONFIG_SYS_LED_BASE MPC5XXX_GPT7_ENABLE /* Timer 7 GPIO */
337 typedef unsigned int led_id_t;
339 #define __led_toggle(_msk) \
341 *((volatile long *) (CONFIG_SYS_LED_BASE)) ^= (_msk); \
344 #define __led_set(_msk, _st) \
347 *((volatile long *) (CONFIG_SYS_LED_BASE)) &= ~(_msk); \
349 *((volatile long *) (CONFIG_SYS_LED_BASE)) |= (_msk); \
352 #define __led_init(_msk, st) \
354 *((volatile long *) (CONFIG_SYS_LED_BASE)) |= 0x34; \
356 #endif /* __ASSEMBLY__ */
358 #endif /* __CONFIG_H */