2 * Copyright (C) 2016 NXP Semiconductors
4 * Configuration settings for the i.MX7S Warp board.
6 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef __WARP7_CONFIG_H
10 #define __WARP7_CONFIG_H
12 #define CONFIG_BOOTDELAY 1
13 #include "mx7_common.h"
15 #define PHYS_SDRAM_SIZE SZ_512M
17 #define CONFIG_BOARD_EARLY_INIT_F
20 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR
21 #define CONFIG_SUPPORT_EMMC_BOOT
22 #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
23 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
25 #define CONFIG_DFU_ENV_SETTINGS \
26 "dfu_alt_info=image raw 0 0x800000;"\
27 "u-boot raw 0 0x4000;"\
31 #define CONFIG_EXTRA_ENV_SETTINGS \
32 CONFIG_DFU_ENV_SETTINGS \
36 "fdt_high=0xffffffff\0" \
37 "initrd_high=0xffffffff\0" \
38 "fdt_file=imx7d-warp.dtb\0" \
39 "fdt_addr=0x83000000\0" \
42 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
43 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
44 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
45 "mmcargs=setenv bootargs console=${console},${baudrate} " \
48 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
49 "bootscript=echo Running bootscript from mmc ...; " \
51 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
52 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
53 "mmcboot=echo Booting from mmc ...; " \
55 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
56 "if run loadfdt; then " \
57 "bootz ${loadaddr} - ${fdt_addr}; " \
59 "if test ${boot_fdt} = try; then " \
62 "echo WARN: Cannot load the DT; " \
69 #define CONFIG_BOOTCOMMAND \
70 "mmc dev ${mmcdev};" \
71 "mmc dev ${mmcdev}; if mmc rescan; then " \
72 "if run loadbootscript; then " \
75 "if run loadimage; then " \
81 #define CONFIG_CMD_MEMTEST
82 #define CONFIG_SYS_MEMTEST_START 0x80000000
83 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000)
85 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
86 #define CONFIG_SYS_HZ 1000
88 #define CONFIG_STACKSIZE SZ_128K
90 /* Physical Memory Map */
91 #define CONFIG_NR_DRAM_BANKS 1
92 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
94 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
95 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
96 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
98 #define CONFIG_SYS_INIT_SP_OFFSET \
99 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
100 #define CONFIG_SYS_INIT_SP_ADDR \
101 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
103 /* FLASH and environment organization */
104 #define CONFIG_SYS_NO_FLASH
105 #define CONFIG_ENV_SIZE SZ_8K
106 #define CONFIG_ENV_IS_IN_MMC
108 #define CONFIG_ENV_OFFSET (8 * SZ_64K)
109 #define CONFIG_SYS_FSL_USDHC_NUM 1
111 #define CONFIG_SYS_MMC_ENV_DEV 0
112 #define CONFIG_SYS_MMC_ENV_PART 0
113 #define CONFIG_MMCROOT "/dev/mmcblk2p2"
116 #define CONFIG_CMD_USB
117 #define CONFIG_USB_EHCI
118 #define CONFIG_USB_EHCI_MX7
119 #define CONFIG_USB_STORAGE
120 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
122 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
123 #define CONFIG_MXC_USB_FLAGS 0
124 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Only OTG1 port enabled */
126 #define CONFIG_IMX_THERMAL
128 #define CONFIG_CI_UDC
129 #define CONFIG_USBD_HS
130 #define CONFIG_USB_GADGET_DUALSPEED
132 #define CONFIG_USB_GADGET
133 #define CONFIG_CMD_USB_MASS_STORAGE
134 #define CONFIG_USB_FUNCTION_MASS_STORAGE
135 #define CONFIG_USB_GADGET_DOWNLOAD
136 #define CONFIG_USB_GADGET_VBUS_DRAW 2
138 #define CONFIG_G_DNL_VENDOR_NUM 0x0525
139 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5
140 #define CONFIG_G_DNL_MANUFACTURER "FSL"
142 /* USB Device Firmware Update support */
143 #define CONFIG_CMD_DFU
144 #define CONFIG_USB_FUNCTION_DFU
145 #define CONFIG_DFU_MMC
146 #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M
147 #define DFU_DEFAULT_POLL_TIMEOUT 300