2 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
5 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7 * addition to an Environment Controller (Enhanced Hardware Monitor and
10 * This driver supports only the Environment Controller in the IT8705F and
11 * similar parts. The other devices are supported by different drivers.
13 * Supports: IT8603E Super I/O chip w/LPC interface
14 * IT8607E Super I/O chip w/LPC interface
15 * IT8613E Super I/O chip w/LPC interface
16 * IT8620E Super I/O chip w/LPC interface
17 * IT8622E Super I/O chip w/LPC interface
18 * IT8623E Super I/O chip w/LPC interface
19 * IT8625E Super I/O chip w/LPC interface
20 * IT8628E Super I/O chip w/LPC interface
21 * IT8655E Super I/O chip w/LPC interface
22 * IT8665E Super I/O chip w/LPC interface
23 * IT8686E Super I/O chip w/LPC interface
24 * IT8705F Super I/O chip w/LPC interface
25 * IT8712F Super I/O chip w/LPC interface
26 * IT8716F Super I/O chip w/LPC interface
27 * IT8718F Super I/O chip w/LPC interface
28 * IT8720F Super I/O chip w/LPC interface
29 * IT8721F Super I/O chip w/LPC interface
30 * IT8726F Super I/O chip w/LPC interface
31 * IT8728F Super I/O chip w/LPC interface
32 * IT8732F Super I/O chip w/LPC interface
33 * IT8758E Super I/O chip w/LPC interface
34 * IT8771E Super I/O chip w/LPC interface
35 * IT8772E Super I/O chip w/LPC interface
36 * IT8781F Super I/O chip w/LPC interface
37 * IT8782F Super I/O chip w/LPC interface
38 * IT8783E/F Super I/O chip w/LPC interface
39 * IT8786E Super I/O chip w/LPC interface
40 * IT8790E Super I/O chip w/LPC interface
41 * IT8792E Super I/O chip w/LPC interface
42 * Sis950 A clone of the IT8705F
44 * Copyright (C) 2001 Chris Gauthron
45 * Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
47 * This program is free software; you can redistribute it and/or modify
48 * it under the terms of the GNU General Public License as published by
49 * the Free Software Foundation; either version 2 of the License, or
50 * (at your option) any later version.
52 * This program is distributed in the hope that it will be useful,
53 * but WITHOUT ANY WARRANTY; without even the implied warranty of
54 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
55 * GNU General Public License for more details.
58 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
60 #include <linux/bitops.h>
61 #include <linux/module.h>
62 #include <linux/init.h>
63 #include <linux/slab.h>
64 #include <linux/jiffies.h>
65 #include <linux/platform_device.h>
66 #include <linux/hwmon.h>
67 #include <linux/hwmon-sysfs.h>
68 #include <linux/hwmon-vid.h>
69 #include <linux/err.h>
70 #include <linux/mutex.h>
71 #include <linux/sysfs.h>
72 #include <linux/string.h>
73 #include <linux/dmi.h>
74 #include <linux/acpi.h>
78 #define DRVNAME "it87"
80 /* Necessary API not (yet) exported in upstream kernel */
81 /* #define __IT87_USE_ACPI_MUTEX */
83 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
84 it8771, it8772, it8781, it8782, it8783, it8786, it8790,
85 it8792, it8603, it8607, it8613, it8620, it8622, it8625, it8628,
86 it8655, it8665, it8686 };
88 static unsigned short force_id;
89 module_param(force_id, ushort, 0);
90 MODULE_PARM_DESC(force_id, "Override the detected device ID");
92 static struct platform_device *it87_pdev[2];
93 static bool it87_sio4e_broken;
94 #ifdef __IT87_USE_ACPI_MUTEX
95 static acpi_handle it87_acpi_sio_handle;
96 static char *it87_acpi_sio_mutex;
99 #define REG_2E 0x2e /* The register to read/write */
100 #define REG_4E 0x4e /* Secondary register to read/write */
102 #define DEV 0x07 /* Register: Logical device select */
103 #define PME 0x04 /* The device with the fan registers in it */
105 /* The device with the IT8718F/IT8720F VID value in it */
108 #define DEVID 0x20 /* Register: Device ID */
109 #define DEVREV 0x22 /* Register: Device Revision */
111 static inline void __superio_enter(int ioreg)
116 outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
119 static inline int superio_inb(int ioreg, int reg)
124 val = inb(ioreg + 1);
125 if (it87_sio4e_broken && ioreg == 0x4e && val == 0xff) {
126 __superio_enter(ioreg);
128 val = inb(ioreg + 1);
129 pr_warn("Retry access 0x4e:0x%x -> 0x%x\n", reg, val);
135 static inline void superio_outb(int ioreg, int reg, int val)
138 outb(val, ioreg + 1);
141 static int superio_inw(int ioreg, int reg)
143 return (superio_inb(ioreg, reg) << 8) | superio_inb(ioreg, reg + 1);
146 static inline void superio_select(int ioreg, int ldn)
149 outb(ldn, ioreg + 1);
152 static inline int superio_enter(int ioreg)
154 #ifdef __IT87_USE_ACPI_MUTEX
155 if (it87_acpi_sio_mutex) {
158 status = acpi_acquire_mutex(NULL, it87_acpi_sio_mutex, 0x10);
159 if (ACPI_FAILURE(status)) {
160 pr_err("Failed to acquire ACPI mutex\n");
166 * Try to reserve ioreg and ioreg + 1 for exclusive access.
168 if (!request_muxed_region(ioreg, 2, DRVNAME))
171 __superio_enter(ioreg);
175 #ifdef __IT87_USE_ACPI_MUTEX
176 if (it87_acpi_sio_mutex)
177 acpi_release_mutex(it87_acpi_sio_handle, NULL);
182 static inline void superio_exit(int ioreg)
184 if (!it87_sio4e_broken || ioreg != 0x4e) {
186 outb(0x02, ioreg + 1);
188 release_region(ioreg, 2);
189 #ifdef __IT87_USE_ACPI_MUTEX
190 if (it87_acpi_sio_mutex)
191 acpi_release_mutex(it87_acpi_sio_handle, NULL);
195 /* Logical device 4 registers */
196 #define IT8712F_DEVID 0x8712
197 #define IT8705F_DEVID 0x8705
198 #define IT8716F_DEVID 0x8716
199 #define IT8718F_DEVID 0x8718
200 #define IT8720F_DEVID 0x8720
201 #define IT8721F_DEVID 0x8721
202 #define IT8726F_DEVID 0x8726
203 #define IT8728F_DEVID 0x8728
204 #define IT8732F_DEVID 0x8732
205 #define IT8792E_DEVID 0x8733
206 #define IT8771E_DEVID 0x8771
207 #define IT8772E_DEVID 0x8772
208 #define IT8781F_DEVID 0x8781
209 #define IT8782F_DEVID 0x8782
210 #define IT8783E_DEVID 0x8783
211 #define IT8786E_DEVID 0x8786
212 #define IT8790E_DEVID 0x8790
213 #define IT8603E_DEVID 0x8603
214 #define IT8607E_DEVID 0x8607
215 #define IT8613E_DEVID 0x8613
216 #define IT8620E_DEVID 0x8620
217 #define IT8622E_DEVID 0x8622
218 #define IT8623E_DEVID 0x8623
219 #define IT8625E_DEVID 0x8625
220 #define IT8628E_DEVID 0x8628
221 #define IT8655E_DEVID 0x8655
222 #define IT8665E_DEVID 0x8665
223 #define IT8686E_DEVID 0x8686
224 #define IT87_ACT_REG 0x30
225 #define IT87_BASE_REG 0x60
227 /* Logical device 7 registers (IT8712F and later) */
228 #define IT87_SIO_GPIO1_REG 0x25
229 #define IT87_SIO_GPIO2_REG 0x26
230 #define IT87_SIO_GPIO3_REG 0x27
231 #define IT87_SIO_GPIO4_REG 0x28
232 #define IT87_SIO_GPIO5_REG 0x29
233 #define IT87_SIO_GPIO9_REG 0xd3
234 #define IT87_SIO_PINX1_REG 0x2a /* Pin selection */
235 #define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
236 #define IT87_SIO_PINX4_REG 0x2d /* Pin selection */
237 #define IT87_SIO_SPI_REG 0xef /* SPI function pin select */
238 #define IT87_SIO_VID_REG 0xfc /* VID value */
239 #define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */
241 /* Update battery voltage after every reading if true */
242 static bool update_vbat;
244 /* Not all BIOSes properly configure the PWM registers */
245 static bool fix_pwm_polarity;
247 /* Many IT87 constants specified below */
249 /* Length of ISA address segment */
250 #define IT87_EXTENT 8
252 /* Length of ISA address segment for Environmental Controller */
253 #define IT87_EC_EXTENT 2
255 /* Offset of EC registers from ISA base address */
256 #define IT87_EC_OFFSET 5
258 /* Where are the ISA address/data registers relative to the EC base address */
259 #define IT87_ADDR_REG_OFFSET 0
260 #define IT87_DATA_REG_OFFSET 1
262 /*----- The IT87 registers -----*/
264 #define IT87_REG_CONFIG 0x00
266 #define IT87_REG_ALARM1 0x01
267 #define IT87_REG_ALARM2 0x02
268 #define IT87_REG_ALARM3 0x03
270 #define IT87_REG_BANK 0x06
273 * The IT8718F and IT8720F have the VID value in a different register, in
274 * Super-I/O configuration space.
276 #define IT87_REG_VID 0x0a
278 * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
279 * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
282 #define IT87_REG_FAN_DIV 0x0b
283 #define IT87_REG_FAN_16BIT 0x0c
287 * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
288 * - up to 6 temp (1 to 6)
289 * - up to 6 fan (1 to 6)
292 static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
293 static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
294 static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
295 static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
297 static const u8 IT87_REG_FAN_8665[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x93 };
298 static const u8 IT87_REG_FAN_MIN_8665[] =
299 { 0x10, 0x11, 0x12, 0x84, 0x86, 0xb2 };
300 static const u8 IT87_REG_FANX_8665[] = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x94 };
301 static const u8 IT87_REG_FANX_MIN_8665[] =
302 { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0xb3 };
304 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59, 0x5a, 0x90, 0x91 };
306 static const u8 IT87_REG_TEMP_OFFSET_8686[] = { 0x56, 0x57, 0x59, 0x90, 0x91, 0x92 };
308 #define IT87_REG_FAN_MAIN_CTRL 0x13
309 #define IT87_REG_FAN_CTL 0x14
311 static const u8 IT87_REG_PWM[] = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
312 static const u8 IT87_REG_PWM_8665[] = { 0x15, 0x16, 0x17, 0x1e, 0x1f, 0x92 };
314 static const u8 IT87_REG_PWM_DUTY[] = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
316 static const u8 IT87_REG_VIN[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
317 0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
319 #define IT87_REG_TEMP(nr) (0x29 + (nr))
321 #define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2)
322 #define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2)
324 static const u8 IT87_REG_TEMP_HIGH[] = { 0x40, 0x42, 0x44, 0x46, 0xb4, 0xb6 };
325 static const u8 IT87_REG_TEMP_LOW[] = { 0x41, 0x43, 0x45, 0x47, 0xb5, 0xb7 };
327 static const u8 IT87_REG_TEMP_HIGH_8686[] =
328 { 0x40, 0x42, 0x44, 0xb4, 0xb6, 0xb8 };
329 static const u8 IT87_REG_TEMP_LOW_8686[] =
330 { 0x41, 0x43, 0x45, 0xb5, 0xb7, 0xb9 };
332 #define IT87_REG_VIN_ENABLE 0x50
333 #define IT87_REG_TEMP_ENABLE 0x51
334 #define IT87_REG_TEMP_EXTRA 0x55
335 #define IT87_REG_BEEP_ENABLE 0x5c
337 #define IT87_REG_CHIPID 0x58
339 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
341 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
342 #define IT87_REG_AUTO_PWM(nr, i) (IT87_REG_AUTO_BASE[nr] + 5 + (i))
344 #define IT87_REG_TEMP456_ENABLE 0x77
346 static const u16 IT87_REG_TEMP_SRC1[] = { 0x21d, 0x21e, 0x21f };
347 #define IT87_REG_TEMP_SRC2 0x23d
349 #define NUM_VIN ARRAY_SIZE(IT87_REG_VIN)
350 #define NUM_VIN_LIMIT 8
352 #define NUM_FAN ARRAY_SIZE(IT87_REG_FAN)
353 #define NUM_FAN_DIV 3
354 #define NUM_PWM ARRAY_SIZE(IT87_REG_PWM)
355 #define NUM_AUTO_PWM ARRAY_SIZE(IT87_REG_PWM)
357 struct it87_devices {
359 const char * const suffix;
366 #define FEAT_12MV_ADC BIT(0)
367 #define FEAT_NEWER_AUTOPWM BIT(1)
368 #define FEAT_OLD_AUTOPWM BIT(2)
369 #define FEAT_16BIT_FANS BIT(3)
370 #define FEAT_TEMP_OFFSET BIT(4)
371 #define FEAT_TEMP_PECI BIT(5)
372 #define FEAT_TEMP_OLD_PECI BIT(6)
373 #define FEAT_FAN16_CONFIG BIT(7) /* Need to enable 16-bit fans */
374 #define FEAT_FIVE_FANS BIT(8) /* Supports five fans */
375 #define FEAT_VID BIT(9) /* Set if chip supports VID */
376 #define FEAT_IN7_INTERNAL BIT(10) /* Set if in7 is internal */
377 #define FEAT_SIX_FANS BIT(11) /* Supports six fans */
378 #define FEAT_10_9MV_ADC BIT(12)
379 #define FEAT_AVCC3 BIT(13) /* Chip supports in9/AVCC3 */
380 #define FEAT_FIVE_PWM BIT(14) /* Chip supports 5 pwm chn */
381 #define FEAT_SIX_PWM BIT(15) /* Chip supports 6 pwm chn */
382 #define FEAT_PWM_FREQ2 BIT(16) /* Separate pwm freq 2 */
383 #define FEAT_SIX_TEMP BIT(17) /* Up to 6 temp sensors */
384 #define FEAT_VIN3_5V BIT(18) /* VIN3 connected to +5V */
385 #define FEAT_FOUR_FANS BIT(19) /* Supports four fans */
386 #define FEAT_FOUR_PWM BIT(20) /* Supports four fan controls */
387 #define FEAT_BANK_SEL BIT(21) /* Chip has multi-bank support */
388 #define FEAT_SCALING BIT(22) /* Internal voltage scaling */
389 #define FEAT_FANCTL_ONOFF BIT(23) /* chip has FAN_CTL ON/OFF */
390 #define FEAT_11MV_ADC BIT(24)
391 #define FEAT_NEW_TEMPMAP BIT(25) /* new temp input selection */
393 static const struct it87_devices it87_devices[] = {
397 .features = FEAT_OLD_AUTOPWM | FEAT_FANCTL_ONOFF,
398 /* may need to overwrite */
404 .features = FEAT_OLD_AUTOPWM | FEAT_VID | FEAT_FANCTL_ONOFF,
405 /* may need to overwrite */
411 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
412 | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2
419 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
420 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
421 | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
423 .old_peci_mask = 0x4,
428 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
429 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
430 | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
432 .old_peci_mask = 0x4,
437 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
438 | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
439 | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
440 | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
443 .old_peci_mask = 0x02, /* Actually reports PCH */
448 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
449 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
450 | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_SCALING
458 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
459 | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
460 | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS
461 | FEAT_FOUR_PWM | FEAT_FANCTL_ONOFF,
464 .old_peci_mask = 0x02, /* Actually reports PCH */
469 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
470 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
471 | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
472 /* PECI: guesswork */
474 /* 16 bit fans (OHM) */
475 /* three fans, always 16 bit (guesswork) */
482 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
483 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
484 | FEAT_PWM_FREQ2 | FEAT_SCALING | FEAT_FANCTL_ONOFF,
485 /* PECI (coreboot) */
486 /* 12mV ADC (HWSensors4, OHM) */
487 /* 16 bit fans (HWSensors4, OHM) */
488 /* three fans, always 16 bit (datasheet) */
495 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
496 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
499 .old_peci_mask = 0x4,
504 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
505 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
508 .old_peci_mask = 0x4,
513 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
514 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2
517 .old_peci_mask = 0x4,
522 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
523 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
524 | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
531 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
532 | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI
533 | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
540 .features = FEAT_NEWER_AUTOPWM | FEAT_10_9MV_ADC | FEAT_SCALING
541 | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI
542 | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF,
549 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
550 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
551 | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING,
558 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
559 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
560 | FEAT_AVCC3 | FEAT_PWM_FREQ2 | FEAT_SCALING
568 .features = FEAT_NEWER_AUTOPWM | FEAT_11MV_ADC | FEAT_16BIT_FANS
569 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
570 | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
571 | FEAT_AVCC3 | FEAT_SCALING | FEAT_NEW_TEMPMAP,
578 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
579 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
580 | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
581 | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_SCALING
589 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
590 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
591 | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
592 | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_SCALING,
599 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
600 | FEAT_TEMP_OFFSET | FEAT_AVCC3 | FEAT_NEW_TEMPMAP
601 | FEAT_11MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
602 | FEAT_SIX_PWM | FEAT_BANK_SEL | FEAT_SCALING,
608 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
609 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
610 | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
611 | FEAT_SIX_TEMP | FEAT_SCALING | FEAT_AVCC3
619 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
620 | FEAT_TEMP_OFFSET | FEAT_AVCC3 | FEAT_NEW_TEMPMAP
621 | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_BANK_SEL,
627 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
628 | FEAT_TEMP_OFFSET | FEAT_AVCC3 | FEAT_NEW_TEMPMAP
629 | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_SIX_FANS
630 | FEAT_SIX_PWM | FEAT_BANK_SEL,
636 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
637 | FEAT_TEMP_OFFSET | FEAT_SIX_FANS | FEAT_NEW_TEMPMAP
638 | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
639 | FEAT_SIX_TEMP | FEAT_BANK_SEL | FEAT_SCALING | FEAT_AVCC3,
644 #define has_16bit_fans(data) ((data)->features & FEAT_16BIT_FANS)
645 #define has_12mv_adc(data) ((data)->features & FEAT_12MV_ADC)
646 #define has_10_9mv_adc(data) ((data)->features & FEAT_10_9MV_ADC)
647 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
648 #define has_old_autopwm(data) ((data)->features & FEAT_OLD_AUTOPWM)
649 #define has_temp_offset(data) ((data)->features & FEAT_TEMP_OFFSET)
650 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
651 ((data)->peci_mask & BIT(nr)))
652 #define has_temp_old_peci(data, nr) \
653 (((data)->features & FEAT_TEMP_OLD_PECI) && \
654 ((data)->old_peci_mask & BIT(nr)))
655 #define has_fan16_config(data) ((data)->features & FEAT_FAN16_CONFIG)
656 #define has_five_fans(data) ((data)->features & (FEAT_FIVE_FANS | \
658 #define has_vid(data) ((data)->features & FEAT_VID)
659 #define has_in7_internal(data) ((data)->features & FEAT_IN7_INTERNAL)
660 #define has_six_fans(data) ((data)->features & FEAT_SIX_FANS)
661 #define has_avcc3(data) ((data)->features & FEAT_AVCC3)
662 #define has_five_pwm(data) ((data)->features & (FEAT_FIVE_PWM \
664 #define has_six_pwm(data) ((data)->features & FEAT_SIX_PWM)
665 #define has_pwm_freq2(data) ((data)->features & FEAT_PWM_FREQ2)
666 #define has_six_temp(data) ((data)->features & FEAT_SIX_TEMP)
667 #define has_vin3_5v(data) ((data)->features & FEAT_VIN3_5V)
668 #define has_four_fans(data) ((data)->features & (FEAT_FOUR_FANS | \
671 #define has_four_pwm(data) ((data)->features & (FEAT_FOUR_PWM | \
674 #define has_bank_sel(data) ((data)->features & FEAT_BANK_SEL)
675 #define has_scaling(data) ((data)->features & FEAT_SCALING)
676 #define has_fanctl_onoff(data) ((data)->features & FEAT_FANCTL_ONOFF)
677 #define has_11mv_adc(data) ((data)->features & FEAT_11MV_ADC)
678 #define has_new_tempmap(data) ((data)->features & FEAT_NEW_TEMPMAP)
680 struct it87_sio_data {
682 /* Values read from Super-I/O config space */
686 u8 internal; /* Internal sensors can be labeled */
687 /* Features skipped based on config or DMI */
696 * For each registered chip, we need to keep some data in memory.
697 * The structure is dynamically allocated.
700 const struct attribute_group *groups[7];
709 const u8 *REG_FAN_MIN;
710 const u8 *REG_FANX_MIN;
714 const u8 *REG_TEMP_OFFSET;
715 const u8 *REG_TEMP_LOW;
716 const u8 *REG_TEMP_HIGH;
720 struct mutex update_lock;
721 char valid; /* !=0 if following fields are valid */
722 unsigned long last_updated; /* In jiffies */
724 u16 in_scaled; /* Internal voltage sensors are scaled */
725 u16 in_internal; /* Bitfield, internal sensors (for labels) */
726 u16 has_in; /* Bitfield, voltage sensors enabled */
727 u8 in[NUM_VIN][3]; /* [nr][0]=in, [1]=min, [2]=max */
728 u8 has_fan; /* Bitfield, fans enabled */
729 u16 fan[NUM_FAN][2]; /* Register values, [nr][0]=fan, [1]=min */
730 u8 has_temp; /* Bitfield, temp sensors enabled */
731 s8 temp[NUM_TEMP][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
732 u8 num_temp_limit; /* Number of temp limit/offset registers */
733 u8 sensor; /* Register value (IT87_REG_TEMP_ENABLE) */
734 u8 extra; /* Register value (IT87_REG_TEMP_EXTRA) */
735 u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
736 bool has_vid; /* True if VID supported */
737 u8 vid; /* Register encoding, combined */
739 u32 alarms; /* Register encoding, combined */
740 bool has_beep; /* true if beep supported */
741 u8 beeps; /* Register encoding */
742 u8 fan_main_ctrl; /* Register value */
743 u8 fan_ctl; /* Register value */
746 * The following 3 arrays correspond to the same registers up to
747 * the IT8720F. The meaning of bits 6-0 depends on the value of bit
748 * 7, and we want to preserve settings on mode changes, so we have
749 * to track all values separately.
750 * Starting with the IT8721F, the manual PWM duty cycles are stored
751 * in separate registers (8-bit values), so the separate tracking
752 * is no longer needed, but it is still done to keep the driver
755 u8 has_pwm; /* Bitfield, pwm control enabled */
756 u8 pwm_ctrl[NUM_PWM]; /* Register value */
757 u8 pwm_duty[NUM_PWM]; /* Manual PWM value set by user */
758 u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
760 /* Automatic fan speed control registers */
761 u8 auto_pwm[NUM_AUTO_PWM][4]; /* [nr][3] is hard-coded */
762 s8 auto_temp[NUM_AUTO_PWM][5]; /* [nr][0] is point1_temp_hyst */
765 static int adc_lsb(const struct it87_data *data, int nr)
769 if (has_12mv_adc(data))
771 else if (has_10_9mv_adc(data))
773 else if (has_11mv_adc(data))
777 if (data->in_scaled & BIT(nr))
782 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
784 val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
785 return clamp_val(val, 0, 255);
788 static int in_from_reg(const struct it87_data *data, int nr, int val)
790 return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
793 static inline u8 FAN_TO_REG(long rpm, int div)
797 rpm = clamp_val(rpm, 1, 1000000);
798 return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
801 static inline u16 FAN16_TO_REG(long rpm)
805 return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
808 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
809 1350000 / ((val) * (div)))
810 /* The divider is fixed to 2 in 16-bit mode */
811 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
812 1350000 / ((val) * 2))
814 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
815 ((val) + 500) / 1000), -128, 127))
816 #define TEMP_FROM_REG(val) ((val) * 1000)
818 static u8 pwm_to_reg(const struct it87_data *data, long val)
820 if (has_newer_autopwm(data))
826 static int pwm_from_reg(const struct it87_data *data, u8 reg)
828 if (has_newer_autopwm(data))
831 return (reg & 0x7f) << 1;
834 static int DIV_TO_REG(int val)
838 while (answer < 7 && (val >>= 1))
843 #define DIV_FROM_REG(val) BIT(val)
846 * PWM base frequencies. The frequency has to be divided by either 128 or 256,
847 * depending on the chip type, to calculate the actual PWM frequency.
849 * Some of the chip datasheets suggest a base frequency of 51 kHz instead
850 * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
851 * of 200 Hz. Sometimes both PWM frequency select registers are affected,
852 * sometimes just one. It is unknown if this is a datasheet error or real,
853 * so this is ignored for now.
855 static const unsigned int pwm_freq[8] = {
866 static int _it87_read_value(struct it87_data *data, u8 reg)
868 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
869 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
872 static void _it87_write_value(struct it87_data *data, u8 reg, u8 value)
874 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
875 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
878 static void it87_set_bank(struct it87_data *data, u8 bank)
880 if (has_bank_sel(data) && bank != data->bank) {
881 u8 breg = _it87_read_value(data, IT87_REG_BANK);
886 _it87_write_value(data, IT87_REG_BANK, breg);
891 * Must be called with data->update_lock held, except during initialization.
892 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
893 * would slow down the IT87 access and should not be necessary.
895 static int it87_read_value(struct it87_data *data, u16 reg)
897 it87_set_bank(data, reg >> 8);
898 return _it87_read_value(data, reg & 0xff);
902 * Must be called with data->update_lock held, except during initialization.
903 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
904 * would slow down the IT87 access and should not be necessary.
906 static void it87_write_value(struct it87_data *data, u16 reg, u8 value)
908 it87_set_bank(data, reg >> 8);
909 _it87_write_value(data, reg & 0xff, value);
912 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
914 data->pwm_ctrl[nr] = it87_read_value(data, data->REG_PWM[nr]);
915 if (has_newer_autopwm(data)) {
916 if (has_new_tempmap(data))
917 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x38;
919 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
920 data->pwm_duty[nr] = it87_read_value(data,
921 IT87_REG_PWM_DUTY[nr]);
923 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
924 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
925 else /* Manual mode */
926 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
929 if (has_old_autopwm(data)) {
932 for (i = 0; i < 5 ; i++)
933 data->auto_temp[nr][i] = it87_read_value(data,
934 IT87_REG_AUTO_TEMP(nr, i));
935 for (i = 0; i < 3 ; i++)
936 data->auto_pwm[nr][i] = it87_read_value(data,
937 IT87_REG_AUTO_PWM(nr, i));
938 } else if (has_newer_autopwm(data)) {
942 * 0: temperature hysteresis (base + 5)
943 * 1: fan off temperature (base + 0)
944 * 2: fan start temperature (base + 1)
945 * 3: fan max temperature (base + 2)
947 data->auto_temp[nr][0] =
948 it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
950 for (i = 0; i < 3 ; i++)
951 data->auto_temp[nr][i + 1] =
952 it87_read_value(data,
953 IT87_REG_AUTO_TEMP(nr, i));
955 * 0: start pwm value (base + 3)
956 * 1: pwm slope (base + 4, 1/8th pwm)
958 data->auto_pwm[nr][0] =
959 it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
960 data->auto_pwm[nr][1] =
961 it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
965 static struct it87_data *it87_update_device(struct device *dev)
967 struct it87_data *data = dev_get_drvdata(dev);
970 mutex_lock(&data->update_lock);
972 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
976 * Cleared after each update, so reenable. Value
977 * returned by this read will be previous value
979 it87_write_value(data, IT87_REG_CONFIG,
980 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
982 for (i = 0; i < NUM_VIN; i++) {
983 if (!(data->has_in & BIT(i)))
987 it87_read_value(data, IT87_REG_VIN[i]);
989 /* VBAT and AVCC don't have limit registers */
990 if (i >= NUM_VIN_LIMIT)
994 it87_read_value(data, IT87_REG_VIN_MIN(i));
996 it87_read_value(data, IT87_REG_VIN_MAX(i));
999 for (i = 0; i < NUM_FAN; i++) {
1000 /* Skip disabled fans */
1001 if (!(data->has_fan & BIT(i)))
1005 it87_read_value(data, data->REG_FAN_MIN[i]);
1006 data->fan[i][0] = it87_read_value(data,
1008 /* Add high byte if in 16-bit mode */
1009 if (has_16bit_fans(data)) {
1010 data->fan[i][0] |= it87_read_value(data,
1011 data->REG_FANX[i]) << 8;
1012 data->fan[i][1] |= it87_read_value(data,
1013 data->REG_FANX_MIN[i]) << 8;
1016 for (i = 0; i < NUM_TEMP; i++) {
1017 if (!(data->has_temp & BIT(i)))
1020 it87_read_value(data, IT87_REG_TEMP(i));
1022 if (i >= data->num_temp_limit)
1025 if (has_temp_offset(data))
1027 it87_read_value(data,
1028 data->REG_TEMP_OFFSET[i]);
1031 it87_read_value(data, data->REG_TEMP_LOW[i]);
1033 it87_read_value(data, data->REG_TEMP_HIGH[i]);
1036 /* Newer chips don't have clock dividers */
1037 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
1038 i = it87_read_value(data, IT87_REG_FAN_DIV);
1039 data->fan_div[0] = i & 0x07;
1040 data->fan_div[1] = (i >> 3) & 0x07;
1041 data->fan_div[2] = (i & 0x40) ? 3 : 1;
1045 it87_read_value(data, IT87_REG_ALARM1) |
1046 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
1047 (it87_read_value(data, IT87_REG_ALARM3) << 16);
1048 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1050 data->fan_main_ctrl = it87_read_value(data,
1051 IT87_REG_FAN_MAIN_CTRL);
1052 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
1053 for (i = 0; i < NUM_PWM; i++) {
1054 if (!(data->has_pwm & BIT(i)))
1056 it87_update_pwm_ctrl(data, i);
1059 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1060 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1062 * The IT8705F does not have VID capability.
1063 * The IT8718F and later don't use IT87_REG_VID for the
1066 if (data->type == it8712 || data->type == it8716) {
1067 data->vid = it87_read_value(data, IT87_REG_VID);
1069 * The older IT8712F revisions had only 5 VID pins,
1070 * but we assume it is always safe to read 6 bits.
1074 data->last_updated = jiffies;
1078 mutex_unlock(&data->update_lock);
1083 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
1086 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1087 struct it87_data *data = it87_update_device(dev);
1088 int index = sattr->index;
1091 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
1094 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
1095 const char *buf, size_t count)
1097 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1098 struct it87_data *data = dev_get_drvdata(dev);
1099 int index = sattr->index;
1103 if (kstrtoul(buf, 10, &val) < 0)
1106 mutex_lock(&data->update_lock);
1107 data->in[nr][index] = in_to_reg(data, nr, val);
1108 it87_write_value(data,
1109 index == 1 ? IT87_REG_VIN_MIN(nr)
1110 : IT87_REG_VIN_MAX(nr),
1111 data->in[nr][index]);
1112 mutex_unlock(&data->update_lock);
1116 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
1117 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
1119 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
1122 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
1123 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
1125 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
1128 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
1129 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
1131 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
1134 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
1135 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
1137 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
1140 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
1141 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
1143 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
1146 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
1147 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
1149 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
1152 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
1153 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
1155 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
1158 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
1159 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
1161 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
1164 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
1165 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
1166 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
1167 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
1168 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
1170 /* Up to 6 temperatures */
1171 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
1174 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1176 int index = sattr->index;
1177 struct it87_data *data = it87_update_device(dev);
1179 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1182 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
1183 const char *buf, size_t count)
1185 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1187 int index = sattr->index;
1188 struct it87_data *data = dev_get_drvdata(dev);
1192 if (kstrtol(buf, 10, &val) < 0)
1195 mutex_lock(&data->update_lock);
1200 reg = data->REG_TEMP_LOW[nr];
1203 reg = data->REG_TEMP_HIGH[nr];
1206 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1207 if (!(regval & 0x80)) {
1209 it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
1212 reg = data->REG_TEMP_OFFSET[nr];
1216 data->temp[nr][index] = TEMP_TO_REG(val);
1217 it87_write_value(data, reg, data->temp[nr][index]);
1218 mutex_unlock(&data->update_lock);
1222 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
1223 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1225 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1227 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1229 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1230 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1232 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1234 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1236 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1237 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1239 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1241 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1243 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1244 static SENSOR_DEVICE_ATTR_2(temp4_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1246 static SENSOR_DEVICE_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1248 static SENSOR_DEVICE_ATTR_2(temp4_offset, S_IRUGO | S_IWUSR, show_temp,
1250 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1251 static SENSOR_DEVICE_ATTR_2(temp5_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1253 static SENSOR_DEVICE_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1255 static SENSOR_DEVICE_ATTR_2(temp5_offset, S_IRUGO | S_IWUSR, show_temp,
1257 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1258 static SENSOR_DEVICE_ATTR_2(temp6_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1260 static SENSOR_DEVICE_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1262 static SENSOR_DEVICE_ATTR_2(temp6_offset, S_IRUGO | S_IWUSR, show_temp,
1265 static int get_temp_type(struct it87_data *data, int index)
1270 if (has_bank_sel(data)) {
1271 int s1reg = IT87_REG_TEMP_SRC1[index/2] >> ((index % 2) * 4);
1274 src1 = (it87_read_value(data, s1reg) >> ((index % 2) * 4)) & 0x0f;
1275 src2 = it87_read_value(data, IT87_REG_TEMP_SRC2);
1277 switch (data->type) {
1285 if (index == 1 || index == 2 ||
1286 index == 4 || index == 5)
1290 if (index == 2 || index == 6)
1308 type = (src2 & BIT(index)) ? 6 : 5;
1311 type = (src2 & BIT(index)) ? 4 : 6;
1314 type = (src2 & BIT(index)) ? 5 : 0;
1327 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1328 extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1330 if ((has_temp_peci(data, index) && (reg >> 6 == index + 1)) ||
1331 (has_temp_old_peci(data, index) && (extra & 0x80)))
1332 type = 6; /* Intel PECI */
1333 if (reg & BIT(index))
1334 type = 3; /* thermal diode */
1335 else if (reg & BIT(index + 3))
1336 type = 4; /* thermistor */
1341 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1344 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1345 struct it87_data *data = it87_update_device(dev);
1346 int type = get_temp_type(data, sensor_attr->index);
1348 return sprintf(buf, "%d\n", type);
1351 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1352 const char *buf, size_t count)
1354 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1355 int nr = sensor_attr->index;
1357 struct it87_data *data = dev_get_drvdata(dev);
1361 if (kstrtol(buf, 10, &val) < 0)
1364 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1367 if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1369 extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1370 if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1372 if (val == 2) { /* backwards compatibility */
1374 "Sensor type 2 is deprecated, please use 4 instead\n");
1377 /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1382 else if (has_temp_peci(data, nr) && val == 6)
1383 reg |= (nr + 1) << 6;
1384 else if (has_temp_old_peci(data, nr) && val == 6)
1389 mutex_lock(&data->update_lock);
1391 data->extra = extra;
1392 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1393 if (has_temp_old_peci(data, nr))
1394 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1395 data->valid = 0; /* Force cache refresh */
1396 mutex_unlock(&data->update_lock);
1400 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1402 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1404 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1406 static SENSOR_DEVICE_ATTR(temp4_type, S_IRUGO | S_IWUSR, show_temp_type,
1408 static SENSOR_DEVICE_ATTR(temp5_type, S_IRUGO | S_IWUSR, show_temp_type,
1410 static SENSOR_DEVICE_ATTR(temp6_type, S_IRUGO | S_IWUSR, show_temp_type,
1415 static int pwm_mode(const struct it87_data *data, int nr)
1417 if (has_fanctl_onoff(data) && nr < 3 &&
1418 !(data->fan_main_ctrl & BIT(nr)))
1419 return 0; /* Full speed */
1420 if (data->pwm_ctrl[nr] & 0x80)
1421 return 2; /* Automatic mode */
1422 if ((!has_fanctl_onoff(data) || nr >= 3) &&
1423 data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1424 return 0; /* Full speed */
1426 return 1; /* Manual mode */
1429 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1432 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1434 int index = sattr->index;
1436 struct it87_data *data = it87_update_device(dev);
1438 speed = has_16bit_fans(data) ?
1439 FAN16_FROM_REG(data->fan[nr][index]) :
1440 FAN_FROM_REG(data->fan[nr][index],
1441 DIV_FROM_REG(data->fan_div[nr]));
1442 return sprintf(buf, "%d\n", speed);
1445 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1448 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1449 struct it87_data *data = it87_update_device(dev);
1450 int nr = sensor_attr->index;
1452 return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1455 static ssize_t show_pwm_enable(struct device *dev,
1456 struct device_attribute *attr, char *buf)
1458 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1459 struct it87_data *data = it87_update_device(dev);
1460 int nr = sensor_attr->index;
1462 return sprintf(buf, "%d\n", pwm_mode(data, nr));
1465 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1468 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1469 struct it87_data *data = it87_update_device(dev);
1470 int nr = sensor_attr->index;
1472 return sprintf(buf, "%d\n",
1473 pwm_from_reg(data, data->pwm_duty[nr]));
1476 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1479 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1480 struct it87_data *data = it87_update_device(dev);
1481 int nr = sensor_attr->index;
1485 if (has_pwm_freq2(data) && nr == 1)
1486 index = (data->extra >> 4) & 0x07;
1488 index = (data->fan_ctl >> 4) & 0x07;
1490 freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1492 return sprintf(buf, "%u\n", freq);
1495 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1496 const char *buf, size_t count)
1498 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1500 int index = sattr->index;
1502 struct it87_data *data = dev_get_drvdata(dev);
1506 if (kstrtol(buf, 10, &val) < 0)
1509 mutex_lock(&data->update_lock);
1511 if (has_16bit_fans(data)) {
1512 data->fan[nr][index] = FAN16_TO_REG(val);
1513 it87_write_value(data, data->REG_FAN_MIN[nr],
1514 data->fan[nr][index] & 0xff);
1515 it87_write_value(data, data->REG_FANX_MIN[nr],
1516 data->fan[nr][index] >> 8);
1518 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1521 data->fan_div[nr] = reg & 0x07;
1524 data->fan_div[nr] = (reg >> 3) & 0x07;
1527 data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1530 data->fan[nr][index] =
1531 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1532 it87_write_value(data, data->REG_FAN_MIN[nr],
1533 data->fan[nr][index]);
1536 mutex_unlock(&data->update_lock);
1540 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1541 const char *buf, size_t count)
1543 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1544 struct it87_data *data = dev_get_drvdata(dev);
1545 int nr = sensor_attr->index;
1550 if (kstrtoul(buf, 10, &val) < 0)
1553 mutex_lock(&data->update_lock);
1554 old = it87_read_value(data, IT87_REG_FAN_DIV);
1556 /* Save fan min limit */
1557 min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1562 data->fan_div[nr] = DIV_TO_REG(val);
1566 data->fan_div[nr] = 1;
1568 data->fan_div[nr] = 3;
1571 val |= (data->fan_div[0] & 0x07);
1572 val |= (data->fan_div[1] & 0x07) << 3;
1573 if (data->fan_div[2] == 3)
1575 it87_write_value(data, IT87_REG_FAN_DIV, val);
1577 /* Restore fan min limit */
1578 data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1579 it87_write_value(data, data->REG_FAN_MIN[nr], data->fan[nr][1]);
1581 mutex_unlock(&data->update_lock);
1585 /* Returns 0 if OK, -EINVAL otherwise */
1586 static int check_trip_points(struct device *dev, int nr)
1588 const struct it87_data *data = dev_get_drvdata(dev);
1591 if (has_old_autopwm(data)) {
1592 for (i = 0; i < 3; i++) {
1593 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1596 for (i = 0; i < 2; i++) {
1597 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1600 } else if (has_newer_autopwm(data)) {
1601 for (i = 1; i < 3; i++) {
1602 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1609 "Inconsistent trip points, not switching to automatic mode\n");
1610 dev_err(dev, "Adjust the trip points and try again\n");
1615 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1616 const char *buf, size_t count)
1618 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1619 struct it87_data *data = dev_get_drvdata(dev);
1620 int nr = sensor_attr->index;
1623 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1626 /* Check trip points before switching to automatic mode */
1628 if (check_trip_points(dev, nr) < 0)
1632 mutex_lock(&data->update_lock);
1635 if (nr < 3 && has_fanctl_onoff(data)) {
1637 /* make sure the fan is on when in on/off mode */
1638 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1639 it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1640 /* set on/off mode */
1641 data->fan_main_ctrl &= ~BIT(nr);
1642 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1643 data->fan_main_ctrl);
1647 /* No on/off mode, set maximum pwm value */
1648 data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1649 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1650 data->pwm_duty[nr]);
1651 /* and set manual mode */
1652 if (has_newer_autopwm(data)) {
1653 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1654 data->pwm_temp_map[nr];
1656 ctrl = data->pwm_duty[nr];
1658 data->pwm_ctrl[nr] = ctrl;
1659 it87_write_value(data, data->REG_PWM[nr], ctrl);
1664 if (has_newer_autopwm(data)) {
1665 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1666 data->pwm_temp_map[nr];
1670 ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1672 data->pwm_ctrl[nr] = ctrl;
1673 it87_write_value(data, data->REG_PWM[nr], ctrl);
1675 if (has_fanctl_onoff(data) && nr < 3) {
1676 /* set SmartGuardian mode */
1677 data->fan_main_ctrl |= BIT(nr);
1678 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1679 data->fan_main_ctrl);
1683 mutex_unlock(&data->update_lock);
1687 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1688 const char *buf, size_t count)
1690 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1691 struct it87_data *data = dev_get_drvdata(dev);
1692 int nr = sensor_attr->index;
1695 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1698 mutex_lock(&data->update_lock);
1699 it87_update_pwm_ctrl(data, nr);
1700 if (has_newer_autopwm(data)) {
1702 * If we are in automatic mode, the PWM duty cycle register
1703 * is read-only so we can't write the value.
1705 if (data->pwm_ctrl[nr] & 0x80) {
1706 mutex_unlock(&data->update_lock);
1709 data->pwm_duty[nr] = pwm_to_reg(data, val);
1710 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1711 data->pwm_duty[nr]);
1713 data->pwm_duty[nr] = pwm_to_reg(data, val);
1715 * If we are in manual mode, write the duty cycle immediately;
1716 * otherwise, just store it for later use.
1718 if (!(data->pwm_ctrl[nr] & 0x80)) {
1719 data->pwm_ctrl[nr] = data->pwm_duty[nr];
1720 it87_write_value(data, data->REG_PWM[nr],
1721 data->pwm_ctrl[nr]);
1724 mutex_unlock(&data->update_lock);
1728 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1729 const char *buf, size_t count)
1731 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1732 struct it87_data *data = dev_get_drvdata(dev);
1733 int nr = sensor_attr->index;
1737 if (kstrtoul(buf, 10, &val) < 0)
1740 val = clamp_val(val, 0, 1000000);
1741 val *= has_newer_autopwm(data) ? 256 : 128;
1743 /* Search for the nearest available frequency */
1744 for (i = 0; i < 7; i++) {
1745 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1749 mutex_lock(&data->update_lock);
1751 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1752 data->fan_ctl |= i << 4;
1753 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1755 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1756 data->extra |= i << 4;
1757 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1759 mutex_unlock(&data->update_lock);
1764 static ssize_t show_pwm_temp_map(struct device *dev,
1765 struct device_attribute *attr, char *buf)
1767 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1768 struct it87_data *data = it87_update_device(dev);
1769 int nr = sensor_attr->index;
1772 map = data->pwm_temp_map[nr];
1773 if (has_new_tempmap(data)) {
1776 map = 0; /* Should never happen */
1779 map = 0; /* Should never happen */
1780 if (nr >= 3) /* pwm channels 3..6 map to temp4..6 */
1784 return sprintf(buf, "%d\n", (int)BIT(map));
1787 static ssize_t set_pwm_temp_map(struct device *dev,
1788 struct device_attribute *attr, const char *buf,
1791 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1792 struct it87_data *data = dev_get_drvdata(dev);
1793 int nr = sensor_attr->index;
1797 if (kstrtol(buf, 10, &val) < 0)
1800 if (nr >= 3 && !has_new_tempmap(data))
1829 if (has_new_tempmap(data))
1831 else if (reg > 0x02)
1834 mutex_lock(&data->update_lock);
1835 it87_update_pwm_ctrl(data, nr);
1836 data->pwm_temp_map[nr] = reg;
1838 * If we are in automatic mode, write the temp mapping immediately;
1839 * otherwise, just store it for later use.
1841 if (data->pwm_ctrl[nr] & 0x80) {
1842 u8 mask = has_new_tempmap(data) ? 0xc7 : 0xfc;
1844 data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & mask) |
1845 data->pwm_temp_map[nr];
1846 it87_write_value(data, data->REG_PWM[nr], data->pwm_ctrl[nr]);
1848 mutex_unlock(&data->update_lock);
1852 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1855 struct it87_data *data = it87_update_device(dev);
1856 struct sensor_device_attribute_2 *sensor_attr =
1857 to_sensor_dev_attr_2(attr);
1858 int nr = sensor_attr->nr;
1859 int point = sensor_attr->index;
1861 return sprintf(buf, "%d\n",
1862 pwm_from_reg(data, data->auto_pwm[nr][point]));
1865 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1866 const char *buf, size_t count)
1868 struct it87_data *data = dev_get_drvdata(dev);
1869 struct sensor_device_attribute_2 *sensor_attr =
1870 to_sensor_dev_attr_2(attr);
1871 int nr = sensor_attr->nr;
1872 int point = sensor_attr->index;
1876 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1879 mutex_lock(&data->update_lock);
1880 data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1881 if (has_newer_autopwm(data))
1882 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1884 regaddr = IT87_REG_AUTO_PWM(nr, point);
1885 it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1886 mutex_unlock(&data->update_lock);
1890 static ssize_t show_auto_pwm_slope(struct device *dev,
1891 struct device_attribute *attr, char *buf)
1893 struct it87_data *data = it87_update_device(dev);
1894 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1895 int nr = sensor_attr->index;
1897 return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1900 static ssize_t set_auto_pwm_slope(struct device *dev,
1901 struct device_attribute *attr,
1902 const char *buf, size_t count)
1904 struct it87_data *data = dev_get_drvdata(dev);
1905 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1906 int nr = sensor_attr->index;
1909 if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1912 mutex_lock(&data->update_lock);
1913 data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1914 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1915 data->auto_pwm[nr][1]);
1916 mutex_unlock(&data->update_lock);
1920 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1923 struct it87_data *data = it87_update_device(dev);
1924 struct sensor_device_attribute_2 *sensor_attr =
1925 to_sensor_dev_attr_2(attr);
1926 int nr = sensor_attr->nr;
1927 int point = sensor_attr->index;
1930 if (has_old_autopwm(data) || point)
1931 reg = data->auto_temp[nr][point];
1933 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1935 return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1938 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1939 const char *buf, size_t count)
1941 struct it87_data *data = dev_get_drvdata(dev);
1942 struct sensor_device_attribute_2 *sensor_attr =
1943 to_sensor_dev_attr_2(attr);
1944 int nr = sensor_attr->nr;
1945 int point = sensor_attr->index;
1949 if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1952 mutex_lock(&data->update_lock);
1953 if (has_newer_autopwm(data) && !point) {
1954 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1955 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1956 data->auto_temp[nr][0] = reg;
1957 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1959 reg = TEMP_TO_REG(val);
1960 data->auto_temp[nr][point] = reg;
1961 if (has_newer_autopwm(data))
1963 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1965 mutex_unlock(&data->update_lock);
1969 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1970 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1972 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1975 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1976 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1978 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1981 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1982 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1984 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1987 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1988 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1991 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1992 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1995 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1996 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1999 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
2000 show_pwm_enable, set_pwm_enable, 0);
2001 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
2002 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
2004 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
2005 show_pwm_temp_map, set_pwm_temp_map, 0);
2006 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
2007 show_auto_pwm, set_auto_pwm, 0, 0);
2008 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
2009 show_auto_pwm, set_auto_pwm, 0, 1);
2010 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
2011 show_auto_pwm, set_auto_pwm, 0, 2);
2012 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
2013 show_auto_pwm, NULL, 0, 3);
2014 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
2015 show_auto_temp, set_auto_temp, 0, 1);
2016 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2017 show_auto_temp, set_auto_temp, 0, 0);
2018 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
2019 show_auto_temp, set_auto_temp, 0, 2);
2020 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
2021 show_auto_temp, set_auto_temp, 0, 3);
2022 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
2023 show_auto_temp, set_auto_temp, 0, 4);
2024 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
2025 show_auto_pwm, set_auto_pwm, 0, 0);
2026 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
2027 show_auto_pwm_slope, set_auto_pwm_slope, 0);
2029 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
2030 show_pwm_enable, set_pwm_enable, 1);
2031 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
2032 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
2033 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
2034 show_pwm_temp_map, set_pwm_temp_map, 1);
2035 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
2036 show_auto_pwm, set_auto_pwm, 1, 0);
2037 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
2038 show_auto_pwm, set_auto_pwm, 1, 1);
2039 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
2040 show_auto_pwm, set_auto_pwm, 1, 2);
2041 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
2042 show_auto_pwm, NULL, 1, 3);
2043 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
2044 show_auto_temp, set_auto_temp, 1, 1);
2045 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2046 show_auto_temp, set_auto_temp, 1, 0);
2047 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
2048 show_auto_temp, set_auto_temp, 1, 2);
2049 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
2050 show_auto_temp, set_auto_temp, 1, 3);
2051 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
2052 show_auto_temp, set_auto_temp, 1, 4);
2053 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
2054 show_auto_pwm, set_auto_pwm, 1, 0);
2055 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
2056 show_auto_pwm_slope, set_auto_pwm_slope, 1);
2058 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
2059 show_pwm_enable, set_pwm_enable, 2);
2060 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
2061 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
2062 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
2063 show_pwm_temp_map, set_pwm_temp_map, 2);
2064 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
2065 show_auto_pwm, set_auto_pwm, 2, 0);
2066 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
2067 show_auto_pwm, set_auto_pwm, 2, 1);
2068 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
2069 show_auto_pwm, set_auto_pwm, 2, 2);
2070 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
2071 show_auto_pwm, NULL, 2, 3);
2072 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
2073 show_auto_temp, set_auto_temp, 2, 1);
2074 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2075 show_auto_temp, set_auto_temp, 2, 0);
2076 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
2077 show_auto_temp, set_auto_temp, 2, 2);
2078 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
2079 show_auto_temp, set_auto_temp, 2, 3);
2080 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
2081 show_auto_temp, set_auto_temp, 2, 4);
2082 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
2083 show_auto_pwm, set_auto_pwm, 2, 0);
2084 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
2085 show_auto_pwm_slope, set_auto_pwm_slope, 2);
2087 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
2088 show_pwm_enable, set_pwm_enable, 3);
2089 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
2090 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
2091 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
2092 show_pwm_temp_map, set_pwm_temp_map, 3);
2093 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
2094 show_auto_temp, set_auto_temp, 2, 1);
2095 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2096 show_auto_temp, set_auto_temp, 2, 0);
2097 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
2098 show_auto_temp, set_auto_temp, 2, 2);
2099 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
2100 show_auto_temp, set_auto_temp, 2, 3);
2101 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
2102 show_auto_pwm, set_auto_pwm, 3, 0);
2103 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
2104 show_auto_pwm_slope, set_auto_pwm_slope, 3);
2106 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
2107 show_pwm_enable, set_pwm_enable, 4);
2108 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
2109 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
2110 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
2111 show_pwm_temp_map, set_pwm_temp_map, 4);
2112 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
2113 show_auto_temp, set_auto_temp, 2, 1);
2114 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2115 show_auto_temp, set_auto_temp, 2, 0);
2116 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
2117 show_auto_temp, set_auto_temp, 2, 2);
2118 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
2119 show_auto_temp, set_auto_temp, 2, 3);
2120 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
2121 show_auto_pwm, set_auto_pwm, 4, 0);
2122 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
2123 show_auto_pwm_slope, set_auto_pwm_slope, 4);
2125 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
2126 show_pwm_enable, set_pwm_enable, 5);
2127 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
2128 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
2129 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
2130 show_pwm_temp_map, set_pwm_temp_map, 5);
2131 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
2132 show_auto_temp, set_auto_temp, 2, 1);
2133 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
2134 show_auto_temp, set_auto_temp, 2, 0);
2135 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
2136 show_auto_temp, set_auto_temp, 2, 2);
2137 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
2138 show_auto_temp, set_auto_temp, 2, 3);
2139 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
2140 show_auto_pwm, set_auto_pwm, 5, 0);
2141 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
2142 show_auto_pwm_slope, set_auto_pwm_slope, 5);
2145 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
2148 struct it87_data *data = it87_update_device(dev);
2150 return sprintf(buf, "%u\n", data->alarms);
2152 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
2154 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
2157 struct it87_data *data = it87_update_device(dev);
2158 int bitnr = to_sensor_dev_attr(attr)->index;
2160 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
2163 static ssize_t clear_intrusion(struct device *dev,
2164 struct device_attribute *attr, const char *buf,
2167 struct it87_data *data = dev_get_drvdata(dev);
2171 if (kstrtol(buf, 10, &val) < 0 || val != 0)
2174 mutex_lock(&data->update_lock);
2175 config = it87_read_value(data, IT87_REG_CONFIG);
2180 it87_write_value(data, IT87_REG_CONFIG, config);
2181 /* Invalidate cache to force re-read */
2184 mutex_unlock(&data->update_lock);
2189 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
2190 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
2191 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
2192 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
2193 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
2194 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
2195 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
2196 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
2197 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
2198 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
2199 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
2200 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
2201 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
2202 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
2203 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
2204 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
2205 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
2206 static SENSOR_DEVICE_ATTR(temp4_alarm, S_IRUGO, show_alarm, NULL, 19);
2207 static SENSOR_DEVICE_ATTR(temp5_alarm, S_IRUGO, show_alarm, NULL, 20);
2208 static SENSOR_DEVICE_ATTR(temp6_alarm, S_IRUGO, show_alarm, NULL, 21);
2209 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
2210 show_alarm, clear_intrusion, 4);
2212 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
2215 struct it87_data *data = it87_update_device(dev);
2216 int bitnr = to_sensor_dev_attr(attr)->index;
2218 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
2221 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
2222 const char *buf, size_t count)
2224 int bitnr = to_sensor_dev_attr(attr)->index;
2225 struct it87_data *data = dev_get_drvdata(dev);
2228 if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
2231 mutex_lock(&data->update_lock);
2232 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
2234 data->beeps |= BIT(bitnr);
2236 data->beeps &= ~BIT(bitnr);
2237 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
2238 mutex_unlock(&data->update_lock);
2242 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
2243 show_beep, set_beep, 1);
2244 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
2245 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
2246 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
2247 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
2248 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
2249 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
2250 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
2251 /* fanX_beep writability is set later */
2252 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
2253 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
2254 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
2255 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
2256 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
2257 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
2258 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
2259 show_beep, set_beep, 2);
2260 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
2261 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
2262 static SENSOR_DEVICE_ATTR(temp4_beep, S_IRUGO, show_beep, NULL, 2);
2263 static SENSOR_DEVICE_ATTR(temp5_beep, S_IRUGO, show_beep, NULL, 2);
2264 static SENSOR_DEVICE_ATTR(temp6_beep, S_IRUGO, show_beep, NULL, 2);
2266 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
2269 struct it87_data *data = dev_get_drvdata(dev);
2271 return sprintf(buf, "%u\n", data->vrm);
2274 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
2275 const char *buf, size_t count)
2277 struct it87_data *data = dev_get_drvdata(dev);
2280 if (kstrtoul(buf, 10, &val) < 0)
2287 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
2289 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
2292 struct it87_data *data = it87_update_device(dev);
2294 return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
2296 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
2298 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
2301 static const char * const labels[] = {
2307 static const char * const labels_it8721[] = {
2313 struct it87_data *data = dev_get_drvdata(dev);
2314 int nr = to_sensor_dev_attr(attr)->index;
2317 if (has_vin3_5v(data) && nr == 0)
2319 else if (has_12mv_adc(data) || has_10_9mv_adc(data) ||
2321 label = labels_it8721[nr];
2325 return sprintf(buf, "%s\n", label);
2327 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
2328 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
2329 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
2331 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
2333 static umode_t it87_in_is_visible(struct kobject *kobj,
2334 struct attribute *attr, int index)
2336 struct device *dev = container_of(kobj, struct device, kobj);
2337 struct it87_data *data = dev_get_drvdata(dev);
2338 int i = index / 5; /* voltage index */
2339 int a = index % 5; /* attribute index */
2341 if (index >= 40) { /* in8 and higher only have input attributes */
2346 if (!(data->has_in & BIT(i)))
2349 if (a == 4 && !data->has_beep)
2355 static struct attribute *it87_attributes_in[] = {
2356 &sensor_dev_attr_in0_input.dev_attr.attr,
2357 &sensor_dev_attr_in0_min.dev_attr.attr,
2358 &sensor_dev_attr_in0_max.dev_attr.attr,
2359 &sensor_dev_attr_in0_alarm.dev_attr.attr,
2360 &sensor_dev_attr_in0_beep.dev_attr.attr, /* 4 */
2362 &sensor_dev_attr_in1_input.dev_attr.attr,
2363 &sensor_dev_attr_in1_min.dev_attr.attr,
2364 &sensor_dev_attr_in1_max.dev_attr.attr,
2365 &sensor_dev_attr_in1_alarm.dev_attr.attr,
2366 &sensor_dev_attr_in1_beep.dev_attr.attr, /* 9 */
2368 &sensor_dev_attr_in2_input.dev_attr.attr,
2369 &sensor_dev_attr_in2_min.dev_attr.attr,
2370 &sensor_dev_attr_in2_max.dev_attr.attr,
2371 &sensor_dev_attr_in2_alarm.dev_attr.attr,
2372 &sensor_dev_attr_in2_beep.dev_attr.attr, /* 14 */
2374 &sensor_dev_attr_in3_input.dev_attr.attr,
2375 &sensor_dev_attr_in3_min.dev_attr.attr,
2376 &sensor_dev_attr_in3_max.dev_attr.attr,
2377 &sensor_dev_attr_in3_alarm.dev_attr.attr,
2378 &sensor_dev_attr_in3_beep.dev_attr.attr, /* 19 */
2380 &sensor_dev_attr_in4_input.dev_attr.attr,
2381 &sensor_dev_attr_in4_min.dev_attr.attr,
2382 &sensor_dev_attr_in4_max.dev_attr.attr,
2383 &sensor_dev_attr_in4_alarm.dev_attr.attr,
2384 &sensor_dev_attr_in4_beep.dev_attr.attr, /* 24 */
2386 &sensor_dev_attr_in5_input.dev_attr.attr,
2387 &sensor_dev_attr_in5_min.dev_attr.attr,
2388 &sensor_dev_attr_in5_max.dev_attr.attr,
2389 &sensor_dev_attr_in5_alarm.dev_attr.attr,
2390 &sensor_dev_attr_in5_beep.dev_attr.attr, /* 29 */
2392 &sensor_dev_attr_in6_input.dev_attr.attr,
2393 &sensor_dev_attr_in6_min.dev_attr.attr,
2394 &sensor_dev_attr_in6_max.dev_attr.attr,
2395 &sensor_dev_attr_in6_alarm.dev_attr.attr,
2396 &sensor_dev_attr_in6_beep.dev_attr.attr, /* 34 */
2398 &sensor_dev_attr_in7_input.dev_attr.attr,
2399 &sensor_dev_attr_in7_min.dev_attr.attr,
2400 &sensor_dev_attr_in7_max.dev_attr.attr,
2401 &sensor_dev_attr_in7_alarm.dev_attr.attr,
2402 &sensor_dev_attr_in7_beep.dev_attr.attr, /* 39 */
2404 &sensor_dev_attr_in8_input.dev_attr.attr, /* 40 */
2405 &sensor_dev_attr_in9_input.dev_attr.attr, /* 41 */
2406 &sensor_dev_attr_in10_input.dev_attr.attr, /* 42 */
2407 &sensor_dev_attr_in11_input.dev_attr.attr, /* 43 */
2408 &sensor_dev_attr_in12_input.dev_attr.attr, /* 44 */
2412 static const struct attribute_group it87_group_in = {
2413 .attrs = it87_attributes_in,
2414 .is_visible = it87_in_is_visible,
2417 static umode_t it87_temp_is_visible(struct kobject *kobj,
2418 struct attribute *attr, int index)
2420 struct device *dev = container_of(kobj, struct device, kobj);
2421 struct it87_data *data = dev_get_drvdata(dev);
2422 int i = index / 7; /* temperature index */
2423 int a = index % 7; /* attribute index */
2425 if (!(data->has_temp & BIT(i)))
2428 if (a && i >= data->num_temp_limit)
2432 int type = get_temp_type(data, i);
2436 if (has_bank_sel(data))
2441 if (a == 5 && !has_temp_offset(data))
2444 if (a == 6 && !data->has_beep)
2450 static struct attribute *it87_attributes_temp[] = {
2451 &sensor_dev_attr_temp1_input.dev_attr.attr,
2452 &sensor_dev_attr_temp1_max.dev_attr.attr,
2453 &sensor_dev_attr_temp1_min.dev_attr.attr,
2454 &sensor_dev_attr_temp1_type.dev_attr.attr, /* 3 */
2455 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2456 &sensor_dev_attr_temp1_offset.dev_attr.attr, /* 5 */
2457 &sensor_dev_attr_temp1_beep.dev_attr.attr, /* 6 */
2459 &sensor_dev_attr_temp2_input.dev_attr.attr, /* 7 */
2460 &sensor_dev_attr_temp2_max.dev_attr.attr,
2461 &sensor_dev_attr_temp2_min.dev_attr.attr,
2462 &sensor_dev_attr_temp2_type.dev_attr.attr,
2463 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2464 &sensor_dev_attr_temp2_offset.dev_attr.attr,
2465 &sensor_dev_attr_temp2_beep.dev_attr.attr,
2467 &sensor_dev_attr_temp3_input.dev_attr.attr, /* 14 */
2468 &sensor_dev_attr_temp3_max.dev_attr.attr,
2469 &sensor_dev_attr_temp3_min.dev_attr.attr,
2470 &sensor_dev_attr_temp3_type.dev_attr.attr,
2471 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2472 &sensor_dev_attr_temp3_offset.dev_attr.attr,
2473 &sensor_dev_attr_temp3_beep.dev_attr.attr,
2475 &sensor_dev_attr_temp4_input.dev_attr.attr, /* 21 */
2476 &sensor_dev_attr_temp4_max.dev_attr.attr,
2477 &sensor_dev_attr_temp4_min.dev_attr.attr,
2478 &sensor_dev_attr_temp4_type.dev_attr.attr,
2479 &sensor_dev_attr_temp4_alarm.dev_attr.attr,
2480 &sensor_dev_attr_temp4_offset.dev_attr.attr,
2481 &sensor_dev_attr_temp4_beep.dev_attr.attr,
2483 &sensor_dev_attr_temp5_input.dev_attr.attr,
2484 &sensor_dev_attr_temp5_max.dev_attr.attr,
2485 &sensor_dev_attr_temp5_min.dev_attr.attr,
2486 &sensor_dev_attr_temp5_type.dev_attr.attr,
2487 &sensor_dev_attr_temp5_alarm.dev_attr.attr,
2488 &sensor_dev_attr_temp5_offset.dev_attr.attr,
2489 &sensor_dev_attr_temp5_beep.dev_attr.attr,
2491 &sensor_dev_attr_temp6_input.dev_attr.attr,
2492 &sensor_dev_attr_temp6_max.dev_attr.attr,
2493 &sensor_dev_attr_temp6_min.dev_attr.attr,
2494 &sensor_dev_attr_temp6_type.dev_attr.attr,
2495 &sensor_dev_attr_temp6_alarm.dev_attr.attr,
2496 &sensor_dev_attr_temp6_offset.dev_attr.attr,
2497 &sensor_dev_attr_temp6_beep.dev_attr.attr,
2501 static const struct attribute_group it87_group_temp = {
2502 .attrs = it87_attributes_temp,
2503 .is_visible = it87_temp_is_visible,
2506 static umode_t it87_is_visible(struct kobject *kobj,
2507 struct attribute *attr, int index)
2509 struct device *dev = container_of(kobj, struct device, kobj);
2510 struct it87_data *data = dev_get_drvdata(dev);
2512 if ((index == 2 || index == 3) && !data->has_vid)
2515 if (index > 3 && !(data->in_internal & BIT(index - 4)))
2521 static struct attribute *it87_attributes[] = {
2522 &dev_attr_alarms.attr,
2523 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2524 &dev_attr_vrm.attr, /* 2 */
2525 &dev_attr_cpu0_vid.attr, /* 3 */
2526 &sensor_dev_attr_in3_label.dev_attr.attr, /* 4 .. 7 */
2527 &sensor_dev_attr_in7_label.dev_attr.attr,
2528 &sensor_dev_attr_in8_label.dev_attr.attr,
2529 &sensor_dev_attr_in9_label.dev_attr.attr,
2533 static const struct attribute_group it87_group = {
2534 .attrs = it87_attributes,
2535 .is_visible = it87_is_visible,
2538 static umode_t it87_fan_is_visible(struct kobject *kobj,
2539 struct attribute *attr, int index)
2541 struct device *dev = container_of(kobj, struct device, kobj);
2542 struct it87_data *data = dev_get_drvdata(dev);
2543 int i = index / 5; /* fan index */
2544 int a = index % 5; /* attribute index */
2546 if (index >= 15) { /* fan 4..6 don't have divisor attributes */
2547 i = (index - 15) / 4 + 3;
2548 a = (index - 15) % 4;
2551 if (!(data->has_fan & BIT(i)))
2554 if (a == 3) { /* beep */
2555 if (!data->has_beep)
2557 /* first fan beep attribute is writable */
2558 if (i == __ffs(data->has_fan))
2559 return attr->mode | S_IWUSR;
2562 if (a == 4 && has_16bit_fans(data)) /* divisor */
2568 static struct attribute *it87_attributes_fan[] = {
2569 &sensor_dev_attr_fan1_input.dev_attr.attr,
2570 &sensor_dev_attr_fan1_min.dev_attr.attr,
2571 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2572 &sensor_dev_attr_fan1_beep.dev_attr.attr, /* 3 */
2573 &sensor_dev_attr_fan1_div.dev_attr.attr, /* 4 */
2575 &sensor_dev_attr_fan2_input.dev_attr.attr,
2576 &sensor_dev_attr_fan2_min.dev_attr.attr,
2577 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2578 &sensor_dev_attr_fan2_beep.dev_attr.attr,
2579 &sensor_dev_attr_fan2_div.dev_attr.attr, /* 9 */
2581 &sensor_dev_attr_fan3_input.dev_attr.attr,
2582 &sensor_dev_attr_fan3_min.dev_attr.attr,
2583 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2584 &sensor_dev_attr_fan3_beep.dev_attr.attr,
2585 &sensor_dev_attr_fan3_div.dev_attr.attr, /* 14 */
2587 &sensor_dev_attr_fan4_input.dev_attr.attr, /* 15 */
2588 &sensor_dev_attr_fan4_min.dev_attr.attr,
2589 &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2590 &sensor_dev_attr_fan4_beep.dev_attr.attr,
2592 &sensor_dev_attr_fan5_input.dev_attr.attr, /* 19 */
2593 &sensor_dev_attr_fan5_min.dev_attr.attr,
2594 &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2595 &sensor_dev_attr_fan5_beep.dev_attr.attr,
2597 &sensor_dev_attr_fan6_input.dev_attr.attr, /* 23 */
2598 &sensor_dev_attr_fan6_min.dev_attr.attr,
2599 &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2600 &sensor_dev_attr_fan6_beep.dev_attr.attr,
2604 static const struct attribute_group it87_group_fan = {
2605 .attrs = it87_attributes_fan,
2606 .is_visible = it87_fan_is_visible,
2609 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2610 struct attribute *attr, int index)
2612 struct device *dev = container_of(kobj, struct device, kobj);
2613 struct it87_data *data = dev_get_drvdata(dev);
2614 int i = index / 4; /* pwm index */
2615 int a = index % 4; /* attribute index */
2617 if (!(data->has_pwm & BIT(i)))
2620 /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2621 if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2622 return attr->mode | S_IWUSR;
2624 /* pwm2_freq is writable if there are two pwm frequency selects */
2625 if (has_pwm_freq2(data) && i == 1 && a == 2)
2626 return attr->mode | S_IWUSR;
2631 static struct attribute *it87_attributes_pwm[] = {
2632 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2633 &sensor_dev_attr_pwm1.dev_attr.attr,
2634 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2635 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2637 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2638 &sensor_dev_attr_pwm2.dev_attr.attr,
2639 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2640 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2642 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2643 &sensor_dev_attr_pwm3.dev_attr.attr,
2644 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2645 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2647 &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2648 &sensor_dev_attr_pwm4.dev_attr.attr,
2649 &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2650 &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2652 &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2653 &sensor_dev_attr_pwm5.dev_attr.attr,
2654 &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2655 &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2657 &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2658 &sensor_dev_attr_pwm6.dev_attr.attr,
2659 &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2660 &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2665 static const struct attribute_group it87_group_pwm = {
2666 .attrs = it87_attributes_pwm,
2667 .is_visible = it87_pwm_is_visible,
2670 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2671 struct attribute *attr, int index)
2673 struct device *dev = container_of(kobj, struct device, kobj);
2674 struct it87_data *data = dev_get_drvdata(dev);
2675 int i = index / 11; /* pwm index */
2676 int a = index % 11; /* attribute index */
2678 if (index >= 33) { /* pwm 4..6 */
2679 i = (index - 33) / 6 + 3;
2680 a = (index - 33) % 6 + 4;
2683 if (!(data->has_pwm & BIT(i)))
2686 if (has_newer_autopwm(data)) {
2687 if (a < 4) /* no auto point pwm */
2689 if (a == 8) /* no auto_point4 */
2692 if (has_old_autopwm(data)) {
2693 if (a >= 9) /* no pwm_auto_start, pwm_auto_slope */
2700 static struct attribute *it87_attributes_auto_pwm[] = {
2701 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2702 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2703 &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2704 &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2705 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2706 &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2707 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2708 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2709 &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2710 &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2711 &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2713 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, /* 11 */
2714 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2715 &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2716 &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2717 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2718 &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2719 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2720 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2721 &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2722 &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2723 &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2725 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, /* 22 */
2726 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2727 &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2728 &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2729 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2730 &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2731 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2732 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2733 &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2734 &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2735 &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2737 &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr, /* 33 */
2738 &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2739 &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2740 &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2741 &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2742 &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2744 &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2745 &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2746 &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2747 &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2748 &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2749 &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2751 &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2752 &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2753 &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2754 &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2755 &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2756 &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2761 static const struct attribute_group it87_group_auto_pwm = {
2762 .attrs = it87_attributes_auto_pwm,
2763 .is_visible = it87_auto_pwm_is_visible,
2766 /* SuperIO detection - will change isa_address if a chip is found */
2767 static int __init it87_find(int sioaddr, unsigned short *address,
2768 struct it87_sio_data *sio_data)
2772 const struct it87_devices *config;
2774 err = superio_enter(sioaddr);
2779 chip_type = superio_inw(sioaddr, DEVID);
2780 if (chip_type == 0xffff)
2784 chip_type = force_id;
2786 switch (chip_type) {
2788 sio_data->type = it87;
2791 sio_data->type = it8712;
2795 sio_data->type = it8716;
2798 sio_data->type = it8718;
2801 sio_data->type = it8720;
2804 sio_data->type = it8721;
2807 sio_data->type = it8728;
2810 sio_data->type = it8732;
2813 sio_data->type = it8792;
2816 sio_data->type = it8771;
2819 sio_data->type = it8772;
2822 sio_data->type = it8781;
2825 sio_data->type = it8782;
2828 sio_data->type = it8783;
2831 sio_data->type = it8786;
2834 sio_data->type = it8790;
2838 sio_data->type = it8603;
2841 sio_data->type = it8607;
2844 sio_data->type = it8613;
2847 sio_data->type = it8620;
2850 sio_data->type = it8622;
2853 sio_data->type = it8625;
2856 sio_data->type = it8628;
2859 sio_data->type = it8655;
2862 sio_data->type = it8665;
2865 sio_data->type = it8686;
2867 case 0xffff: /* No device at all */
2870 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2874 superio_select(sioaddr, PME);
2875 if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2876 pr_info("Device not activated, skipping\n");
2880 *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2881 if (*address == 0) {
2882 pr_info("Base address not set, skipping\n");
2887 sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2888 pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2889 it87_devices[sio_data->type].suffix,
2890 *address, sio_data->revision);
2892 config = &it87_devices[sio_data->type];
2894 /* in7 (VSB or VCCH5V) is always internal on some chips */
2895 if (has_in7_internal(config))
2896 sio_data->internal |= BIT(1);
2898 /* in8 (Vbat) is always internal */
2899 sio_data->internal |= BIT(2);
2901 /* in9 (AVCC3), always internal if supported */
2902 if (has_avcc3(config))
2903 sio_data->internal |= BIT(3); /* in9 is AVCC */
2905 sio_data->skip_in |= BIT(9);
2907 if (!has_four_pwm(config))
2908 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2909 else if (!has_five_pwm(config))
2910 sio_data->skip_pwm |= BIT(4) | BIT(5);
2911 else if (!has_six_pwm(config))
2912 sio_data->skip_pwm |= BIT(5);
2914 if (!has_vid(config))
2915 sio_data->skip_vid = 1;
2917 /* Read GPIO config and VID value from LDN 7 (GPIO) */
2918 if (sio_data->type == it87) {
2919 /* The IT8705F has a different LD number for GPIO */
2920 superio_select(sioaddr, 5);
2921 sio_data->beep_pin = superio_inb(sioaddr,
2922 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2923 } else if (sio_data->type == it8783) {
2924 int reg25, reg27, reg2a, reg2c, regef;
2926 superio_select(sioaddr, GPIO);
2928 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2929 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2930 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2931 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2932 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2934 /* Check if fan3 is there or not */
2935 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2936 sio_data->skip_fan |= BIT(2);
2937 if ((reg25 & BIT(4)) ||
2938 (!(reg2a & BIT(1)) && (regef & BIT(0))))
2939 sio_data->skip_pwm |= BIT(2);
2941 /* Check if fan2 is there or not */
2943 sio_data->skip_fan |= BIT(1);
2945 sio_data->skip_pwm |= BIT(1);
2948 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2949 sio_data->skip_in |= BIT(5); /* No VIN5 */
2953 sio_data->skip_in |= BIT(6); /* No VIN6 */
2957 * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2959 if (reg27 & BIT(2)) {
2961 * The data sheet is a bit unclear regarding the
2962 * internal voltage divider for VCCH5V. It says
2963 * "This bit enables and switches VIN7 (pin 91) to the
2964 * internal voltage divider for VCCH5V".
2965 * This is different to other chips, where the internal
2966 * voltage divider would connect VIN7 to an internal
2967 * voltage source. Maybe that is the case here as well.
2969 * Since we don't know for sure, re-route it if that is
2970 * not the case, and ask the user to report if the
2971 * resulting voltage is sane.
2973 if (!(reg2c & BIT(1))) {
2975 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2977 pr_notice("Routing internal VCCH5V to in7.\n");
2979 pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2980 pr_notice("Please report if it displays a reasonable voltage.\n");
2984 sio_data->internal |= BIT(0);
2986 sio_data->internal |= BIT(1);
2988 sio_data->beep_pin = superio_inb(sioaddr,
2989 IT87_SIO_BEEP_PIN_REG) & 0x3f;
2990 } else if (sio_data->type == it8603 || sio_data->type == it8607) {
2993 superio_select(sioaddr, GPIO);
2995 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2997 /* Check if fan3 is there or not */
2999 sio_data->skip_pwm |= BIT(2);
3001 sio_data->skip_fan |= BIT(2);
3003 /* Check if fan2 is there or not */
3004 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3006 sio_data->skip_pwm |= BIT(1);
3008 sio_data->skip_fan |= BIT(1);
3010 if (sio_data->type == it8603) {
3011 sio_data->skip_in |= BIT(5); /* No VIN5 */
3012 sio_data->skip_in |= BIT(6); /* No VIN6 */
3015 sio_data->beep_pin = superio_inb(sioaddr,
3016 IT87_SIO_BEEP_PIN_REG) & 0x3f;
3017 } else if (sio_data->type == it8613) {
3018 int reg27, reg29, reg2a;
3020 superio_select(sioaddr, GPIO);
3022 /* Check for pwm3, fan3, pwm5, fan5 */
3023 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3025 sio_data->skip_fan |= BIT(4);
3027 sio_data->skip_pwm |= BIT(4);
3029 sio_data->skip_pwm |= BIT(2);
3031 sio_data->skip_fan |= BIT(2);
3033 /* Check for pwm2, fan2 */
3034 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3036 sio_data->skip_pwm |= BIT(1);
3038 sio_data->skip_fan |= BIT(1);
3040 /* Check for pwm4, fan4 */
3041 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
3042 if (!(reg2a & BIT(0)) || (reg29 & BIT(7))) {
3043 sio_data->skip_fan |= BIT(3);
3044 sio_data->skip_pwm |= BIT(3);
3047 sio_data->skip_pwm |= BIT(0); /* No pwm1 */
3048 sio_data->skip_fan |= BIT(0); /* No fan1 */
3049 sio_data->skip_in |= BIT(3); /* No VIN3 */
3050 sio_data->skip_in |= BIT(6); /* No VIN6 */
3052 sio_data->beep_pin = superio_inb(sioaddr,
3053 IT87_SIO_BEEP_PIN_REG) & 0x3f;
3054 } else if (sio_data->type == it8620 || sio_data->type == it8628 ||
3055 sio_data->type == it8686) {
3058 superio_select(sioaddr, GPIO);
3060 /* Check for pwm5 */
3061 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3063 sio_data->skip_pwm |= BIT(4);
3065 /* Check for fan4, fan5 */
3066 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3067 if (!(reg & BIT(5)))
3068 sio_data->skip_fan |= BIT(3);
3069 if (!(reg & BIT(4)))
3070 sio_data->skip_fan |= BIT(4);
3072 /* Check for pwm3, fan3 */
3073 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3075 sio_data->skip_pwm |= BIT(2);
3077 sio_data->skip_fan |= BIT(2);
3079 /* Check for pwm4 */
3080 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
3082 sio_data->skip_pwm |= BIT(3);
3084 /* Check for pwm2, fan2 */
3085 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3087 sio_data->skip_pwm |= BIT(1);
3089 sio_data->skip_fan |= BIT(1);
3090 /* Check for pwm6, fan6 */
3091 if (!(reg & BIT(7))) {
3092 sio_data->skip_pwm |= BIT(5);
3093 sio_data->skip_fan |= BIT(5);
3096 /* Check if AVCC is on VIN3 */
3097 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3099 /* For it8686, the bit just enables AVCC3 */
3100 if (sio_data->type != it8686)
3101 sio_data->internal |= BIT(0);
3103 sio_data->internal &= ~BIT(3);
3104 sio_data->skip_in |= BIT(9);
3107 sio_data->beep_pin = superio_inb(sioaddr,
3108 IT87_SIO_BEEP_PIN_REG) & 0x3f;
3109 } else if (sio_data->type == it8622) {
3112 superio_select(sioaddr, GPIO);
3114 /* Check for pwm4, fan4 */
3115 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3117 sio_data->skip_fan |= BIT(3);
3119 sio_data->skip_pwm |= BIT(3);
3121 /* Check for pwm3, fan3, pwm5, fan5 */
3122 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3124 sio_data->skip_pwm |= BIT(2);
3126 sio_data->skip_fan |= BIT(2);
3128 sio_data->skip_pwm |= BIT(4);
3130 sio_data->skip_fan |= BIT(4);
3132 /* Check for pwm2, fan2 */
3133 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3135 sio_data->skip_pwm |= BIT(1);
3137 sio_data->skip_fan |= BIT(1);
3139 /* Check for AVCC */
3140 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3141 if (!(reg & BIT(0)))
3142 sio_data->skip_in |= BIT(9);
3144 sio_data->beep_pin = superio_inb(sioaddr,
3145 IT87_SIO_BEEP_PIN_REG) & 0x3f;
3146 } else if (sio_data->type == it8732) {
3149 superio_select(sioaddr, GPIO);
3151 /* Check for pwm2, fan2 */
3152 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3154 sio_data->skip_pwm |= BIT(1);
3156 sio_data->skip_fan |= BIT(1);
3158 /* Check for pwm3, fan3, fan4 */
3159 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3161 sio_data->skip_pwm |= BIT(2);
3163 sio_data->skip_fan |= BIT(2);
3165 sio_data->skip_fan |= BIT(3);
3167 /* Check if AVCC is on VIN3 */
3168 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3170 sio_data->internal |= BIT(0);
3172 sio_data->beep_pin = superio_inb(sioaddr,
3173 IT87_SIO_BEEP_PIN_REG) & 0x3f;
3174 } else if (sio_data->type == it8655) {
3177 superio_select(sioaddr, GPIO);
3179 /* Check for pwm2 */
3180 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3182 sio_data->skip_pwm |= BIT(1);
3184 /* Check for fan2 */
3185 reg = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
3187 sio_data->skip_fan |= BIT(1);
3189 /* Check for pwm3, fan3 */
3190 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3192 sio_data->skip_pwm |= BIT(2);
3194 sio_data->skip_fan |= BIT(2);
3196 sio_data->beep_pin = superio_inb(sioaddr,
3197 IT87_SIO_BEEP_PIN_REG) & 0x3f;
3198 } else if (sio_data->type == it8665 || sio_data->type == it8625) {
3199 int reg27, reg29, reg2d, regd3;
3201 superio_select(sioaddr, GPIO);
3203 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3204 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3205 reg2d = superio_inb(sioaddr, IT87_SIO_PINX4_REG);
3206 regd3 = superio_inb(sioaddr, IT87_SIO_GPIO9_REG);
3208 /* Check for pwm2, fan2 */
3210 sio_data->skip_pwm |= BIT(1);
3212 sio_data->skip_fan |= BIT(1);
3214 /* Check for pwm3, fan3 */
3216 sio_data->skip_pwm |= BIT(2);
3218 sio_data->skip_fan |= BIT(2);
3220 /* Check for pwm4, fan4, pwm5, fan5 */
3221 if (sio_data->type == it8625) {
3222 int reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
3225 sio_data->skip_fan |= BIT(3);
3227 sio_data->skip_pwm |= BIT(3);
3229 sio_data->skip_pwm |= BIT(4);
3231 sio_data->skip_fan |= BIT(4);
3233 int reg26 = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3236 sio_data->skip_pwm |= BIT(3);
3238 sio_data->skip_fan |= BIT(3);
3240 sio_data->skip_pwm |= BIT(4);
3241 if (!(reg26 & BIT(4)))
3242 sio_data->skip_fan |= BIT(4);
3245 /* Check for pwm6, fan6 */
3247 sio_data->skip_pwm |= BIT(5);
3249 sio_data->skip_fan |= BIT(5);
3251 sio_data->beep_pin = superio_inb(sioaddr,
3252 IT87_SIO_BEEP_PIN_REG) & 0x3f;
3257 superio_select(sioaddr, GPIO);
3259 /* Check for fan4, fan5 */
3260 if (has_five_fans(config)) {
3261 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
3262 switch (sio_data->type) {
3265 sio_data->skip_fan |= BIT(3);
3267 sio_data->skip_fan |= BIT(4);
3272 if (!(reg & BIT(5)))
3273 sio_data->skip_fan |= BIT(3);
3274 if (!(reg & BIT(4)))
3275 sio_data->skip_fan |= BIT(4);
3282 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
3283 if (!sio_data->skip_vid) {
3284 /* We need at least 4 VID pins */
3286 pr_info("VID is disabled (pins used for GPIO)\n");
3287 sio_data->skip_vid = 1;
3291 /* Check if fan3 is there or not */
3293 sio_data->skip_pwm |= BIT(2);
3295 sio_data->skip_fan |= BIT(2);
3297 /* Check if fan2 is there or not */
3298 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
3300 sio_data->skip_pwm |= BIT(1);
3302 sio_data->skip_fan |= BIT(1);
3304 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
3305 !(sio_data->skip_vid))
3306 sio_data->vid_value = superio_inb(sioaddr,
3309 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
3311 uart6 = sio_data->type == it8782 && (reg & BIT(2));
3314 * The IT8720F has no VIN7 pin, so VCCH should always be
3315 * routed internally to VIN7 with an internal divider.
3316 * Curiously, there still is a configuration bit to control
3317 * this, which means it can be set incorrectly. And even
3318 * more curiously, many boards out there are improperly
3319 * configured, even though the IT8720F datasheet claims
3320 * that the internal routing of VCCH to VIN7 is the default
3321 * setting. So we force the internal routing in this case.
3323 * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
3324 * If UART6 is enabled, re-route VIN7 to the internal divider
3325 * if that is not already the case.
3327 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
3329 superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
3330 pr_notice("Routing internal VCCH to in7\n");
3333 sio_data->internal |= BIT(0);
3335 sio_data->internal |= BIT(1);
3338 * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
3339 * While VIN7 can be routed to the internal voltage divider,
3340 * VIN5 and VIN6 are not available if UART6 is enabled.
3342 * Also, temp3 is not available if UART6 is enabled and TEMPIN3
3343 * is the temperature source. Since we can not read the
3344 * temperature source here, skip_temp is preliminary.
3347 sio_data->skip_in |= BIT(5) | BIT(6);
3348 sio_data->skip_temp |= BIT(2);
3351 sio_data->beep_pin = superio_inb(sioaddr,
3352 IT87_SIO_BEEP_PIN_REG) & 0x3f;
3354 if (sio_data->beep_pin)
3355 pr_info("Beeping is supported\n");
3358 superio_exit(sioaddr);
3362 static void it87_init_regs(struct platform_device *pdev)
3364 struct it87_data *data = platform_get_drvdata(pdev);
3366 /* Initialize chip specific register pointers */
3367 switch (data->type) {
3369 data->REG_FAN = IT87_REG_FAN;
3370 data->REG_FANX = IT87_REG_FANX;
3371 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3372 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3373 data->REG_PWM = IT87_REG_PWM;
3374 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET_8686;
3375 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW_8686;
3376 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH_8686;
3381 data->REG_FAN = IT87_REG_FAN_8665;
3382 data->REG_FANX = IT87_REG_FANX_8665;
3383 data->REG_FAN_MIN = IT87_REG_FAN_MIN_8665;
3384 data->REG_FANX_MIN = IT87_REG_FANX_MIN_8665;
3385 data->REG_PWM = IT87_REG_PWM_8665;
3386 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3387 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3388 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3391 data->REG_FAN = IT87_REG_FAN;
3392 data->REG_FANX = IT87_REG_FANX;
3393 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3394 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3395 data->REG_PWM = IT87_REG_PWM_8665;
3396 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3397 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3398 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3401 data->REG_FAN = IT87_REG_FAN;
3402 data->REG_FANX = IT87_REG_FANX;
3403 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3404 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3405 data->REG_PWM = IT87_REG_PWM_8665;
3406 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3407 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3408 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3411 data->REG_FAN = IT87_REG_FAN;
3412 data->REG_FANX = IT87_REG_FANX;
3413 data->REG_FAN_MIN = IT87_REG_FAN_MIN;
3414 data->REG_FANX_MIN = IT87_REG_FANX_MIN;
3415 data->REG_PWM = IT87_REG_PWM;
3416 data->REG_TEMP_OFFSET = IT87_REG_TEMP_OFFSET;
3417 data->REG_TEMP_LOW = IT87_REG_TEMP_LOW;
3418 data->REG_TEMP_HIGH = IT87_REG_TEMP_HIGH;
3423 /* Called when we have found a new IT87. */
3424 static void it87_init_device(struct platform_device *pdev)
3426 struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
3427 struct it87_data *data = platform_get_drvdata(pdev);
3432 * For each PWM channel:
3433 * - If it is in automatic mode, setting to manual mode should set
3434 * the fan to full speed by default.
3435 * - If it is in manual mode, we need a mapping to temperature
3436 * channels to use when later setting to automatic mode later.
3437 * Use a 1:1 mapping by default (we are clueless.)
3438 * In both cases, the value can (and should) be changed by the user
3439 * prior to switching to a different mode.
3440 * Note that this is no longer needed for the IT8721F and later, as
3441 * these have separate registers for the temperature mapping and the
3442 * manual duty cycle.
3444 for (i = 0; i < NUM_AUTO_PWM; i++) {
3445 data->pwm_temp_map[i] = i;
3446 data->pwm_duty[i] = 0x7f; /* Full speed */
3447 data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */
3451 * Some chips seem to have default value 0xff for all limit
3452 * registers. For low voltage limits it makes no sense and triggers
3453 * alarms, so change to 0 instead. For high temperature limits, it
3454 * means -1 degree C, which surprisingly doesn't trigger an alarm,
3455 * but is still confusing, so change to 127 degrees C.
3457 for (i = 0; i < NUM_VIN_LIMIT; i++) {
3458 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
3460 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
3462 for (i = 0; i < data->num_temp_limit; i++) {
3463 tmp = it87_read_value(data, data->REG_TEMP_HIGH[i]);
3465 it87_write_value(data, data->REG_TEMP_HIGH[i], 127);
3469 * Temperature channels are not forcibly enabled, as they can be
3470 * set to two different sensor types and we can't guess which one
3471 * is correct for a given system. These channels can be enabled at
3472 * run-time through the temp{1-3}_type sysfs accessors if needed.
3475 /* Check if voltage monitors are reset manually or by some reason */
3476 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
3477 if ((tmp & 0xff) == 0) {
3478 /* Enable all voltage monitors */
3479 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
3482 /* Check if tachometers are reset manually or by some reason */
3483 mask = 0x70 & ~(sio_data->skip_fan << 4);
3484 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
3485 if ((data->fan_main_ctrl & mask) == 0) {
3486 /* Enable all fan tachometers */
3487 data->fan_main_ctrl |= mask;
3488 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
3489 data->fan_main_ctrl);
3491 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
3493 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
3495 /* Set tachometers to 16-bit mode if needed */
3496 if (has_fan16_config(data)) {
3497 if (~tmp & 0x07 & data->has_fan) {
3499 "Setting fan1-3 to 16-bit mode\n");
3500 it87_write_value(data, IT87_REG_FAN_16BIT,
3505 /* Check for additional fans */
3506 if (has_four_fans(data) && (tmp & BIT(4)))
3507 data->has_fan |= BIT(3); /* fan4 enabled */
3508 if (has_five_fans(data) && (tmp & BIT(5)))
3509 data->has_fan |= BIT(4); /* fan5 enabled */
3510 if (has_six_fans(data)) {
3511 switch (data->type) {
3516 data->has_fan |= BIT(5); /* fan6 enabled */
3520 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3522 data->has_fan |= BIT(5); /* fan6 enabled */
3529 /* Fan input pins may be used for alternative functions */
3530 data->has_fan &= ~sio_data->skip_fan;
3532 /* Check if pwm6 is enabled */
3533 if (has_six_pwm(data)) {
3534 switch (data->type) {
3537 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3538 if (!(tmp & BIT(3)))
3539 sio_data->skip_pwm |= BIT(5);
3546 /* Start monitoring */
3547 it87_write_value(data, IT87_REG_CONFIG,
3548 (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
3549 | (update_vbat ? 0x41 : 0x01));
3552 /* Return 1 if and only if the PWM interface is safe to use */
3553 static int it87_check_pwm(struct device *dev)
3555 struct it87_data *data = dev_get_drvdata(dev);
3557 * Some BIOSes fail to correctly configure the IT87 fans. All fans off
3558 * and polarity set to active low is sign that this is the case so we
3559 * disable pwm control to protect the user.
3561 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
3563 if ((tmp & 0x87) == 0) {
3564 if (fix_pwm_polarity) {
3566 * The user asks us to attempt a chip reconfiguration.
3567 * This means switching to active high polarity and
3568 * inverting all fan speed values.
3573 for (i = 0; i < ARRAY_SIZE(pwm); i++)
3574 pwm[i] = it87_read_value(data,
3578 * If any fan is in automatic pwm mode, the polarity
3579 * might be correct, as suspicious as it seems, so we
3580 * better don't change anything (but still disable the
3583 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3585 "Reconfiguring PWM to active high polarity\n");
3586 it87_write_value(data, IT87_REG_FAN_CTL,
3588 for (i = 0; i < 3; i++)
3589 it87_write_value(data,
3596 "PWM configuration is too broken to be fixed\n");
3600 "Detected broken BIOS defaults, disabling PWM interface\n");
3602 } else if (fix_pwm_polarity) {
3604 "PWM configuration looks sane, won't touch\n");
3610 static int it87_probe(struct platform_device *pdev)
3612 struct it87_data *data;
3613 struct resource *res;
3614 struct device *dev = &pdev->dev;
3615 struct it87_sio_data *sio_data = dev_get_platdata(dev);
3616 int enable_pwm_interface;
3617 struct device *hwmon_dev;
3619 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3620 if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
3622 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3623 (unsigned long)res->start,
3624 (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3628 data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3632 data->addr = res->start;
3633 data->type = sio_data->type;
3634 data->features = it87_devices[sio_data->type].features;
3635 data->num_temp_limit = it87_devices[sio_data->type].num_temp_limit;
3636 data->peci_mask = it87_devices[sio_data->type].peci_mask;
3637 data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3641 * IT8705F Datasheet 0.4.1, 3h == Version G.
3642 * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3643 * These are the first revisions with 16-bit tachometer support.
3645 switch (data->type) {
3647 if (sio_data->revision >= 0x03) {
3648 data->features &= ~FEAT_OLD_AUTOPWM;
3649 data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3653 if (sio_data->revision >= 0x08) {
3654 data->features &= ~FEAT_OLD_AUTOPWM;
3655 data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3663 /* Now, we do the remaining detection. */
3664 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3665 it87_read_value(data, IT87_REG_CHIPID) != 0x90)
3668 platform_set_drvdata(pdev, data);
3670 mutex_init(&data->update_lock);
3672 /* Initialize register pointers */
3673 it87_init_regs(pdev);
3675 /* Check PWM configuration */
3676 enable_pwm_interface = it87_check_pwm(dev);
3678 /* Starting with IT8721F, we handle scaling of internal voltages */
3679 if (has_scaling(data)) {
3680 if (sio_data->internal & BIT(0))
3681 data->in_scaled |= BIT(3); /* in3 is AVCC */
3682 if (sio_data->internal & BIT(1))
3683 data->in_scaled |= BIT(7); /* in7 is VSB */
3684 if (sio_data->internal & BIT(2))
3685 data->in_scaled |= BIT(8); /* in8 is Vbat */
3686 if (sio_data->internal & BIT(3))
3687 data->in_scaled |= BIT(9); /* in9 is AVCC */
3688 } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3689 sio_data->type == it8783) {
3690 if (sio_data->internal & BIT(0))
3691 data->in_scaled |= BIT(3); /* in3 is VCC5V */
3692 if (sio_data->internal & BIT(1))
3693 data->in_scaled |= BIT(7); /* in7 is VCCH5V */
3696 data->has_temp = 0x07;
3697 if (sio_data->skip_temp & BIT(2)) {
3698 if (sio_data->type == it8782 &&
3699 !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3700 data->has_temp &= ~BIT(2);
3703 data->in_internal = sio_data->internal;
3704 data->has_in = 0x3ff & ~sio_data->skip_in;
3706 if (has_six_temp(data)) {
3707 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3709 /* Check for additional temperature sensors */
3710 if ((reg & 0x03) >= 0x02)
3711 data->has_temp |= BIT(3);
3712 if (((reg >> 2) & 0x03) >= 0x02)
3713 data->has_temp |= BIT(4);
3714 if (((reg >> 4) & 0x03) >= 0x02)
3715 data->has_temp |= BIT(5);
3717 /* Check for additional voltage sensors */
3718 if ((reg & 0x03) == 0x01)
3719 data->has_in |= BIT(10);
3720 if (((reg >> 2) & 0x03) == 0x01)
3721 data->has_in |= BIT(11);
3722 if (((reg >> 4) & 0x03) == 0x01)
3723 data->has_in |= BIT(12);
3726 data->has_beep = !!sio_data->beep_pin;
3728 /* Initialize the IT87 chip */
3729 it87_init_device(pdev);
3731 if (!sio_data->skip_vid) {
3732 data->has_vid = true;
3733 data->vrm = vid_which_vrm();
3734 /* VID reading from Super-I/O config space if available */
3735 data->vid = sio_data->vid_value;
3738 /* Prepare for sysfs hooks */
3739 data->groups[0] = &it87_group;
3740 data->groups[1] = &it87_group_in;
3741 data->groups[2] = &it87_group_temp;
3742 data->groups[3] = &it87_group_fan;
3744 if (enable_pwm_interface) {
3745 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3746 data->has_pwm &= ~sio_data->skip_pwm;
3748 data->groups[4] = &it87_group_pwm;
3749 if (has_old_autopwm(data) || has_newer_autopwm(data))
3750 data->groups[5] = &it87_group_auto_pwm;
3753 hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3754 it87_devices[sio_data->type].name,
3755 data, data->groups);
3756 return PTR_ERR_OR_ZERO(hwmon_dev);
3759 static struct platform_driver it87_driver = {
3763 .probe = it87_probe,
3766 static int __init it87_device_add(int index, unsigned short address,
3767 const struct it87_sio_data *sio_data)
3769 struct platform_device *pdev;
3770 struct resource res = {
3771 .start = address + IT87_EC_OFFSET,
3772 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3774 .flags = IORESOURCE_IO,
3778 err = acpi_check_resource_conflict(&res);
3782 pdev = platform_device_alloc(DRVNAME, address);
3786 err = platform_device_add_resources(pdev, &res, 1);
3788 pr_err("Device resource addition failed (%d)\n", err);
3789 goto exit_device_put;
3792 err = platform_device_add_data(pdev, sio_data,
3793 sizeof(struct it87_sio_data));
3795 pr_err("Platform data allocation failed\n");
3796 goto exit_device_put;
3799 err = platform_device_add(pdev);
3801 pr_err("Device addition failed (%d)\n", err);
3802 goto exit_device_put;
3805 it87_pdev[index] = pdev;
3809 platform_device_put(pdev);
3813 struct it87_dmi_data {
3814 bool sio4e_broken; /* SIO accesses @ 0x4e are broken */
3815 char *sio_mutex; /* SIO ACPI mutex */
3816 u8 skip_pwm; /* pwm channels to skip for this board */
3820 * On Gigabyte AB350 and AX370 boards, accesses to the Super-IO chip
3821 * at address 0x4e/0x4f can result in a system hang.
3822 * Accesses to address 0x2e/0x2f need to be mutex protected.
3824 static struct it87_dmi_data gigabyte_ab350_gaming = {
3825 .sio4e_broken = true,
3826 .sio_mutex = "\\_SB.PCI0.SBRG.SIO1.MUT0",
3830 * On the Shuttle SN68PT, FAN_CTL2 is apparently not
3831 * connected to a fan, but to something else. One user
3832 * has reported instant system power-off when changing
3833 * the PWM2 duty cycle, so we disable it.
3834 * I use the board name string as the trigger in case
3835 * the same board is ever used in other systems.
3837 static struct it87_dmi_data nvidia_fn68pt = {
3841 static const struct dmi_system_id it87_dmi_table[] __initconst = {
3844 DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
3845 DMI_MATCH(DMI_BOARD_NAME, "AB350-Gaming-CF"),
3847 .driver_data = &gigabyte_ab350_gaming,
3851 DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
3852 DMI_MATCH(DMI_BOARD_NAME, "AB350-Gaming 3-CF"),
3854 .driver_data = &gigabyte_ab350_gaming,
3858 DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
3859 DMI_MATCH(DMI_BOARD_NAME, "AB350M-D3H-CF"),
3861 .driver_data = &gigabyte_ab350_gaming,
3865 DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
3866 DMI_MATCH(DMI_BOARD_NAME, "AX370-Gaming K7"),
3868 .driver_data = &gigabyte_ab350_gaming,
3872 DMI_MATCH(DMI_SYS_VENDOR, "Gigabyte Technology Co., Ltd."),
3873 DMI_MATCH(DMI_BOARD_NAME, "AX370-Gaming 5"),
3875 .driver_data = &gigabyte_ab350_gaming,
3879 DMI_MATCH(DMI_BOARD_VENDOR, "nVIDIA"),
3880 DMI_MATCH(DMI_BOARD_NAME, "FN68PT"),
3882 .driver_data = &nvidia_fn68pt,
3887 static int __init sm_it87_init(void)
3889 const struct dmi_system_id *dmi = dmi_first_match(it87_dmi_table);
3890 struct it87_dmi_data *dmi_data = NULL;
3891 int sioaddr[2] = { REG_2E, REG_4E };
3892 struct it87_sio_data sio_data;
3893 unsigned short isa_address;
3898 dmi_data = dmi->driver_data;
3901 it87_sio4e_broken = dmi_data->sio4e_broken;
3902 #ifdef __IT87_USE_ACPI_MUTEX
3903 if (dmi_data->sio_mutex) {
3904 static acpi_status status;
3906 status = acpi_get_handle(NULL, dmi_data->sio_mutex,
3907 &it87_acpi_sio_handle);
3908 if (ACPI_SUCCESS(status)) {
3909 it87_acpi_sio_mutex = dmi_data->sio_mutex;
3910 pr_debug("Found ACPI SIO mutex %s\n",
3911 dmi_data->sio_mutex);
3913 pr_warn("ACPI SIO mutex %s not found\n",
3914 dmi_data->sio_mutex);
3917 #endif /* __IT87_USE_ACPI_MUTEX */
3920 err = platform_driver_register(&it87_driver);
3924 for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3926 * Accessing the second Super-IO chi can result in board
3927 * hangs. Disable until we figure out what is going on.
3929 if (it87_sio4e_broken && sioaddr[i] == 0x4e)
3931 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3933 err = it87_find(sioaddr[i], &isa_address, &sio_data);
3934 if (err || isa_address == 0)
3938 sio_data.skip_pwm |= dmi_data->skip_pwm;
3939 err = it87_device_add(i, isa_address, &sio_data);
3941 goto exit_dev_unregister;
3947 goto exit_unregister;
3951 exit_dev_unregister:
3952 /* NULL check handled by platform_device_unregister */
3953 platform_device_unregister(it87_pdev[0]);
3955 platform_driver_unregister(&it87_driver);
3959 static void __exit sm_it87_exit(void)
3961 /* NULL check handled by platform_device_unregister */
3962 platform_device_unregister(it87_pdev[1]);
3963 platform_device_unregister(it87_pdev[0]);
3964 platform_driver_unregister(&it87_driver);
3967 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3968 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3969 module_param(update_vbat, bool, 0);
3970 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3971 module_param(fix_pwm_polarity, bool, 0);
3972 MODULE_PARM_DESC(fix_pwm_polarity,
3973 "Force PWM polarity to active high (DANGEROUS)");
3974 MODULE_LICENSE("GPL");
3976 module_init(sm_it87_init);
3977 module_exit(sm_it87_exit);