]> git.sur5r.net Git - groeck-it87/blob - it87.c
Add support for two Super-IO chips
[groeck-it87] / it87.c
1 /*
2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
3  *           monitoring.
4  *
5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
8  *  Fan Controller)
9  *
10  *  This driver supports only the Environment Controller in the IT8705F and
11  *  similar parts.  The other devices are supported by different drivers.
12  *
13  *  Supports: IT8603E  Super I/O chip w/LPC interface
14  *            IT8620E  Super I/O chip w/LPC interface
15  *            IT8623E  Super I/O chip w/LPC interface
16  *            IT8705F  Super I/O chip w/LPC interface
17  *            IT8712F  Super I/O chip w/LPC interface
18  *            IT8716F  Super I/O chip w/LPC interface
19  *            IT8718F  Super I/O chip w/LPC interface
20  *            IT8720F  Super I/O chip w/LPC interface
21  *            IT8721F  Super I/O chip w/LPC interface
22  *            IT8726F  Super I/O chip w/LPC interface
23  *            IT8728F  Super I/O chip w/LPC interface
24  *            IT8758E  Super I/O chip w/LPC interface
25  *            IT8771E  Super I/O chip w/LPC interface
26  *            IT8772E  Super I/O chip w/LPC interface
27  *            IT8781F  Super I/O chip w/LPC interface
28  *            IT8782F  Super I/O chip w/LPC interface
29  *            IT8783E/F Super I/O chip w/LPC interface
30  *            IT8786E  Super I/O chip w/LPC interface
31  *            IT8790E  Super I/O chip w/LPC interface
32  *            Sis950   A clone of the IT8705F
33  *
34  *  Copyright (C) 2001 Chris Gauthron
35  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
36  *
37  *  This program is free software; you can redistribute it and/or modify
38  *  it under the terms of the GNU General Public License as published by
39  *  the Free Software Foundation; either version 2 of the License, or
40  *  (at your option) any later version.
41  *
42  *  This program is distributed in the hope that it will be useful,
43  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
44  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
45  *  GNU General Public License for more details.
46  *
47  *  You should have received a copy of the GNU General Public License
48  *  along with this program; if not, write to the Free Software
49  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
50  */
51
52 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
53
54 #include <linux/module.h>
55 #include <linux/init.h>
56 #include <linux/slab.h>
57 #include <linux/jiffies.h>
58 #include <linux/platform_device.h>
59 #include <linux/hwmon.h>
60 #include <linux/hwmon-sysfs.h>
61 #include <linux/hwmon-vid.h>
62 #include <linux/err.h>
63 #include <linux/mutex.h>
64 #include <linux/sysfs.h>
65 #include <linux/string.h>
66 #include <linux/dmi.h>
67 #include <linux/acpi.h>
68 #include <linux/io.h>
69 #include "compat.h"
70
71 #define DRVNAME "it87"
72
73 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8771,
74              it8772, it8781, it8782, it8783, it8786, it8790, it8603, it8620 };
75
76 static unsigned short force_id;
77 module_param(force_id, ushort, 0);
78 MODULE_PARM_DESC(force_id, "Override the detected device ID");
79
80 static struct platform_device *it87_pdev[2];
81
82 #define REG_2E  0x2e    /* The register to read/write */
83 #define REG_4E  0x4e    /* Secondary register to read/write */
84
85 #define DEV     0x07    /* Register: Logical device select */
86 #define PME     0x04    /* The device with the fan registers in it */
87
88 /* The device with the IT8718F/IT8720F VID value in it */
89 #define GPIO    0x07
90
91 #define DEVID   0x20    /* Register: Device ID */
92 #define DEVREV  0x22    /* Register: Device Revision */
93
94 static inline int superio_inb(int ioreg, int reg)
95 {
96         outb(reg, ioreg);
97         return inb(ioreg + 1);
98 }
99
100 static inline void superio_outb(int ioreg, int reg, int val)
101 {
102         outb(reg, ioreg);
103         outb(val, ioreg + 1);
104 }
105
106 static int superio_inw(int ioreg, int reg)
107 {
108         int val;
109         outb(reg++, ioreg);
110         val = inb(ioreg + 1) << 8;
111         outb(reg, ioreg);
112         val |= inb(ioreg + 1);
113         return val;
114 }
115
116 static inline void superio_select(int ioreg, int ldn)
117 {
118         outb(DEV, ioreg);
119         outb(ldn, ioreg + 1);
120 }
121
122 static inline int superio_enter(int ioreg)
123 {
124         /*
125          * Try to reserve ioreg and ioreg + 1 for exclusive access.
126          */
127         if (!request_muxed_region(ioreg, 2, DRVNAME))
128                 return -EBUSY;
129
130         outb(0x87, ioreg);
131         outb(0x01, ioreg);
132         outb(0x55, ioreg);
133         outb(0x55, ioreg);
134         return 0;
135 }
136
137 static inline void superio_exit(int ioreg)
138 {
139         outb(0x02, ioreg);
140         outb(0x02, ioreg + 1);
141         release_region(ioreg, 2);
142 }
143
144 /* Logical device 4 registers */
145 #define IT8712F_DEVID 0x8712
146 #define IT8705F_DEVID 0x8705
147 #define IT8716F_DEVID 0x8716
148 #define IT8718F_DEVID 0x8718
149 #define IT8720F_DEVID 0x8720
150 #define IT8721F_DEVID 0x8721
151 #define IT8726F_DEVID 0x8726
152 #define IT8728F_DEVID 0x8728
153 #define IT8771E_DEVID 0x8771
154 #define IT8772E_DEVID 0x8772
155 #define IT8781F_DEVID 0x8781
156 #define IT8782F_DEVID 0x8782
157 #define IT8783E_DEVID 0x8783
158 #define IT8786E_DEVID 0x8786
159 #define IT8603E_DEVID 0x8603
160 #define IT8620E_DEVID 0x8620
161 #define IT8623E_DEVID 0x8623
162 #define IT8790E_DEVID 0x8790
163 #define IT87_ACT_REG  0x30
164 #define IT87_BASE_REG 0x60
165
166 /* Logical device 7 registers (IT8712F and later) */
167 #define IT87_SIO_GPIO1_REG      0x25
168 #define IT87_SIO_GPIO2_REG      0x26
169 #define IT87_SIO_GPIO3_REG      0x27
170 #define IT87_SIO_GPIO4_REG      0x28
171 #define IT87_SIO_GPIO5_REG      0x29
172 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
173 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
174 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
175 #define IT87_SIO_VID_REG        0xfc    /* VID value */
176 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
177
178 /* Update battery voltage after every reading if true */
179 static bool update_vbat;
180
181 /* Not all BIOSes properly configure the PWM registers */
182 static bool fix_pwm_polarity;
183
184 /* Many IT87 constants specified below */
185
186 /* Length of ISA address segment */
187 #define IT87_EXTENT 8
188
189 /* Length of ISA address segment for Environmental Controller */
190 #define IT87_EC_EXTENT 2
191
192 /* Offset of EC registers from ISA base address */
193 #define IT87_EC_OFFSET 5
194
195 /* Where are the ISA address/data registers relative to the EC base address */
196 #define IT87_ADDR_REG_OFFSET 0
197 #define IT87_DATA_REG_OFFSET 1
198
199 /*----- The IT87 registers -----*/
200
201 #define IT87_REG_CONFIG        0x00
202
203 #define IT87_REG_ALARM1        0x01
204 #define IT87_REG_ALARM2        0x02
205 #define IT87_REG_ALARM3        0x03
206
207 /*
208  * The IT8718F and IT8720F have the VID value in a different register, in
209  * Super-I/O configuration space.
210  */
211 #define IT87_REG_VID           0x0a
212 /*
213  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
214  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
215  * mode.
216  */
217 #define IT87_REG_FAN_DIV       0x0b
218 #define IT87_REG_FAN_16BIT     0x0c
219
220 /* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */
221
222 static const u8 IT87_REG_FAN[]          = {0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c};
223 static const u8 IT87_REG_FAN_MIN[]      = {0x10, 0x11, 0x12, 0x84, 0x86, 0x4e};
224 static const u8 IT87_REG_FANX[]         = {0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d};
225 static const u8 IT87_REG_FANX_MIN[]     = {0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f};
226 static const u8 IT87_REG_TEMP_OFFSET[]  = {0x56, 0x57, 0x59};
227
228 #define IT87_REG_FAN_MAIN_CTRL 0x13
229 #define IT87_REG_FAN_CTL       0x14
230 static const u8 IT87_REG_PWM[]          = {0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf};
231 static const u8 IT87_REG_PWM_DUTY[]     = {0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab};
232
233 #define IT87_REG_VIN(nr)       (0x20 + (nr))
234 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
235
236 #define IT87_REG_AVCC3          0x2f
237
238 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
239 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
240 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
241 #define IT87_REG_TEMP_LOW(nr)  (0x41 + (nr) * 2)
242
243 #define IT87_REG_VIN_ENABLE    0x50
244 #define IT87_REG_TEMP_ENABLE   0x51
245 #define IT87_REG_TEMP_EXTRA    0x55
246 #define IT87_REG_BEEP_ENABLE   0x5c
247
248 #define IT87_REG_CHIPID        0x58
249
250 #define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i))
251 #define IT87_REG_AUTO_PWM(nr, i)  (0x65 + (nr) * 8 + (i))
252
253 struct it87_devices {
254         const char *name;
255         u16 features;
256         u8 peci_mask;
257         u8 old_peci_mask;
258         const char * const suffix;
259 };
260
261 #define FEAT_12MV_ADC           (1 << 0)
262 #define FEAT_NEWER_AUTOPWM      (1 << 1)
263 #define FEAT_OLD_AUTOPWM        (1 << 2)
264 #define FEAT_16BIT_FANS         (1 << 3)
265 #define FEAT_TEMP_OFFSET        (1 << 4)
266 #define FEAT_TEMP_PECI          (1 << 5)
267 #define FEAT_TEMP_OLD_PECI      (1 << 6)
268 #define FEAT_FAN16_CONFIG       (1 << 7)        /* Need to enable 16-bit fans */
269 #define FEAT_FIVE_FANS          (1 << 8)        /* Supports five fans */
270 #define FEAT_VID                (1 << 9)        /* Set if chip supports VID */
271 #define FEAT_IN7_INTERNAL       (1 << 10)       /* Set if in7 is internal */
272 #define FEAT_SIX_FANS           (1 << 11)       /* Supports six fans */
273 #define FEAT_AVCC3              (1 << 12)       /* Chip supports in9/AVCC3 */
274 #define FEAT_SIX_PWM            (1 << 13)       /* Chip supports 6 pwm chn */
275 #define FEAT_PWM_FREQ2          (1 << 14)       /* Separate pwm freq 2 */
276
277 static const struct it87_devices it87_devices[] = {
278         [it87] = {
279                 .name = "it87",
280                 .features = FEAT_OLD_AUTOPWM,   /* may need to overwrite */
281                 .suffix = "F",
282         },
283         [it8712] = {
284                 .name = "it8712",
285                 .features = FEAT_OLD_AUTOPWM | FEAT_VID,
286                                                 /* may need to overwrite */
287                 .suffix = "F",
288         },
289         [it8716] = {
290                 .name = "it8716",
291                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
292                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2,
293                 .suffix = "F",
294         },
295         [it8718] = {
296                 .name = "it8718",
297                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
298                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
299                   | FEAT_PWM_FREQ2,
300                 .old_peci_mask = 0x4,
301                 .suffix = "F",
302         },
303         [it8720] = {
304                 .name = "it8720",
305                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
306                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
307                   | FEAT_PWM_FREQ2,
308                 .old_peci_mask = 0x4,
309                 .suffix = "F",
310         },
311         [it8721] = {
312                 .name = "it8721",
313                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
314                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
315                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
316                   | FEAT_PWM_FREQ2,
317                 .peci_mask = 0x05,
318                 .old_peci_mask = 0x02,  /* Actually reports PCH */
319                 .suffix = "F",
320         },
321         [it8728] = {
322                 .name = "it8728",
323                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
324                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
325                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
326                 .peci_mask = 0x07,
327                 .suffix = "F",
328         },
329         [it8771] = {
330                 .name = "it8771",
331                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
332                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
333                   | FEAT_PWM_FREQ2,
334                                 /* PECI: guesswork */
335                                 /* 12mV ADC (OHM) */
336                                 /* 16 bit fans (OHM) */
337                                 /* three fans, always 16 bit (guesswork) */
338                 .peci_mask = 0x07,
339                 .suffix = "E",
340         },
341         [it8772] = {
342                 .name = "it8772",
343                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
344                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
345                   | FEAT_PWM_FREQ2,
346                                 /* PECI (coreboot) */
347                                 /* 12mV ADC (HWSensors4, OHM) */
348                                 /* 16 bit fans (HWSensors4, OHM) */
349                                 /* three fans, always 16 bit (datasheet) */
350                 .peci_mask = 0x07,
351                 .suffix = "E",
352         },
353         [it8781] = {
354                 .name = "it8781",
355                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
356                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
357                 .old_peci_mask = 0x4,
358                 .suffix = "F",
359         },
360         [it8782] = {
361                 .name = "it8782",
362                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
363                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
364                 .old_peci_mask = 0x4,
365                 .suffix = "F",
366         },
367         [it8783] = {
368                 .name = "it8783",
369                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
370                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
371                 .old_peci_mask = 0x4,
372                 .suffix = "E/F",
373         },
374         [it8786] = {
375                 .name = "it8786",
376                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
377                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
378                   | FEAT_PWM_FREQ2,
379                 .peci_mask = 0x07,
380                 .suffix = "E",
381         },
382         [it8790] = {
383                 .name = "it8790",
384                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
385                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
386                   | FEAT_PWM_FREQ2,
387                 .peci_mask = 0x07,
388                 .suffix = "E",
389         },
390         [it8603] = {
391                 .name = "it8603",
392                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
393                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
394                   | FEAT_AVCC3 | FEAT_PWM_FREQ2,
395                 .peci_mask = 0x07,
396                 .suffix = "E",
397         },
398         [it8620] = {
399                 .name = "it8620",
400                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
401                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
402                   | FEAT_IN7_INTERNAL | FEAT_AVCC3 | FEAT_SIX_PWM
403                   | FEAT_PWM_FREQ2,
404                 .peci_mask = 0x07,
405                 .suffix = "E",
406         },
407 };
408
409 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
410 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
411 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
412 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
413 #define has_temp_offset(data)   ((data)->features & FEAT_TEMP_OFFSET)
414 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
415                                  ((data)->peci_mask & (1 << nr)))
416 #define has_temp_old_peci(data, nr) \
417                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
418                                  ((data)->old_peci_mask & (1 << nr)))
419 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
420 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
421                                                      FEAT_SIX_FANS))
422 #define has_vid(data)           ((data)->features & FEAT_VID)
423 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
424 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
425 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
426 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
427 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
428
429 struct it87_sio_data {
430         enum chips type;
431         /* Values read from Super-I/O config space */
432         u8 revision;
433         u8 vid_value;
434         u8 beep_pin;
435         u8 internal;    /* Internal sensors can be labeled */
436         /* Features skipped based on config or DMI */
437         u16 skip_in;
438         u8 skip_vid;
439         u8 skip_fan;
440         u8 skip_pwm;
441         u8 skip_temp;
442 };
443
444 /*
445  * For each registered chip, we need to keep some data in memory.
446  * The structure is dynamically allocated.
447  */
448 struct it87_data {
449         struct device *hwmon_dev;
450         enum chips type;
451         u16 features;
452         u8 peci_mask;
453         u8 old_peci_mask;
454
455         unsigned short addr;
456         const char *name;
457         struct mutex update_lock;
458         char valid;             /* !=0 if following fields are valid */
459         unsigned long last_updated;     /* In jiffies */
460
461         u16 in_scaled;          /* Internal voltage sensors are scaled */
462         u8 in[10][3];           /* [nr][0]=in, [1]=min, [2]=max */
463         u8 has_fan;             /* Bitfield, fans enabled */
464         u16 fan[6][2];          /* Register values, [nr][0]=fan, [1]=min */
465         u8 has_temp;            /* Bitfield, temp sensors enabled */
466         s8 temp[3][4];          /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
467         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
468         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
469         u8 fan_div[3];          /* Register encoding, shifted right */
470         u8 vid;                 /* Register encoding, combined */
471         u8 vrm;
472         u32 alarms;             /* Register encoding, combined */
473         u8 beeps;               /* Register encoding */
474         u8 fan_main_ctrl;       /* Register value */
475         u8 fan_ctl;             /* Register value */
476
477         /*
478          * The following 3 arrays correspond to the same registers up to
479          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
480          * 7, and we want to preserve settings on mode changes, so we have
481          * to track all values separately.
482          * Starting with the IT8721F, the manual PWM duty cycles are stored
483          * in separate registers (8-bit values), so the separate tracking
484          * is no longer needed, but it is still done to keep the driver
485          * simple.
486          */
487         u8 pwm_ctrl[6];         /* Register value */
488         u8 pwm_duty[6];         /* Manual PWM value set by user */
489         u8 pwm_temp_map[6];     /* PWM to temp. chan. mapping (bits 1-0) */
490
491         /* Automatic fan speed control registers */
492         u8 auto_pwm[3][4];      /* [nr][3] is hard-coded */
493         s8 auto_temp[3][5];     /* [nr][0] is point1_temp_hyst */
494 };
495
496 static int adc_lsb(const struct it87_data *data, int nr)
497 {
498         int lsb = has_12mv_adc(data) ? 12 : 16;
499         if (data->in_scaled & (1 << nr))
500                 lsb <<= 1;
501         return lsb;
502 }
503
504 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
505 {
506         val = DIV_ROUND_CLOSEST(val, adc_lsb(data, nr));
507         return clamp_val(val, 0, 255);
508 }
509
510 static int in_from_reg(const struct it87_data *data, int nr, int val)
511 {
512         return val * adc_lsb(data, nr);
513 }
514
515 static inline u8 FAN_TO_REG(long rpm, int div)
516 {
517         if (rpm == 0)
518                 return 255;
519         rpm = clamp_val(rpm, 1, 1000000);
520         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
521 }
522
523 static inline u16 FAN16_TO_REG(long rpm)
524 {
525         if (rpm == 0)
526                 return 0xffff;
527         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
528 }
529
530 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
531                                 1350000 / ((val) * (div)))
532 /* The divider is fixed to 2 in 16-bit mode */
533 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
534                              1350000 / ((val) * 2))
535
536 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
537                                     ((val) + 500) / 1000), -128, 127))
538 #define TEMP_FROM_REG(val) ((val) * 1000)
539
540 static u8 pwm_to_reg(const struct it87_data *data, long val)
541 {
542         if (has_newer_autopwm(data))
543                 return val;
544         else
545                 return val >> 1;
546 }
547
548 static int pwm_from_reg(const struct it87_data *data, u8 reg)
549 {
550         if (has_newer_autopwm(data))
551                 return reg;
552         else
553                 return (reg & 0x7f) << 1;
554 }
555
556
557 static int DIV_TO_REG(int val)
558 {
559         int answer = 0;
560         while (answer < 7 && (val >>= 1))
561                 answer++;
562         return answer;
563 }
564 #define DIV_FROM_REG(val) (1 << (val))
565
566 /*
567  * pwm base frequencies. The frequency has to be divided by either 128 or 256,
568  * depending on the chip type, to calculate the actual pwm frequency.
569  *
570  * Some of the chip datasheets suggest a base frequency of 51kHz instead
571  * of 750kHz for the slowest base frequency, resulting in a pwm frequency
572  * of 200Hz. Sometimes both pwm frequency select registers are affected,
573  * sometimes just one. It is unknown if this is a datasheet error or real,
574  * so this is ignored for now.
575  */
576 static const unsigned int pwm_freq[8] = {
577         48000000,
578         24000000,
579         12000000,
580         8000000,
581         6000000,
582         3000000,
583         1500000,
584         750000,
585 };
586
587 static int it87_probe(struct platform_device *pdev);
588 static int it87_remove(struct platform_device *pdev);
589
590 static int it87_read_value(struct it87_data *data, u8 reg);
591 static void it87_write_value(struct it87_data *data, u8 reg, u8 value);
592 static struct it87_data *it87_update_device(struct device *dev);
593 static int it87_check_pwm(struct device *dev);
594 static void it87_init_device(struct platform_device *pdev);
595
596
597 static struct platform_driver it87_driver = {
598         .driver = {
599                 .name   = DRVNAME,
600         },
601         .probe  = it87_probe,
602         .remove = it87_remove,
603 };
604
605 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
606                        char *buf)
607 {
608         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
609         int nr = sattr->nr;
610         int index = sattr->index;
611
612         struct it87_data *data = it87_update_device(dev);
613         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
614 }
615
616 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
617                       const char *buf, size_t count)
618 {
619         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
620         int nr = sattr->nr;
621         int index = sattr->index;
622
623         struct it87_data *data = dev_get_drvdata(dev);
624         unsigned long val;
625
626         if (kstrtoul(buf, 10, &val) < 0)
627                 return -EINVAL;
628
629         mutex_lock(&data->update_lock);
630         data->in[nr][index] = in_to_reg(data, nr, val);
631         it87_write_value(data,
632                          index == 1 ? IT87_REG_VIN_MIN(nr)
633                                     : IT87_REG_VIN_MAX(nr),
634                          data->in[nr][index]);
635         mutex_unlock(&data->update_lock);
636         return count;
637 }
638
639 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
640 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
641                             0, 1);
642 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
643                             0, 2);
644
645 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
646 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
647                             1, 1);
648 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
649                             1, 2);
650
651 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
652 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
653                             2, 1);
654 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
655                             2, 2);
656
657 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
658 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
659                             3, 1);
660 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
661                             3, 2);
662
663 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
664 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
665                             4, 1);
666 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
667                             4, 2);
668
669 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
670 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
671                             5, 1);
672 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
673                             5, 2);
674
675 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
676 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
677                             6, 1);
678 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
679                             6, 2);
680
681 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
682 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
683                             7, 1);
684 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
685                             7, 2);
686
687 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
688 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
689
690 /* 3 temperatures */
691 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
692                          char *buf)
693 {
694         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
695         int nr = sattr->nr;
696         int index = sattr->index;
697         struct it87_data *data = it87_update_device(dev);
698
699         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
700 }
701
702 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
703                         const char *buf, size_t count)
704 {
705         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
706         int nr = sattr->nr;
707         int index = sattr->index;
708         struct it87_data *data = dev_get_drvdata(dev);
709         long val;
710         u8 reg, regval;
711
712         if (kstrtol(buf, 10, &val) < 0)
713                 return -EINVAL;
714
715         mutex_lock(&data->update_lock);
716
717         switch (index) {
718         default:
719         case 1:
720                 reg = IT87_REG_TEMP_LOW(nr);
721                 break;
722         case 2:
723                 reg = IT87_REG_TEMP_HIGH(nr);
724                 break;
725         case 3:
726                 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
727                 if (!(regval & 0x80)) {
728                         regval |= 0x80;
729                         it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
730                 }
731                 data->valid = 0;
732                 reg = IT87_REG_TEMP_OFFSET[nr];
733                 break;
734         }
735
736         data->temp[nr][index] = TEMP_TO_REG(val);
737         it87_write_value(data, reg, data->temp[nr][index]);
738         mutex_unlock(&data->update_lock);
739         return count;
740 }
741
742 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
743 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
744                             0, 1);
745 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
746                             0, 2);
747 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
748                             set_temp, 0, 3);
749 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
750 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
751                             1, 1);
752 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
753                             1, 2);
754 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
755                             set_temp, 1, 3);
756 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
757 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
758                             2, 1);
759 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
760                             2, 2);
761 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
762                             set_temp, 2, 3);
763
764 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
765                               char *buf)
766 {
767         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
768         int nr = sensor_attr->index;
769         struct it87_data *data = it87_update_device(dev);
770         u8 reg = data->sensor;      /* In case value is updated while used */
771         u8 extra = data->extra;
772
773         if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1))
774             || (has_temp_old_peci(data, nr) && (extra & 0x80)))
775                 return sprintf(buf, "6\n");  /* Intel PECI */
776         if (reg & (1 << nr))
777                 return sprintf(buf, "3\n");  /* thermal diode */
778         if (reg & (8 << nr))
779                 return sprintf(buf, "4\n");  /* thermistor */
780         return sprintf(buf, "0\n");      /* disabled */
781 }
782
783 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
784                              const char *buf, size_t count)
785 {
786         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
787         int nr = sensor_attr->index;
788
789         struct it87_data *data = dev_get_drvdata(dev);
790         long val;
791         u8 reg, extra;
792
793         if (kstrtol(buf, 10, &val) < 0)
794                 return -EINVAL;
795
796         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
797         reg &= ~(1 << nr);
798         reg &= ~(8 << nr);
799         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
800                 reg &= 0x3f;
801         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
802         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
803                 extra &= 0x7f;
804         if (val == 2) { /* backwards compatibility */
805                 dev_warn(dev,
806                          "Sensor type 2 is deprecated, please use 4 instead\n");
807                 val = 4;
808         }
809         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
810         if (val == 3)
811                 reg |= 1 << nr;
812         else if (val == 4)
813                 reg |= 8 << nr;
814         else if (has_temp_peci(data, nr) && val == 6)
815                 reg |= (nr + 1) << 6;
816         else if (has_temp_old_peci(data, nr) && val == 6)
817                 extra |= 0x80;
818         else if (val != 0)
819                 return -EINVAL;
820
821         mutex_lock(&data->update_lock);
822         data->sensor = reg;
823         data->extra = extra;
824         it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
825         if (has_temp_old_peci(data, nr))
826                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
827         data->valid = 0;        /* Force cache refresh */
828         mutex_unlock(&data->update_lock);
829         return count;
830 }
831
832 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
833                           set_temp_type, 0);
834 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
835                           set_temp_type, 1);
836 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
837                           set_temp_type, 2);
838
839 /* 3 Fans */
840
841 static int pwm_mode(const struct it87_data *data, int nr)
842 {
843         int ctrl = data->fan_main_ctrl & (1 << nr);
844
845         if (ctrl == 0 && data->type != it8603)          /* Full speed */
846                 return 0;
847         if (data->pwm_ctrl[nr] & 0x80)                  /* Automatic mode */
848                 return 2;
849         else                                            /* Manual mode */
850                 return 1;
851 }
852
853 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
854                         char *buf)
855 {
856         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
857         int nr = sattr->nr;
858         int index = sattr->index;
859         int speed;
860         struct it87_data *data = it87_update_device(dev);
861
862         speed = has_16bit_fans(data) ?
863                 FAN16_FROM_REG(data->fan[nr][index]) :
864                 FAN_FROM_REG(data->fan[nr][index],
865                              DIV_FROM_REG(data->fan_div[nr]));
866         return sprintf(buf, "%d\n", speed);
867 }
868
869 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
870                 char *buf)
871 {
872         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
873         int nr = sensor_attr->index;
874
875         struct it87_data *data = it87_update_device(dev);
876         return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
877 }
878 static ssize_t show_pwm_enable(struct device *dev,
879                 struct device_attribute *attr, char *buf)
880 {
881         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
882         int nr = sensor_attr->index;
883
884         struct it87_data *data = it87_update_device(dev);
885         return sprintf(buf, "%d\n", pwm_mode(data, nr));
886 }
887 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
888                 char *buf)
889 {
890         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
891         int nr = sensor_attr->index;
892
893         struct it87_data *data = it87_update_device(dev);
894         return sprintf(buf, "%d\n",
895                        pwm_from_reg(data, data->pwm_duty[nr]));
896 }
897 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
898                 char *buf)
899 {
900         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
901         struct it87_data *data = it87_update_device(dev);
902         int nr = sensor_attr->index;
903         unsigned int freq;
904         int index;
905
906         if (has_pwm_freq2(data) && nr == 1)
907                 index = (data->extra >> 4) & 0x07;
908         else
909                 index = (data->fan_ctl >> 4) & 0x07;
910
911         freq = pwm_freq[index] / has_newer_autopwm(data) ? 256 : 128;
912
913         return sprintf(buf, "%u\n", freq);
914 }
915
916 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
917                        const char *buf, size_t count)
918 {
919         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
920         int nr = sattr->nr;
921         int index = sattr->index;
922
923         struct it87_data *data = dev_get_drvdata(dev);
924         long val;
925         u8 reg;
926
927         if (kstrtol(buf, 10, &val) < 0)
928                 return -EINVAL;
929
930         mutex_lock(&data->update_lock);
931
932         if (has_16bit_fans(data)) {
933                 data->fan[nr][index] = FAN16_TO_REG(val);
934                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
935                                  data->fan[nr][index] & 0xff);
936                 it87_write_value(data, IT87_REG_FANX_MIN[nr],
937                                  data->fan[nr][index] >> 8);
938         } else {
939                 reg = it87_read_value(data, IT87_REG_FAN_DIV);
940                 switch (nr) {
941                 case 0:
942                         data->fan_div[nr] = reg & 0x07;
943                         break;
944                 case 1:
945                         data->fan_div[nr] = (reg >> 3) & 0x07;
946                         break;
947                 case 2:
948                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
949                         break;
950                 }
951                 data->fan[nr][index] =
952                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
953                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
954                                  data->fan[nr][index]);
955         }
956
957         mutex_unlock(&data->update_lock);
958         return count;
959 }
960
961 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
962                 const char *buf, size_t count)
963 {
964         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
965         int nr = sensor_attr->index;
966
967         struct it87_data *data = dev_get_drvdata(dev);
968         unsigned long val;
969         int min;
970         u8 old;
971
972         if (kstrtoul(buf, 10, &val) < 0)
973                 return -EINVAL;
974
975         mutex_lock(&data->update_lock);
976         old = it87_read_value(data, IT87_REG_FAN_DIV);
977
978         /* Save fan min limit */
979         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
980
981         switch (nr) {
982         case 0:
983         case 1:
984                 data->fan_div[nr] = DIV_TO_REG(val);
985                 break;
986         case 2:
987                 if (val < 8)
988                         data->fan_div[nr] = 1;
989                 else
990                         data->fan_div[nr] = 3;
991         }
992         val = old & 0x80;
993         val |= (data->fan_div[0] & 0x07);
994         val |= (data->fan_div[1] & 0x07) << 3;
995         if (data->fan_div[2] == 3)
996                 val |= 0x1 << 6;
997         it87_write_value(data, IT87_REG_FAN_DIV, val);
998
999         /* Restore fan min limit */
1000         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1001         it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
1002
1003         mutex_unlock(&data->update_lock);
1004         return count;
1005 }
1006
1007 /* Returns 0 if OK, -EINVAL otherwise */
1008 static int check_trip_points(struct device *dev, int nr)
1009 {
1010         const struct it87_data *data = dev_get_drvdata(dev);
1011         int i, err = 0;
1012
1013         if (has_old_autopwm(data)) {
1014                 for (i = 0; i < 3; i++) {
1015                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1016                                 err = -EINVAL;
1017                 }
1018                 for (i = 0; i < 2; i++) {
1019                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1020                                 err = -EINVAL;
1021                 }
1022         }
1023
1024         if (err) {
1025                 dev_err(dev,
1026                         "Inconsistent trip points, not switching to automatic mode\n");
1027                 dev_err(dev, "Adjust the trip points and try again\n");
1028         }
1029         return err;
1030 }
1031
1032 static ssize_t set_pwm_enable(struct device *dev,
1033                 struct device_attribute *attr, const char *buf, size_t count)
1034 {
1035         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1036         int nr = sensor_attr->index;
1037
1038         struct it87_data *data = dev_get_drvdata(dev);
1039         long val;
1040
1041         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1042                 return -EINVAL;
1043
1044         /* Check trip points before switching to automatic mode */
1045         if (val == 2) {
1046                 if (check_trip_points(dev, nr) < 0)
1047                         return -EINVAL;
1048         }
1049
1050         /* IT8603E does not have on/off mode */
1051         if (val == 0 && data->type == it8603)
1052                 return -EINVAL;
1053
1054         mutex_lock(&data->update_lock);
1055
1056         if (val == 0) {
1057                 int tmp;
1058                 /* make sure the fan is on when in on/off mode */
1059                 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1060                 it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr));
1061                 /* set on/off mode */
1062                 data->fan_main_ctrl &= ~(1 << nr);
1063                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1064                                  data->fan_main_ctrl);
1065         } else {
1066                 if (val == 1)                           /* Manual mode */
1067                         data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
1068                                              data->pwm_temp_map[nr] :
1069                                              data->pwm_duty[nr];
1070                 else                                    /* Automatic mode */
1071                         data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1072                 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1073
1074                 if (data->type != it8603) {
1075                         /* set SmartGuardian mode */
1076                         data->fan_main_ctrl |= (1 << nr);
1077                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1078                                          data->fan_main_ctrl);
1079                 }
1080         }
1081
1082         mutex_unlock(&data->update_lock);
1083         return count;
1084 }
1085 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1086                 const char *buf, size_t count)
1087 {
1088         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1089         int nr = sensor_attr->index;
1090
1091         struct it87_data *data = dev_get_drvdata(dev);
1092         long val;
1093
1094         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1095                 return -EINVAL;
1096
1097         mutex_lock(&data->update_lock);
1098         if (has_newer_autopwm(data)) {
1099                 /*
1100                  * If we are in automatic mode, the PWM duty cycle register
1101                  * is read-only so we can't write the value.
1102                  */
1103                 if (data->pwm_ctrl[nr] & 0x80) {
1104                         mutex_unlock(&data->update_lock);
1105                         return -EBUSY;
1106                 }
1107                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1108                 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1109                                  data->pwm_duty[nr]);
1110         } else {
1111                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1112                 /*
1113                  * If we are in manual mode, write the duty cycle immediately;
1114                  * otherwise, just store it for later use.
1115                  */
1116                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1117                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1118                         it87_write_value(data, IT87_REG_PWM[nr],
1119                                          data->pwm_ctrl[nr]);
1120                 }
1121         }
1122         mutex_unlock(&data->update_lock);
1123         return count;
1124 }
1125 static ssize_t set_pwm_freq(struct device *dev,
1126                 struct device_attribute *attr, const char *buf, size_t count)
1127 {
1128         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1129         struct it87_data *data = dev_get_drvdata(dev);
1130         int nr = sensor_attr->index;
1131         unsigned long val;
1132         int i;
1133
1134         if (kstrtoul(buf, 10, &val) < 0)
1135                 return -EINVAL;
1136
1137         val = clamp_val(val, 0, 1000000);
1138         val *= has_newer_autopwm(data) ? 256 : 128;
1139
1140         /* Search for the nearest available frequency */
1141         for (i = 0; i < 7; i++) {
1142                 if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2)
1143                         break;
1144         }
1145
1146         mutex_lock(&data->update_lock);
1147         if (nr == 0) {
1148                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1149                 data->fan_ctl |= i << 4;
1150                 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1151         } else {
1152                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1153                 data->extra |= i << 4;
1154                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1155         }
1156         mutex_unlock(&data->update_lock);
1157
1158         return count;
1159 }
1160 static ssize_t show_pwm_temp_map(struct device *dev,
1161                 struct device_attribute *attr, char *buf)
1162 {
1163         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1164         int nr = sensor_attr->index;
1165
1166         struct it87_data *data = it87_update_device(dev);
1167         int map;
1168
1169         if (data->pwm_temp_map[nr] < 3)
1170                 map = 1 << data->pwm_temp_map[nr];
1171         else
1172                 map = 0;                        /* Should never happen */
1173         return sprintf(buf, "%d\n", map);
1174 }
1175 static ssize_t set_pwm_temp_map(struct device *dev,
1176                 struct device_attribute *attr, const char *buf, size_t count)
1177 {
1178         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1179         int nr = sensor_attr->index;
1180
1181         struct it87_data *data = dev_get_drvdata(dev);
1182         long val;
1183         u8 reg;
1184
1185         /*
1186          * This check can go away if we ever support automatic fan speed
1187          * control on newer chips.
1188          */
1189         if (!has_old_autopwm(data)) {
1190                 dev_notice(dev, "Mapping change disabled for safety reasons\n");
1191                 return -EINVAL;
1192         }
1193
1194         if (kstrtol(buf, 10, &val) < 0)
1195                 return -EINVAL;
1196
1197         switch (val) {
1198         case (1 << 0):
1199                 reg = 0x00;
1200                 break;
1201         case (1 << 1):
1202                 reg = 0x01;
1203                 break;
1204         case (1 << 2):
1205                 reg = 0x02;
1206                 break;
1207         default:
1208                 return -EINVAL;
1209         }
1210
1211         mutex_lock(&data->update_lock);
1212         data->pwm_temp_map[nr] = reg;
1213         /*
1214          * If we are in automatic mode, write the temp mapping immediately;
1215          * otherwise, just store it for later use.
1216          */
1217         if (data->pwm_ctrl[nr] & 0x80) {
1218                 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1219                 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1220         }
1221         mutex_unlock(&data->update_lock);
1222         return count;
1223 }
1224
1225 static ssize_t show_auto_pwm(struct device *dev,
1226                 struct device_attribute *attr, char *buf)
1227 {
1228         struct it87_data *data = it87_update_device(dev);
1229         struct sensor_device_attribute_2 *sensor_attr =
1230                         to_sensor_dev_attr_2(attr);
1231         int nr = sensor_attr->nr;
1232         int point = sensor_attr->index;
1233
1234         return sprintf(buf, "%d\n",
1235                        pwm_from_reg(data, data->auto_pwm[nr][point]));
1236 }
1237
1238 static ssize_t set_auto_pwm(struct device *dev,
1239                 struct device_attribute *attr, const char *buf, size_t count)
1240 {
1241         struct it87_data *data = dev_get_drvdata(dev);
1242         struct sensor_device_attribute_2 *sensor_attr =
1243                         to_sensor_dev_attr_2(attr);
1244         int nr = sensor_attr->nr;
1245         int point = sensor_attr->index;
1246         long val;
1247
1248         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1249                 return -EINVAL;
1250
1251         mutex_lock(&data->update_lock);
1252         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1253         it87_write_value(data, IT87_REG_AUTO_PWM(nr, point),
1254                          data->auto_pwm[nr][point]);
1255         mutex_unlock(&data->update_lock);
1256         return count;
1257 }
1258
1259 static ssize_t show_auto_temp(struct device *dev,
1260                 struct device_attribute *attr, char *buf)
1261 {
1262         struct it87_data *data = it87_update_device(dev);
1263         struct sensor_device_attribute_2 *sensor_attr =
1264                         to_sensor_dev_attr_2(attr);
1265         int nr = sensor_attr->nr;
1266         int point = sensor_attr->index;
1267
1268         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point]));
1269 }
1270
1271 static ssize_t set_auto_temp(struct device *dev,
1272                 struct device_attribute *attr, const char *buf, size_t count)
1273 {
1274         struct it87_data *data = dev_get_drvdata(dev);
1275         struct sensor_device_attribute_2 *sensor_attr =
1276                         to_sensor_dev_attr_2(attr);
1277         int nr = sensor_attr->nr;
1278         int point = sensor_attr->index;
1279         long val;
1280
1281         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1282                 return -EINVAL;
1283
1284         mutex_lock(&data->update_lock);
1285         data->auto_temp[nr][point] = TEMP_TO_REG(val);
1286         it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point),
1287                          data->auto_temp[nr][point]);
1288         mutex_unlock(&data->update_lock);
1289         return count;
1290 }
1291
1292 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1293 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1294                             0, 1);
1295 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1296                           set_fan_div, 0);
1297
1298 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1299 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1300                             1, 1);
1301 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1302                           set_fan_div, 1);
1303
1304 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1305 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1306                             2, 1);
1307 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1308                           set_fan_div, 2);
1309
1310 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1311 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1312                             3, 1);
1313
1314 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1315 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1316                             4, 1);
1317
1318 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1319 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1320                             5, 1);
1321
1322 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1323                           show_pwm_enable, set_pwm_enable, 0);
1324 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1325 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1326                           set_pwm_freq, 0);
1327 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO | S_IWUSR,
1328                           show_pwm_temp_map, set_pwm_temp_map, 0);
1329 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1330                             show_auto_pwm, set_auto_pwm, 0, 0);
1331 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1332                             show_auto_pwm, set_auto_pwm, 0, 1);
1333 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1334                             show_auto_pwm, set_auto_pwm, 0, 2);
1335 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1336                             show_auto_pwm, NULL, 0, 3);
1337 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1338                             show_auto_temp, set_auto_temp, 0, 1);
1339 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1340                             show_auto_temp, set_auto_temp, 0, 0);
1341 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1342                             show_auto_temp, set_auto_temp, 0, 2);
1343 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1344                             show_auto_temp, set_auto_temp, 0, 3);
1345 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1346                             show_auto_temp, set_auto_temp, 0, 4);
1347
1348 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1349                           show_pwm_enable, set_pwm_enable, 1);
1350 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1351 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1352 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO | S_IWUSR,
1353                           show_pwm_temp_map, set_pwm_temp_map, 1);
1354 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1355                             show_auto_pwm, set_auto_pwm, 1, 0);
1356 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1357                             show_auto_pwm, set_auto_pwm, 1, 1);
1358 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1359                             show_auto_pwm, set_auto_pwm, 1, 2);
1360 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1361                             show_auto_pwm, NULL, 1, 3);
1362 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1363                             show_auto_temp, set_auto_temp, 1, 1);
1364 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1365                             show_auto_temp, set_auto_temp, 1, 0);
1366 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1367                             show_auto_temp, set_auto_temp, 1, 2);
1368 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1369                             show_auto_temp, set_auto_temp, 1, 3);
1370 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1371                             show_auto_temp, set_auto_temp, 1, 4);
1372
1373 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1374                           show_pwm_enable, set_pwm_enable, 2);
1375 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1376 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1377 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO | S_IWUSR,
1378                           show_pwm_temp_map, set_pwm_temp_map, 2);
1379 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1380                             show_auto_pwm, set_auto_pwm, 2, 0);
1381 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1382                             show_auto_pwm, set_auto_pwm, 2, 1);
1383 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1384                             show_auto_pwm, set_auto_pwm, 2, 2);
1385 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1386                             show_auto_pwm, NULL, 2, 3);
1387 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1388                             show_auto_temp, set_auto_temp, 2, 1);
1389 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1390                             show_auto_temp, set_auto_temp, 2, 0);
1391 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1392                             show_auto_temp, set_auto_temp, 2, 2);
1393 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1394                             show_auto_temp, set_auto_temp, 2, 3);
1395 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1396                             show_auto_temp, set_auto_temp, 2, 4);
1397
1398 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1399                           show_pwm_enable, set_pwm_enable, 3);
1400 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1401 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1402 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO | S_IWUSR,
1403                           show_pwm_temp_map, set_pwm_temp_map, 3);
1404
1405 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1406                           show_pwm_enable, set_pwm_enable, 4);
1407 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1408 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1409 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO | S_IWUSR,
1410                           show_pwm_temp_map, set_pwm_temp_map, 4);
1411
1412 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1413                           show_pwm_enable, set_pwm_enable, 5);
1414 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1415 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1416 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO | S_IWUSR,
1417                           show_pwm_temp_map, set_pwm_temp_map, 5);
1418
1419 /* Alarms */
1420 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1421                 char *buf)
1422 {
1423         struct it87_data *data = it87_update_device(dev);
1424         return sprintf(buf, "%u\n", data->alarms);
1425 }
1426 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1427
1428 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1429                 char *buf)
1430 {
1431         int bitnr = to_sensor_dev_attr(attr)->index;
1432         struct it87_data *data = it87_update_device(dev);
1433         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1434 }
1435
1436 static ssize_t clear_intrusion(struct device *dev, struct device_attribute
1437                 *attr, const char *buf, size_t count)
1438 {
1439         struct it87_data *data = dev_get_drvdata(dev);
1440         long val;
1441         int config;
1442
1443         if (kstrtol(buf, 10, &val) < 0 || val != 0)
1444                 return -EINVAL;
1445
1446         mutex_lock(&data->update_lock);
1447         config = it87_read_value(data, IT87_REG_CONFIG);
1448         if (config < 0) {
1449                 count = config;
1450         } else {
1451                 config |= 1 << 5;
1452                 it87_write_value(data, IT87_REG_CONFIG, config);
1453                 /* Invalidate cache to force re-read */
1454                 data->valid = 0;
1455         }
1456         mutex_unlock(&data->update_lock);
1457
1458         return count;
1459 }
1460
1461 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1462 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1463 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1464 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1465 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1466 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1467 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1468 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1469 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1470 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1471 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1472 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1473 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1474 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1475 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1476 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1477 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1478 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1479                           show_alarm, clear_intrusion, 4);
1480
1481 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1482                 char *buf)
1483 {
1484         int bitnr = to_sensor_dev_attr(attr)->index;
1485         struct it87_data *data = it87_update_device(dev);
1486         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1487 }
1488 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1489                 const char *buf, size_t count)
1490 {
1491         int bitnr = to_sensor_dev_attr(attr)->index;
1492         struct it87_data *data = dev_get_drvdata(dev);
1493         long val;
1494
1495         if (kstrtol(buf, 10, &val) < 0
1496          || (val != 0 && val != 1))
1497                 return -EINVAL;
1498
1499         mutex_lock(&data->update_lock);
1500         data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1501         if (val)
1502                 data->beeps |= (1 << bitnr);
1503         else
1504                 data->beeps &= ~(1 << bitnr);
1505         it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1506         mutex_unlock(&data->update_lock);
1507         return count;
1508 }
1509
1510 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1511                           show_beep, set_beep, 1);
1512 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1513 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1514 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1515 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1516 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1517 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1518 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1519 /* fanX_beep writability is set later */
1520 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1521 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1522 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1523 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1524 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1525 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
1526 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1527                           show_beep, set_beep, 2);
1528 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1529 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1530
1531 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1532                 char *buf)
1533 {
1534         struct it87_data *data = dev_get_drvdata(dev);
1535         return sprintf(buf, "%u\n", data->vrm);
1536 }
1537 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1538                 const char *buf, size_t count)
1539 {
1540         struct it87_data *data = dev_get_drvdata(dev);
1541         unsigned long val;
1542
1543         if (kstrtoul(buf, 10, &val) < 0)
1544                 return -EINVAL;
1545
1546         data->vrm = val;
1547
1548         return count;
1549 }
1550 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1551
1552 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1553                 char *buf)
1554 {
1555         struct it87_data *data = it87_update_device(dev);
1556         return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
1557 }
1558 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
1559
1560 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1561                 char *buf)
1562 {
1563         static const char * const labels[] = {
1564                 "+5V",
1565                 "5VSB",
1566                 "Vbat",
1567         };
1568         static const char * const labels_it8721[] = {
1569                 "+3.3V",
1570                 "3VSB",
1571                 "Vbat",
1572         };
1573         struct it87_data *data = dev_get_drvdata(dev);
1574         int nr = to_sensor_dev_attr(attr)->index;
1575
1576         return sprintf(buf, "%s\n", has_12mv_adc(data) ? labels_it8721[nr]
1577                                                        : labels[nr]);
1578 }
1579 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1580 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1581 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1582 /* AVCC3 */
1583 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 0);
1584
1585 static ssize_t show_name(struct device *dev, struct device_attribute
1586                          *devattr, char *buf)
1587 {
1588         struct it87_data *data = dev_get_drvdata(dev);
1589         return sprintf(buf, "%s\n", data->name);
1590 }
1591 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1592
1593 static struct attribute *it87_attributes_in[10][5] = {
1594 {
1595         &sensor_dev_attr_in0_input.dev_attr.attr,
1596         &sensor_dev_attr_in0_min.dev_attr.attr,
1597         &sensor_dev_attr_in0_max.dev_attr.attr,
1598         &sensor_dev_attr_in0_alarm.dev_attr.attr,
1599         NULL
1600 }, {
1601         &sensor_dev_attr_in1_input.dev_attr.attr,
1602         &sensor_dev_attr_in1_min.dev_attr.attr,
1603         &sensor_dev_attr_in1_max.dev_attr.attr,
1604         &sensor_dev_attr_in1_alarm.dev_attr.attr,
1605         NULL
1606 }, {
1607         &sensor_dev_attr_in2_input.dev_attr.attr,
1608         &sensor_dev_attr_in2_min.dev_attr.attr,
1609         &sensor_dev_attr_in2_max.dev_attr.attr,
1610         &sensor_dev_attr_in2_alarm.dev_attr.attr,
1611         NULL
1612 }, {
1613         &sensor_dev_attr_in3_input.dev_attr.attr,
1614         &sensor_dev_attr_in3_min.dev_attr.attr,
1615         &sensor_dev_attr_in3_max.dev_attr.attr,
1616         &sensor_dev_attr_in3_alarm.dev_attr.attr,
1617         NULL
1618 }, {
1619         &sensor_dev_attr_in4_input.dev_attr.attr,
1620         &sensor_dev_attr_in4_min.dev_attr.attr,
1621         &sensor_dev_attr_in4_max.dev_attr.attr,
1622         &sensor_dev_attr_in4_alarm.dev_attr.attr,
1623         NULL
1624 }, {
1625         &sensor_dev_attr_in5_input.dev_attr.attr,
1626         &sensor_dev_attr_in5_min.dev_attr.attr,
1627         &sensor_dev_attr_in5_max.dev_attr.attr,
1628         &sensor_dev_attr_in5_alarm.dev_attr.attr,
1629         NULL
1630 }, {
1631         &sensor_dev_attr_in6_input.dev_attr.attr,
1632         &sensor_dev_attr_in6_min.dev_attr.attr,
1633         &sensor_dev_attr_in6_max.dev_attr.attr,
1634         &sensor_dev_attr_in6_alarm.dev_attr.attr,
1635         NULL
1636 }, {
1637         &sensor_dev_attr_in7_input.dev_attr.attr,
1638         &sensor_dev_attr_in7_min.dev_attr.attr,
1639         &sensor_dev_attr_in7_max.dev_attr.attr,
1640         &sensor_dev_attr_in7_alarm.dev_attr.attr,
1641         NULL
1642 }, {
1643         &sensor_dev_attr_in8_input.dev_attr.attr,
1644         NULL
1645 }, {
1646         &sensor_dev_attr_in9_input.dev_attr.attr,
1647         NULL
1648 } };
1649
1650 static const struct attribute_group it87_group_in[10] = {
1651         { .attrs = it87_attributes_in[0] },
1652         { .attrs = it87_attributes_in[1] },
1653         { .attrs = it87_attributes_in[2] },
1654         { .attrs = it87_attributes_in[3] },
1655         { .attrs = it87_attributes_in[4] },
1656         { .attrs = it87_attributes_in[5] },
1657         { .attrs = it87_attributes_in[6] },
1658         { .attrs = it87_attributes_in[7] },
1659         { .attrs = it87_attributes_in[8] },
1660         { .attrs = it87_attributes_in[9] },
1661 };
1662
1663 static struct attribute *it87_attributes_temp[3][6] = {
1664 {
1665         &sensor_dev_attr_temp1_input.dev_attr.attr,
1666         &sensor_dev_attr_temp1_max.dev_attr.attr,
1667         &sensor_dev_attr_temp1_min.dev_attr.attr,
1668         &sensor_dev_attr_temp1_type.dev_attr.attr,
1669         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
1670         NULL
1671 } , {
1672         &sensor_dev_attr_temp2_input.dev_attr.attr,
1673         &sensor_dev_attr_temp2_max.dev_attr.attr,
1674         &sensor_dev_attr_temp2_min.dev_attr.attr,
1675         &sensor_dev_attr_temp2_type.dev_attr.attr,
1676         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
1677         NULL
1678 } , {
1679         &sensor_dev_attr_temp3_input.dev_attr.attr,
1680         &sensor_dev_attr_temp3_max.dev_attr.attr,
1681         &sensor_dev_attr_temp3_min.dev_attr.attr,
1682         &sensor_dev_attr_temp3_type.dev_attr.attr,
1683         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1684         NULL
1685 } };
1686
1687 static const struct attribute_group it87_group_temp[3] = {
1688         { .attrs = it87_attributes_temp[0] },
1689         { .attrs = it87_attributes_temp[1] },
1690         { .attrs = it87_attributes_temp[2] },
1691 };
1692
1693 static struct attribute *it87_attributes_temp_offset[] = {
1694         &sensor_dev_attr_temp1_offset.dev_attr.attr,
1695         &sensor_dev_attr_temp2_offset.dev_attr.attr,
1696         &sensor_dev_attr_temp3_offset.dev_attr.attr,
1697 };
1698
1699 static struct attribute *it87_attributes[] = {
1700         &dev_attr_alarms.attr,
1701         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
1702         &dev_attr_name.attr,
1703         NULL
1704 };
1705
1706 static const struct attribute_group it87_group = {
1707         .attrs = it87_attributes,
1708 };
1709
1710 static struct attribute *it87_attributes_in_beep[] = {
1711         &sensor_dev_attr_in0_beep.dev_attr.attr,
1712         &sensor_dev_attr_in1_beep.dev_attr.attr,
1713         &sensor_dev_attr_in2_beep.dev_attr.attr,
1714         &sensor_dev_attr_in3_beep.dev_attr.attr,
1715         &sensor_dev_attr_in4_beep.dev_attr.attr,
1716         &sensor_dev_attr_in5_beep.dev_attr.attr,
1717         &sensor_dev_attr_in6_beep.dev_attr.attr,
1718         &sensor_dev_attr_in7_beep.dev_attr.attr,
1719         NULL,
1720         NULL,
1721 };
1722
1723 static struct attribute *it87_attributes_temp_beep[] = {
1724         &sensor_dev_attr_temp1_beep.dev_attr.attr,
1725         &sensor_dev_attr_temp2_beep.dev_attr.attr,
1726         &sensor_dev_attr_temp3_beep.dev_attr.attr,
1727 };
1728
1729 static struct attribute *it87_attributes_fan[6][3+1] = { {
1730         &sensor_dev_attr_fan1_input.dev_attr.attr,
1731         &sensor_dev_attr_fan1_min.dev_attr.attr,
1732         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1733         NULL
1734 }, {
1735         &sensor_dev_attr_fan2_input.dev_attr.attr,
1736         &sensor_dev_attr_fan2_min.dev_attr.attr,
1737         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1738         NULL
1739 }, {
1740         &sensor_dev_attr_fan3_input.dev_attr.attr,
1741         &sensor_dev_attr_fan3_min.dev_attr.attr,
1742         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1743         NULL
1744 }, {
1745         &sensor_dev_attr_fan4_input.dev_attr.attr,
1746         &sensor_dev_attr_fan4_min.dev_attr.attr,
1747         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
1748         NULL
1749 }, {
1750         &sensor_dev_attr_fan5_input.dev_attr.attr,
1751         &sensor_dev_attr_fan5_min.dev_attr.attr,
1752         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
1753         NULL
1754 }, {
1755         &sensor_dev_attr_fan6_input.dev_attr.attr,
1756         &sensor_dev_attr_fan6_min.dev_attr.attr,
1757         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
1758         NULL
1759 } };
1760
1761 static const struct attribute_group it87_group_fan[6] = {
1762         { .attrs = it87_attributes_fan[0] },
1763         { .attrs = it87_attributes_fan[1] },
1764         { .attrs = it87_attributes_fan[2] },
1765         { .attrs = it87_attributes_fan[3] },
1766         { .attrs = it87_attributes_fan[4] },
1767         { .attrs = it87_attributes_fan[5] },
1768 };
1769
1770 static const struct attribute *it87_attributes_fan_div[] = {
1771         &sensor_dev_attr_fan1_div.dev_attr.attr,
1772         &sensor_dev_attr_fan2_div.dev_attr.attr,
1773         &sensor_dev_attr_fan3_div.dev_attr.attr,
1774 };
1775
1776 static struct attribute *it87_attributes_pwm[6][4+1] = { {
1777         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1778         &sensor_dev_attr_pwm1.dev_attr.attr,
1779         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1780         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
1781         NULL
1782 }, {
1783         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1784         &sensor_dev_attr_pwm2.dev_attr.attr,
1785         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1786         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
1787         NULL
1788 }, {
1789         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1790         &sensor_dev_attr_pwm3.dev_attr.attr,
1791         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
1792         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
1793         NULL
1794 }, {
1795         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
1796         &sensor_dev_attr_pwm4.dev_attr.attr,
1797         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
1798         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
1799         NULL
1800 }, {
1801         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
1802         &sensor_dev_attr_pwm5.dev_attr.attr,
1803         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
1804         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
1805         NULL
1806 }, {
1807         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
1808         &sensor_dev_attr_pwm6.dev_attr.attr,
1809         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
1810         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
1811         NULL
1812 } };
1813
1814 static umode_t pwm_attribute_mode(struct kobject *kobj, struct attribute *attr,
1815                                   int index)
1816 {
1817         struct device *dev = container_of(kobj, struct device, kobj);
1818         struct it87_data *data = dev_get_drvdata(dev);
1819
1820         if (has_pwm_freq2(data) && index == 2)
1821                 return attr->mode | S_IWUSR;
1822
1823         return attr->mode;
1824 }
1825
1826 static const struct attribute_group it87_group_pwm[6] = {
1827         { .attrs = it87_attributes_pwm[0] },
1828         { .attrs = it87_attributes_pwm[1],
1829           .is_visible = pwm_attribute_mode, },
1830         { .attrs = it87_attributes_pwm[2] },
1831         { .attrs = it87_attributes_pwm[3] },
1832         { .attrs = it87_attributes_pwm[4] },
1833         { .attrs = it87_attributes_pwm[5] },
1834 };
1835
1836 static struct attribute *it87_attributes_autopwm[3][9+1] = { {
1837         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
1838         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
1839         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
1840         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
1841         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
1842         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
1843         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
1844         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
1845         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
1846         NULL
1847 }, {
1848         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
1849         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
1850         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
1851         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
1852         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
1853         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
1854         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
1855         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
1856         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
1857         NULL
1858 }, {
1859         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
1860         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
1861         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
1862         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
1863         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
1864         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
1865         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
1866         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
1867         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
1868         NULL
1869 } };
1870
1871 static const struct attribute_group it87_group_autopwm[3] = {
1872         { .attrs = it87_attributes_autopwm[0] },
1873         { .attrs = it87_attributes_autopwm[1] },
1874         { .attrs = it87_attributes_autopwm[2] },
1875 };
1876
1877 static struct attribute *it87_attributes_fan_beep[] = {
1878         &sensor_dev_attr_fan1_beep.dev_attr.attr,
1879         &sensor_dev_attr_fan2_beep.dev_attr.attr,
1880         &sensor_dev_attr_fan3_beep.dev_attr.attr,
1881         &sensor_dev_attr_fan4_beep.dev_attr.attr,
1882         &sensor_dev_attr_fan5_beep.dev_attr.attr,
1883         &sensor_dev_attr_fan6_beep.dev_attr.attr,
1884 };
1885
1886 static struct attribute *it87_attributes_vid[] = {
1887         &dev_attr_vrm.attr,
1888         &dev_attr_cpu0_vid.attr,
1889         NULL
1890 };
1891
1892 static const struct attribute_group it87_group_vid = {
1893         .attrs = it87_attributes_vid,
1894 };
1895
1896 static struct attribute *it87_attributes_label[] = {
1897         &sensor_dev_attr_in3_label.dev_attr.attr,
1898         &sensor_dev_attr_in7_label.dev_attr.attr,
1899         &sensor_dev_attr_in8_label.dev_attr.attr,
1900         &sensor_dev_attr_in9_label.dev_attr.attr,
1901         NULL
1902 };
1903
1904 static const struct attribute_group it87_group_label = {
1905         .attrs = it87_attributes_label,
1906 };
1907
1908 /* SuperIO detection - will change isa_address if a chip is found */
1909 static int __init it87_find(int sioaddr, unsigned short *address,
1910                             struct it87_sio_data *sio_data)
1911 {
1912         int err;
1913         u16 chip_type;
1914         const char *board_vendor, *board_name;
1915
1916         err = superio_enter(sioaddr);
1917         if (err)
1918                 return err;
1919
1920         err = -ENODEV;
1921         chip_type = force_id ? force_id : superio_inw(sioaddr, DEVID);
1922
1923         switch (chip_type) {
1924         case IT8705F_DEVID:
1925                 sio_data->type = it87;
1926                 break;
1927         case IT8712F_DEVID:
1928                 sio_data->type = it8712;
1929                 break;
1930         case IT8716F_DEVID:
1931         case IT8726F_DEVID:
1932                 sio_data->type = it8716;
1933                 break;
1934         case IT8718F_DEVID:
1935                 sio_data->type = it8718;
1936                 break;
1937         case IT8720F_DEVID:
1938                 sio_data->type = it8720;
1939                 break;
1940         case IT8721F_DEVID:
1941                 sio_data->type = it8721;
1942                 break;
1943         case IT8728F_DEVID:
1944                 sio_data->type = it8728;
1945                 break;
1946         case IT8771E_DEVID:
1947                 sio_data->type = it8771;
1948                 break;
1949         case IT8772E_DEVID:
1950                 sio_data->type = it8772;
1951                 break;
1952         case IT8781F_DEVID:
1953                 sio_data->type = it8781;
1954                 break;
1955         case IT8782F_DEVID:
1956                 sio_data->type = it8782;
1957                 break;
1958         case IT8783E_DEVID:
1959                 sio_data->type = it8783;
1960                 break;
1961         case IT8786E_DEVID:
1962                 sio_data->type = it8786;
1963                 break;
1964         case IT8790E_DEVID:
1965                 sio_data->type = it8790;
1966                 break;
1967         case IT8603E_DEVID:
1968         case IT8623E_DEVID:
1969                 sio_data->type = it8603;
1970                 break;
1971         case IT8620E_DEVID:
1972                 sio_data->type = it8620;
1973                 break;
1974         case 0xffff:    /* No device at all */
1975                 goto exit;
1976         default:
1977                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
1978                 goto exit;
1979         }
1980
1981         superio_select(sioaddr, PME);
1982         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
1983                 pr_info("Device not activated, skipping\n");
1984                 goto exit;
1985         }
1986
1987         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
1988         if (*address == 0) {
1989                 pr_info("Base address not set, skipping\n");
1990                 goto exit;
1991         }
1992
1993         err = 0;
1994         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
1995         pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
1996                 it87_devices[sio_data->type].suffix,
1997                 *address, sio_data->revision);
1998
1999         /* in8 (Vbat) is always internal */
2000         sio_data->internal = (1 << 2);
2001
2002         /* in7 (VSB or VCCH5V) is always internal on some chips */
2003         if (it87_devices[sio_data->type].features & FEAT_IN7_INTERNAL)
2004                 sio_data->internal |= (1 << 1);
2005
2006         /* in9 (AVCC3), always internal if supported */
2007         if (it87_devices[sio_data->type].features & FEAT_AVCC3)
2008                 sio_data->internal |= (1 << 3); /* in9 is AVCC */
2009         else
2010                 sio_data->skip_in |= (1 << 9);
2011
2012         if (!(it87_devices[sio_data->type].features & FEAT_SIX_PWM))
2013                 sio_data->skip_pwm |= (1 << 3) | (1 << 4) | (1 << 5);
2014
2015         if (!(it87_devices[sio_data->type].features & FEAT_VID))
2016                 sio_data->skip_vid = 1;
2017
2018         /* Read GPIO config and VID value from LDN 7 (GPIO) */
2019         if (sio_data->type == it87) {
2020                 /* The IT8705F has a different LD number for GPIO */
2021                 superio_select(sioaddr, 5);
2022                 sio_data->beep_pin = superio_inb(sioaddr,
2023                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2024         } else if (sio_data->type == it8783) {
2025                 int reg25, reg27, reg2a, reg2c, regef;
2026
2027                 superio_select(sioaddr, GPIO);
2028
2029                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2030                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2031                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2032                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2033                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2034
2035                 /* Check if fan3 is there or not */
2036                 if ((reg27 & (1 << 0)) || !(reg2c & (1 << 2)))
2037                         sio_data->skip_fan |= (1 << 2);
2038                 if ((reg25 & (1 << 4))
2039                     || (!(reg2a & (1 << 1)) && (regef & (1 << 0))))
2040                         sio_data->skip_pwm |= (1 << 2);
2041
2042                 /* Check if fan2 is there or not */
2043                 if (reg27 & (1 << 7))
2044                         sio_data->skip_fan |= (1 << 1);
2045                 if (reg27 & (1 << 3))
2046                         sio_data->skip_pwm |= (1 << 1);
2047
2048                 /* VIN5 */
2049                 if ((reg27 & (1 << 0)) || (reg2c & (1 << 2)))
2050                         sio_data->skip_in |= (1 << 5); /* No VIN5 */
2051
2052                 /* VIN6 */
2053                 if (reg27 & (1 << 1))
2054                         sio_data->skip_in |= (1 << 6); /* No VIN6 */
2055
2056                 /*
2057                  * VIN7
2058                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2059                  */
2060                 if (reg27 & (1 << 2)) {
2061                         /*
2062                          * The data sheet is a bit unclear regarding the
2063                          * internal voltage divider for VCCH5V. It says
2064                          * "This bit enables and switches VIN7 (pin 91) to the
2065                          * internal voltage divider for VCCH5V".
2066                          * This is different to other chips, where the internal
2067                          * voltage divider would connect VIN7 to an internal
2068                          * voltage source. Maybe that is the case here as well.
2069                          *
2070                          * Since we don't know for sure, re-route it if that is
2071                          * not the case, and ask the user to report if the
2072                          * resulting voltage is sane.
2073                          */
2074                         if (!(reg2c & (1 << 1))) {
2075                                 reg2c |= (1 << 1);
2076                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg2c);
2077                                 pr_notice("Routing internal VCCH5V to in7.\n");
2078                         }
2079                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2080                         pr_notice("Please report if it displays a reasonable voltage.\n");
2081                 }
2082
2083                 if (reg2c & (1 << 0))
2084                         sio_data->internal |= (1 << 0);
2085                 if (reg2c & (1 << 1))
2086                         sio_data->internal |= (1 << 1);
2087
2088                 sio_data->beep_pin = superio_inb(sioaddr,
2089                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2090         } else if (sio_data->type == it8603) {
2091                 int reg27, reg29;
2092
2093                 superio_select(sioaddr, GPIO);
2094
2095                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2096
2097                 /* Check if fan3 is there or not */
2098                 if (reg27 & (1 << 6))
2099                         sio_data->skip_pwm |= (1 << 2);
2100                 if (reg27 & (1 << 7))
2101                         sio_data->skip_fan |= (1 << 2);
2102
2103                 /* Check if fan2 is there or not */
2104                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2105                 if (reg29 & (1 << 1))
2106                         sio_data->skip_pwm |= (1 << 1);
2107                 if (reg29 & (1 << 2))
2108                         sio_data->skip_fan |= (1 << 1);
2109
2110                 sio_data->skip_in |= (1 << 5); /* No VIN5 */
2111                 sio_data->skip_in |= (1 << 6); /* No VIN6 */
2112
2113                 sio_data->beep_pin = superio_inb(sioaddr,
2114                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2115         } else if (sio_data->type == it8620) {
2116                 int reg;
2117
2118                 superio_select(sioaddr, GPIO);
2119
2120                 /* Check for pwm5 */
2121                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2122                 if (reg & (1 << 6))
2123                         sio_data->skip_pwm |= (1 << 4);
2124
2125                 /* Check for fan4, fan5 */
2126                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2127                 if (!(reg & (1 << 5)))
2128                         sio_data->skip_fan |= (1 << 3);
2129                 if (!(reg & (1 << 4)))
2130                         sio_data->skip_fan |= (1 << 4);
2131
2132                 /* Check for pwm3, fan3 */
2133                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2134                 if (reg & (1 << 6))
2135                         sio_data->skip_pwm |= (1 << 2);
2136                 if (reg & (1 << 7))
2137                         sio_data->skip_fan |= (1 << 2);
2138
2139                 /* Check for pwm4 */
2140                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2141                 if (!(reg & (1 << 4)))
2142                         sio_data->skip_pwm |= (1 << 3);
2143
2144                 /* Check for pwm2, fan2 */
2145                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2146                 if (reg & (1 << 1))
2147                         sio_data->skip_pwm |= (1 << 1);
2148                 if (reg & (1 << 2))
2149                         sio_data->skip_fan |= (1 << 1);
2150                 /* Check for pwm6, fan6 */
2151                 if (!(reg & (1 << 7))) {
2152                         sio_data->skip_pwm |= (1 << 5);
2153                         sio_data->skip_fan |= (1 << 5);
2154                 }
2155
2156                 sio_data->beep_pin = superio_inb(sioaddr,
2157                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2158         } else {
2159                 int reg;
2160                 bool uart6;
2161
2162                 superio_select(sioaddr, GPIO);
2163
2164                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2165                 if (!sio_data->skip_vid) {
2166                         /* We need at least 4 VID pins */
2167                         if (reg & 0x0f) {
2168                                 pr_info("VID is disabled (pins used for GPIO)\n");
2169                                 sio_data->skip_vid = 1;
2170                         }
2171                 }
2172
2173                 /* Check if fan3 is there or not */
2174                 if (reg & (1 << 6))
2175                         sio_data->skip_pwm |= (1 << 2);
2176                 if (reg & (1 << 7))
2177                         sio_data->skip_fan |= (1 << 2);
2178
2179                 /* Check if fan2 is there or not */
2180                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2181                 if (reg & (1 << 1))
2182                         sio_data->skip_pwm |= (1 << 1);
2183                 if (reg & (1 << 2))
2184                         sio_data->skip_fan |= (1 << 1);
2185
2186                 if ((sio_data->type == it8718 || sio_data->type == it8720)
2187                  && !(sio_data->skip_vid))
2188                         sio_data->vid_value = superio_inb(sioaddr,
2189                                                           IT87_SIO_VID_REG);
2190
2191                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2192
2193                 uart6 = sio_data->type == it8782 && (reg & (1 << 2));
2194
2195                 /*
2196                  * The IT8720F has no VIN7 pin, so VCCH should always be
2197                  * routed internally to VIN7 with an internal divider.
2198                  * Curiously, there still is a configuration bit to control
2199                  * this, which means it can be set incorrectly. And even
2200                  * more curiously, many boards out there are improperly
2201                  * configured, even though the IT8720F datasheet claims
2202                  * that the internal routing of VCCH to VIN7 is the default
2203                  * setting. So we force the internal routing in this case.
2204                  *
2205                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
2206                  * If UART6 is enabled, re-route VIN7 to the internal divider
2207                  * if that is not already the case.
2208                  */
2209                 if ((sio_data->type == it8720 || uart6) && !(reg & (1 << 1))) {
2210                         reg |= (1 << 1);
2211                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
2212                         pr_notice("Routing internal VCCH to in7\n");
2213                 }
2214                 if (reg & (1 << 0))
2215                         sio_data->internal |= (1 << 0);
2216                 if (reg & (1 << 1))
2217                         sio_data->internal |= (1 << 1);
2218
2219                 /*
2220                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
2221                  * While VIN7 can be routed to the internal voltage divider,
2222                  * VIN5 and VIN6 are not available if UART6 is enabled.
2223                  *
2224                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
2225                  * is the temperature source. Since we can not read the
2226                  * temperature source here, skip_temp is preliminary.
2227                  */
2228                 if (uart6) {
2229                         sio_data->skip_in |= (1 << 5) | (1 << 6);
2230                         sio_data->skip_temp |= (1 << 2);
2231                 }
2232
2233                 sio_data->beep_pin = superio_inb(sioaddr,
2234                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2235         }
2236         if (sio_data->beep_pin)
2237                 pr_info("Beeping is supported\n");
2238
2239         /* Disable specific features based on DMI strings */
2240         board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
2241         board_name = dmi_get_system_info(DMI_BOARD_NAME);
2242         if (board_vendor && board_name) {
2243                 if (strcmp(board_vendor, "nVIDIA") == 0
2244                  && strcmp(board_name, "FN68PT") == 0) {
2245                         /*
2246                          * On the Shuttle SN68PT, FAN_CTL2 is apparently not
2247                          * connected to a fan, but to something else. One user
2248                          * has reported instant system power-off when changing
2249                          * the PWM2 duty cycle, so we disable it.
2250                          * I use the board name string as the trigger in case
2251                          * the same board is ever used in other systems.
2252                          */
2253                         pr_info("Disabling pwm2 due to hardware constraints\n");
2254                         sio_data->skip_pwm = (1 << 1);
2255                 }
2256         }
2257
2258 exit:
2259         superio_exit(sioaddr);
2260         return err;
2261 }
2262
2263 static void it87_remove_files(struct device *dev)
2264 {
2265         struct it87_data *data = dev_get_drvdata(dev);
2266         struct it87_sio_data *sio_data = dev_get_platdata(dev);
2267         int i;
2268
2269         sysfs_remove_group(&dev->kobj, &it87_group);
2270         for (i = 0; i < 10; i++) {
2271                 if (sio_data->skip_in & (1 << i))
2272                         continue;
2273                 sysfs_remove_group(&dev->kobj, &it87_group_in[i]);
2274                 if (it87_attributes_in_beep[i])
2275                         sysfs_remove_file(&dev->kobj,
2276                                           it87_attributes_in_beep[i]);
2277         }
2278         for (i = 0; i < 3; i++) {
2279                 if (!(data->has_temp & (1 << i)))
2280                         continue;
2281                 sysfs_remove_group(&dev->kobj, &it87_group_temp[i]);
2282                 if (has_temp_offset(data))
2283                         sysfs_remove_file(&dev->kobj,
2284                                           it87_attributes_temp_offset[i]);
2285                 if (sio_data->beep_pin)
2286                         sysfs_remove_file(&dev->kobj,
2287                                           it87_attributes_temp_beep[i]);
2288         }
2289         for (i = 0; i < 6; i++) {
2290                 if (!(data->has_fan & (1 << i)))
2291                         continue;
2292                 sysfs_remove_group(&dev->kobj, &it87_group_fan[i]);
2293                 if (sio_data->beep_pin)
2294                         sysfs_remove_file(&dev->kobj,
2295                                           it87_attributes_fan_beep[i]);
2296                 if (i < 3 && !has_16bit_fans(data))
2297                         sysfs_remove_file(&dev->kobj,
2298                                           it87_attributes_fan_div[i]);
2299         }
2300         for (i = 0; i < 6; i++) {
2301                 if (sio_data->skip_pwm & (1 << i))
2302                         continue;
2303                 sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]);
2304                 if (has_old_autopwm(data))
2305                         sysfs_remove_group(&dev->kobj,
2306                                            &it87_group_autopwm[i]);
2307         }
2308         if (!sio_data->skip_vid)
2309                 sysfs_remove_group(&dev->kobj, &it87_group_vid);
2310         sysfs_remove_group(&dev->kobj, &it87_group_label);
2311 }
2312
2313 static int it87_probe(struct platform_device *pdev)
2314 {
2315         struct it87_data *data;
2316         struct resource *res;
2317         struct device *dev = &pdev->dev;
2318         struct it87_sio_data *sio_data = dev_get_platdata(dev);
2319         int err = 0, i;
2320         int enable_pwm_interface;
2321         int fan_beep_need_rw;
2322
2323         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
2324         if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
2325                                  DRVNAME)) {
2326                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
2327                         (unsigned long)res->start,
2328                         (unsigned long)(res->start + IT87_EC_EXTENT - 1));
2329                 return -EBUSY;
2330         }
2331
2332         data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
2333         if (!data)
2334                 return -ENOMEM;
2335
2336         data->addr = res->start;
2337         data->type = sio_data->type;
2338         data->features = it87_devices[sio_data->type].features;
2339         data->peci_mask = it87_devices[sio_data->type].peci_mask;
2340         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
2341         data->name = it87_devices[sio_data->type].name;
2342         /*
2343          * IT8705F Datasheet 0.4.1, 3h == Version G.
2344          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
2345          * These are the first revisions with 16-bit tachometer support.
2346          */
2347         switch (data->type) {
2348         case it87:
2349                 if (sio_data->revision >= 0x03) {
2350                         data->features &= ~FEAT_OLD_AUTOPWM;
2351                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
2352                 }
2353                 break;
2354         case it8712:
2355                 if (sio_data->revision >= 0x08) {
2356                         data->features &= ~FEAT_OLD_AUTOPWM;
2357                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
2358                                           FEAT_FIVE_FANS;
2359                 }
2360                 break;
2361         default:
2362                 break;
2363         }
2364
2365         /* Now, we do the remaining detection. */
2366         if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80)
2367          || it87_read_value(data, IT87_REG_CHIPID) != 0x90)
2368                 return -ENODEV;
2369
2370         platform_set_drvdata(pdev, data);
2371
2372         mutex_init(&data->update_lock);
2373
2374         /* Check PWM configuration */
2375         enable_pwm_interface = it87_check_pwm(dev);
2376
2377         /* Starting with IT8721F, we handle scaling of internal voltages */
2378         if (has_12mv_adc(data)) {
2379                 if (sio_data->internal & (1 << 0))
2380                         data->in_scaled |= (1 << 3);    /* in3 is AVCC */
2381                 if (sio_data->internal & (1 << 1))
2382                         data->in_scaled |= (1 << 7);    /* in7 is VSB */
2383                 if (sio_data->internal & (1 << 2))
2384                         data->in_scaled |= (1 << 8);    /* in8 is Vbat */
2385                 if (sio_data->internal & (1 << 3))
2386                         data->in_scaled |= (1 << 9);    /* in9 is AVCC */
2387         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
2388                    sio_data->type == it8783) {
2389                 if (sio_data->internal & (1 << 0))
2390                         data->in_scaled |= (1 << 3);    /* in3 is VCC5V */
2391                 if (sio_data->internal & (1 << 1))
2392                         data->in_scaled |= (1 << 7);    /* in7 is VCCH5V */
2393         }
2394
2395         data->has_temp = 0x07;
2396         if (sio_data->skip_temp & (1 << 2)) {
2397                 if (sio_data->type == it8782
2398                     && !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
2399                         data->has_temp &= ~(1 << 2);
2400         }
2401
2402         /* Initialize the IT87 chip */
2403         it87_init_device(pdev);
2404
2405         /* Register sysfs hooks */
2406         err = sysfs_create_group(&dev->kobj, &it87_group);
2407         if (err)
2408                 return err;
2409
2410         for (i = 0; i < 10; i++) {
2411                 if (sio_data->skip_in & (1 << i))
2412                         continue;
2413                 err = sysfs_create_group(&dev->kobj, &it87_group_in[i]);
2414                 if (err)
2415                         goto error;
2416                 if (sio_data->beep_pin && it87_attributes_in_beep[i]) {
2417                         err = sysfs_create_file(&dev->kobj,
2418                                                 it87_attributes_in_beep[i]);
2419                         if (err)
2420                                 goto error;
2421                 }
2422         }
2423
2424         for (i = 0; i < 3; i++) {
2425                 if (!(data->has_temp & (1 << i)))
2426                         continue;
2427                 err = sysfs_create_group(&dev->kobj, &it87_group_temp[i]);
2428                 if (err)
2429                         goto error;
2430                 if (has_temp_offset(data)) {
2431                         err = sysfs_create_file(&dev->kobj,
2432                                                 it87_attributes_temp_offset[i]);
2433                         if (err)
2434                                 goto error;
2435                 }
2436                 if (sio_data->beep_pin) {
2437                         err = sysfs_create_file(&dev->kobj,
2438                                                 it87_attributes_temp_beep[i]);
2439                         if (err)
2440                                 goto error;
2441                 }
2442         }
2443
2444         /* Do not create fan files for disabled fans */
2445         fan_beep_need_rw = 1;
2446         for (i = 0; i < 6; i++) {
2447                 if (!(data->has_fan & (1 << i)))
2448                         continue;
2449                 err = sysfs_create_group(&dev->kobj, &it87_group_fan[i]);
2450                 if (err)
2451                         goto error;
2452
2453                 if (i < 3 && !has_16bit_fans(data)) {
2454                         err = sysfs_create_file(&dev->kobj,
2455                                                 it87_attributes_fan_div[i]);
2456                         if (err)
2457                                 goto error;
2458                 }
2459
2460                 if (sio_data->beep_pin) {
2461                         err = sysfs_create_file(&dev->kobj,
2462                                                 it87_attributes_fan_beep[i]);
2463                         if (err)
2464                                 goto error;
2465                         if (!fan_beep_need_rw)
2466                                 continue;
2467
2468                         /*
2469                          * As we have a single beep enable bit for all fans,
2470                          * only the first enabled fan has a writable attribute
2471                          * for it.
2472                          */
2473                         if (sysfs_chmod_file(&dev->kobj,
2474                                              it87_attributes_fan_beep[i],
2475                                              S_IRUGO | S_IWUSR))
2476                                 dev_dbg(dev, "chmod +w fan%d_beep failed\n",
2477                                         i + 1);
2478                         fan_beep_need_rw = 0;
2479                 }
2480         }
2481
2482         if (enable_pwm_interface) {
2483                 for (i = 0; i < 6; i++) {
2484                         if (sio_data->skip_pwm & (1 << i))
2485                                 continue;
2486                         err = sysfs_create_group(&dev->kobj,
2487                                                  &it87_group_pwm[i]);
2488                         if (err)
2489                                 goto error;
2490
2491                         if (!has_old_autopwm(data))
2492                                 continue;
2493                         err = sysfs_create_group(&dev->kobj,
2494                                                  &it87_group_autopwm[i]);
2495                         if (err)
2496                                 goto error;
2497                 }
2498         }
2499
2500         if (!sio_data->skip_vid) {
2501                 data->vrm = vid_which_vrm();
2502                 /* VID reading from Super-I/O config space if available */
2503                 data->vid = sio_data->vid_value;
2504                 err = sysfs_create_group(&dev->kobj, &it87_group_vid);
2505                 if (err)
2506                         goto error;
2507         }
2508
2509         /* Export labels for internal sensors */
2510         for (i = 0; i < 4; i++) {
2511                 if (!(sio_data->internal & (1 << i)))
2512                         continue;
2513                 err = sysfs_create_file(&dev->kobj,
2514                                         it87_attributes_label[i]);
2515                 if (err)
2516                         goto error;
2517         }
2518
2519         data->hwmon_dev = hwmon_device_register(dev);
2520         if (IS_ERR(data->hwmon_dev)) {
2521                 err = PTR_ERR(data->hwmon_dev);
2522                 goto error;
2523         }
2524
2525         return 0;
2526
2527 error:
2528         it87_remove_files(dev);
2529         return err;
2530 }
2531
2532 static int it87_remove(struct platform_device *pdev)
2533 {
2534         struct it87_data *data = platform_get_drvdata(pdev);
2535
2536         hwmon_device_unregister(data->hwmon_dev);
2537         it87_remove_files(&pdev->dev);
2538
2539         return 0;
2540 }
2541
2542 /*
2543  * Must be called with data->update_lock held, except during initialization.
2544  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2545  * would slow down the IT87 access and should not be necessary.
2546  */
2547 static int it87_read_value(struct it87_data *data, u8 reg)
2548 {
2549         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2550         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
2551 }
2552
2553 /*
2554  * Must be called with data->update_lock held, except during initialization.
2555  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2556  * would slow down the IT87 access and should not be necessary.
2557  */
2558 static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
2559 {
2560         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2561         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
2562 }
2563
2564 /* Return 1 if and only if the PWM interface is safe to use */
2565 static int it87_check_pwm(struct device *dev)
2566 {
2567         struct it87_data *data = dev_get_drvdata(dev);
2568         /*
2569          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
2570          * and polarity set to active low is sign that this is the case so we
2571          * disable pwm control to protect the user.
2572          */
2573         int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
2574         if ((tmp & 0x87) == 0) {
2575                 if (fix_pwm_polarity) {
2576                         /*
2577                          * The user asks us to attempt a chip reconfiguration.
2578                          * This means switching to active high polarity and
2579                          * inverting all fan speed values.
2580                          */
2581                         int i;
2582                         u8 pwm[3];
2583
2584                         for (i = 0; i < 3; i++)
2585                                 pwm[i] = it87_read_value(data,
2586                                                          IT87_REG_PWM[i]);
2587
2588                         /*
2589                          * If any fan is in automatic pwm mode, the polarity
2590                          * might be correct, as suspicious as it seems, so we
2591                          * better don't change anything (but still disable the
2592                          * PWM interface).
2593                          */
2594                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
2595                                 dev_info(dev,
2596                                          "Reconfiguring PWM to active high polarity\n");
2597                                 it87_write_value(data, IT87_REG_FAN_CTL,
2598                                                  tmp | 0x87);
2599                                 for (i = 0; i < 3; i++)
2600                                         it87_write_value(data,
2601                                                          IT87_REG_PWM[i],
2602                                                          0x7f & ~pwm[i]);
2603                                 return 1;
2604                         }
2605
2606                         dev_info(dev,
2607                                  "PWM configuration is too broken to be fixed\n");
2608                 }
2609
2610                 dev_info(dev,
2611                          "Detected broken BIOS defaults, disabling PWM interface\n");
2612                 return 0;
2613         } else if (fix_pwm_polarity) {
2614                 dev_info(dev,
2615                          "PWM configuration looks sane, won't touch\n");
2616         }
2617
2618         return 1;
2619 }
2620
2621 /* Called when we have found a new IT87. */
2622 static void it87_init_device(struct platform_device *pdev)
2623 {
2624         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2625         struct it87_data *data = platform_get_drvdata(pdev);
2626         int tmp, i;
2627         u8 mask;
2628
2629         /*
2630          * For each PWM channel:
2631          * - If it is in automatic mode, setting to manual mode should set
2632          *   the fan to full speed by default.
2633          * - If it is in manual mode, we need a mapping to temperature
2634          *   channels to use when later setting to automatic mode later.
2635          *   Use a 1:1 mapping by default (we are clueless.)
2636          * In both cases, the value can (and should) be changed by the user
2637          * prior to switching to a different mode.
2638          * Note that this is no longer needed for the IT8721F and later, as
2639          * these have separate registers for the temperature mapping and the
2640          * manual duty cycle.
2641          */
2642         for (i = 0; i < 3; i++) {
2643                 data->pwm_temp_map[i] = i;
2644                 data->pwm_duty[i] = 0x7f;       /* Full speed */
2645                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
2646         }
2647
2648         /*
2649          * Some chips seem to have default value 0xff for all limit
2650          * registers. For low voltage limits it makes no sense and triggers
2651          * alarms, so change to 0 instead. For high temperature limits, it
2652          * means -1 degree C, which surprisingly doesn't trigger an alarm,
2653          * but is still confusing, so change to 127 degrees C.
2654          */
2655         for (i = 0; i < 8; i++) {
2656                 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
2657                 if (tmp == 0xff)
2658                         it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
2659         }
2660         for (i = 0; i < 3; i++) {
2661                 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2662                 if (tmp == 0xff)
2663                         it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
2664         }
2665
2666         /*
2667          * Temperature channels are not forcibly enabled, as they can be
2668          * set to two different sensor types and we can't guess which one
2669          * is correct for a given system. These channels can be enabled at
2670          * run-time through the temp{1-3}_type sysfs accessors if needed.
2671          */
2672
2673         /* Check if voltage monitors are reset manually or by some reason */
2674         tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
2675         if ((tmp & 0xff) == 0) {
2676                 /* Enable all voltage monitors */
2677                 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
2678         }
2679
2680         /* Check if tachometers are reset manually or by some reason */
2681         mask = 0x70 & ~(sio_data->skip_fan << 4);
2682         data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2683         if ((data->fan_main_ctrl & mask) == 0) {
2684                 /* Enable all fan tachometers */
2685                 data->fan_main_ctrl |= mask;
2686                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2687                                  data->fan_main_ctrl);
2688         }
2689         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
2690
2691         tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
2692
2693         /* Set tachometers to 16-bit mode if needed */
2694         if (has_fan16_config(data)) {
2695                 if (~tmp & 0x07 & data->has_fan) {
2696                         dev_dbg(&pdev->dev,
2697                                 "Setting fan1-3 to 16-bit mode\n");
2698                         it87_write_value(data, IT87_REG_FAN_16BIT,
2699                                          tmp | 0x07);
2700                 }
2701         }
2702
2703         /* Check for additional fans */
2704         if (has_five_fans(data)) {
2705                 if (tmp & (1 << 4))
2706                         data->has_fan |= (1 << 3); /* fan4 enabled */
2707                 if (tmp & (1 << 5))
2708                         data->has_fan |= (1 << 4); /* fan5 enabled */
2709         }
2710
2711         if (has_six_fans(data)) {
2712                 if (tmp & (1 << 2))
2713                         data->has_fan |= (1 << 5); /* fan6 enabled */
2714         }
2715
2716         /* Fan input pins may be used for alternative functions */
2717         data->has_fan &= ~sio_data->skip_fan;
2718
2719         /* Check if pwm5, pwm6 are enabled */
2720         if (has_six_pwm(data)) {
2721                 /* The following code may be IT8620E specific */
2722                 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
2723                 if ((tmp & 0xc0) == 0xc0)
2724                         sio_data->skip_pwm |= (1 << 4);
2725                 if (!(tmp & (1 << 3)))
2726                         sio_data->skip_pwm |= (1 << 5);
2727         }
2728
2729         /* Start monitoring */
2730         it87_write_value(data, IT87_REG_CONFIG,
2731                          (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
2732                          | (update_vbat ? 0x41 : 0x01));
2733 }
2734
2735 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
2736 {
2737         data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
2738         if (has_newer_autopwm(data)) {
2739                 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
2740                 data->pwm_duty[nr] = it87_read_value(data,
2741                                                      IT87_REG_PWM_DUTY[nr]);
2742         } else {
2743                 if (data->pwm_ctrl[nr] & 0x80)  /* Automatic mode */
2744                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
2745                 else                            /* Manual mode */
2746                         data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
2747         }
2748
2749         if (has_old_autopwm(data)) {
2750                 int i;
2751
2752                 for (i = 0; i < 5 ; i++)
2753                         data->auto_temp[nr][i] = it87_read_value(data,
2754                                                 IT87_REG_AUTO_TEMP(nr, i));
2755                 for (i = 0; i < 3 ; i++)
2756                         data->auto_pwm[nr][i] = it87_read_value(data,
2757                                                 IT87_REG_AUTO_PWM(nr, i));
2758         }
2759 }
2760
2761 static struct it87_data *it87_update_device(struct device *dev)
2762 {
2763         struct it87_data *data = dev_get_drvdata(dev);
2764         int i;
2765
2766         mutex_lock(&data->update_lock);
2767
2768         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
2769             || !data->valid) {
2770                 if (update_vbat) {
2771                         /*
2772                          * Cleared after each update, so reenable.  Value
2773                          * returned by this read will be previous value
2774                          */
2775                         it87_write_value(data, IT87_REG_CONFIG,
2776                                 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
2777                 }
2778                 for (i = 0; i <= 7; i++) {
2779                         data->in[i][0] =
2780                                 it87_read_value(data, IT87_REG_VIN(i));
2781                         data->in[i][1] =
2782                                 it87_read_value(data, IT87_REG_VIN_MIN(i));
2783                         data->in[i][2] =
2784                                 it87_read_value(data, IT87_REG_VIN_MAX(i));
2785                 }
2786                 /* in8 (battery) has no limit registers */
2787                 data->in[8][0] = it87_read_value(data, IT87_REG_VIN(8));
2788                 if (has_avcc3(data))
2789                         data->in[9][0] = it87_read_value(data, IT87_REG_AVCC3);
2790
2791                 for (i = 0; i < 6; i++) {
2792                         /* Skip disabled fans */
2793                         if (!(data->has_fan & (1 << i)))
2794                                 continue;
2795
2796                         data->fan[i][1] =
2797                                 it87_read_value(data, IT87_REG_FAN_MIN[i]);
2798                         data->fan[i][0] = it87_read_value(data,
2799                                        IT87_REG_FAN[i]);
2800                         /* Add high byte if in 16-bit mode */
2801                         if (has_16bit_fans(data)) {
2802                                 data->fan[i][0] |= it87_read_value(data,
2803                                                 IT87_REG_FANX[i]) << 8;
2804                                 data->fan[i][1] |= it87_read_value(data,
2805                                                 IT87_REG_FANX_MIN[i]) << 8;
2806                         }
2807                 }
2808                 for (i = 0; i < 3; i++) {
2809                         if (!(data->has_temp & (1 << i)))
2810                                 continue;
2811                         data->temp[i][0] =
2812                                 it87_read_value(data, IT87_REG_TEMP(i));
2813                         data->temp[i][1] =
2814                                 it87_read_value(data, IT87_REG_TEMP_LOW(i));
2815                         data->temp[i][2] =
2816                                 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2817                         if (has_temp_offset(data))
2818                                 data->temp[i][3] =
2819                                   it87_read_value(data,
2820                                                   IT87_REG_TEMP_OFFSET[i]);
2821                 }
2822
2823                 /* Newer chips don't have clock dividers */
2824                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
2825                         i = it87_read_value(data, IT87_REG_FAN_DIV);
2826                         data->fan_div[0] = i & 0x07;
2827                         data->fan_div[1] = (i >> 3) & 0x07;
2828                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
2829                 }
2830
2831                 data->alarms =
2832                         it87_read_value(data, IT87_REG_ALARM1) |
2833                         (it87_read_value(data, IT87_REG_ALARM2) << 8) |
2834                         (it87_read_value(data, IT87_REG_ALARM3) << 16);
2835                 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
2836
2837                 data->fan_main_ctrl = it87_read_value(data,
2838                                 IT87_REG_FAN_MAIN_CTRL);
2839                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
2840                 for (i = 0; i < 3; i++)
2841                         it87_update_pwm_ctrl(data, i);
2842
2843                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
2844                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
2845                 /*
2846                  * The IT8705F does not have VID capability.
2847                  * The IT8718F and later don't use IT87_REG_VID for the
2848                  * same purpose.
2849                  */
2850                 if (data->type == it8712 || data->type == it8716) {
2851                         data->vid = it87_read_value(data, IT87_REG_VID);
2852                         /*
2853                          * The older IT8712F revisions had only 5 VID pins,
2854                          * but we assume it is always safe to read 6 bits.
2855                          */
2856                         data->vid &= 0x3f;
2857                 }
2858                 data->last_updated = jiffies;
2859                 data->valid = 1;
2860         }
2861
2862         mutex_unlock(&data->update_lock);
2863
2864         return data;
2865 }
2866
2867 static int __init it87_device_add(int index, unsigned short address,
2868                                   const struct it87_sio_data *sio_data)
2869 {
2870         struct platform_device *pdev;
2871         struct resource res = {
2872                 .start  = address + IT87_EC_OFFSET,
2873                 .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
2874                 .name   = DRVNAME,
2875                 .flags  = IORESOURCE_IO,
2876         };
2877         int err;
2878
2879         err = acpi_check_resource_conflict(&res);
2880         if (err)
2881                 return err;
2882
2883         pdev = platform_device_alloc(DRVNAME, address);
2884         if (!pdev)
2885                 return -ENOMEM;
2886
2887         err = platform_device_add_resources(pdev, &res, 1);
2888         if (err) {
2889                 pr_err("Device resource addition failed (%d)\n", err);
2890                 goto exit_device_put;
2891         }
2892
2893         err = platform_device_add_data(pdev, sio_data,
2894                                        sizeof(struct it87_sio_data));
2895         if (err) {
2896                 pr_err("Platform data allocation failed\n");
2897                 goto exit_device_put;
2898         }
2899
2900         err = platform_device_add(pdev);
2901         if (err) {
2902                 pr_err("Device addition failed (%d)\n", err);
2903                 goto exit_device_put;
2904         }
2905
2906         it87_pdev[index] = pdev;
2907         return 0;
2908
2909 exit_device_put:
2910         platform_device_put(pdev);
2911         return err;
2912 }
2913
2914 static int __init sm_it87_init(void)
2915 {
2916         int sioaddr[2] = { REG_2E, REG_4E };
2917         struct it87_sio_data sio_data;
2918         unsigned short isa_address;
2919         bool found = false;
2920         int i, err;
2921
2922         err = platform_driver_register(&it87_driver);
2923         if (err)
2924                 return err;
2925
2926         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
2927                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
2928                 isa_address = 0;
2929                 err = it87_find(sioaddr[i], &isa_address, &sio_data);
2930                 if (err || isa_address == 0)
2931                         continue;
2932
2933                 err = it87_device_add(i, isa_address, &sio_data);
2934                 if (err)
2935                         goto exit_dev_unregister;
2936                 found = true;
2937         }
2938
2939         if (!found) {
2940                 err = -ENODEV;
2941                 goto exit_unregister;
2942         }
2943         return 0;
2944
2945 exit_dev_unregister:
2946         /* NULL check handled by platform_device_unregister */
2947         platform_device_unregister(it87_pdev[0]);
2948 exit_unregister:
2949         platform_driver_unregister(&it87_driver);
2950         return err;
2951 }
2952
2953 static void __exit sm_it87_exit(void)
2954 {
2955         /* NULL check handled by platform_device_unregister */
2956         platform_device_unregister(it87_pdev[1]);
2957         platform_device_unregister(it87_pdev[0]);
2958         platform_driver_unregister(&it87_driver);
2959 }
2960
2961
2962 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
2963 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
2964 module_param(update_vbat, bool, 0);
2965 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
2966 module_param(fix_pwm_polarity, bool, 0);
2967 MODULE_PARM_DESC(fix_pwm_polarity,
2968                  "Force PWM polarity to active high (DANGEROUS)");
2969 MODULE_LICENSE("GPL");
2970
2971 module_init(sm_it87_init);
2972 module_exit(sm_it87_exit);