]> git.sur5r.net Git - groeck-it87/blob - it87.c
Rearrange code to avoid forward declarations
[groeck-it87] / it87.c
1 /*
2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
3  *           monitoring.
4  *
5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
8  *  Fan Controller)
9  *
10  *  This driver supports only the Environment Controller in the IT8705F and
11  *  similar parts.  The other devices are supported by different drivers.
12  *
13  *  Supports: IT8603E  Super I/O chip w/LPC interface
14  *            IT8620E  Super I/O chip w/LPC interface
15  *            IT8623E  Super I/O chip w/LPC interface
16  *            IT8705F  Super I/O chip w/LPC interface
17  *            IT8712F  Super I/O chip w/LPC interface
18  *            IT8716F  Super I/O chip w/LPC interface
19  *            IT8718F  Super I/O chip w/LPC interface
20  *            IT8720F  Super I/O chip w/LPC interface
21  *            IT8721F  Super I/O chip w/LPC interface
22  *            IT8726F  Super I/O chip w/LPC interface
23  *            IT8728F  Super I/O chip w/LPC interface
24  *            IT8758E  Super I/O chip w/LPC interface
25  *            IT8771E  Super I/O chip w/LPC interface
26  *            IT8772E  Super I/O chip w/LPC interface
27  *            IT8781F  Super I/O chip w/LPC interface
28  *            IT8782F  Super I/O chip w/LPC interface
29  *            IT8783E/F Super I/O chip w/LPC interface
30  *            IT8786E  Super I/O chip w/LPC interface
31  *            IT8790E  Super I/O chip w/LPC interface
32  *            Sis950   A clone of the IT8705F
33  *
34  *  Copyright (C) 2001 Chris Gauthron
35  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
36  *
37  *  This program is free software; you can redistribute it and/or modify
38  *  it under the terms of the GNU General Public License as published by
39  *  the Free Software Foundation; either version 2 of the License, or
40  *  (at your option) any later version.
41  *
42  *  This program is distributed in the hope that it will be useful,
43  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
44  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
45  *  GNU General Public License for more details.
46  *
47  *  You should have received a copy of the GNU General Public License
48  *  along with this program; if not, write to the Free Software
49  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
50  */
51
52 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
53
54 #include <linux/module.h>
55 #include <linux/init.h>
56 #include <linux/slab.h>
57 #include <linux/jiffies.h>
58 #include <linux/platform_device.h>
59 #include <linux/hwmon.h>
60 #include <linux/hwmon-sysfs.h>
61 #include <linux/hwmon-vid.h>
62 #include <linux/err.h>
63 #include <linux/mutex.h>
64 #include <linux/sysfs.h>
65 #include <linux/string.h>
66 #include <linux/dmi.h>
67 #include <linux/acpi.h>
68 #include <linux/io.h>
69 #include "compat.h"
70
71 #define DRVNAME "it87"
72
73 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8771,
74              it8772, it8781, it8782, it8783, it8786, it8790, it8603, it8620 };
75
76 static unsigned short force_id;
77 module_param(force_id, ushort, 0);
78 MODULE_PARM_DESC(force_id, "Override the detected device ID");
79
80 static struct platform_device *it87_pdev[2];
81
82 #define REG_2E  0x2e    /* The register to read/write */
83 #define REG_4E  0x4e    /* Secondary register to read/write */
84
85 #define DEV     0x07    /* Register: Logical device select */
86 #define PME     0x04    /* The device with the fan registers in it */
87
88 /* The device with the IT8718F/IT8720F VID value in it */
89 #define GPIO    0x07
90
91 #define DEVID   0x20    /* Register: Device ID */
92 #define DEVREV  0x22    /* Register: Device Revision */
93
94 static inline int superio_inb(int ioreg, int reg)
95 {
96         outb(reg, ioreg);
97         return inb(ioreg + 1);
98 }
99
100 static inline void superio_outb(int ioreg, int reg, int val)
101 {
102         outb(reg, ioreg);
103         outb(val, ioreg + 1);
104 }
105
106 static int superio_inw(int ioreg, int reg)
107 {
108         int val;
109         outb(reg++, ioreg);
110         val = inb(ioreg + 1) << 8;
111         outb(reg, ioreg);
112         val |= inb(ioreg + 1);
113         return val;
114 }
115
116 static inline void superio_select(int ioreg, int ldn)
117 {
118         outb(DEV, ioreg);
119         outb(ldn, ioreg + 1);
120 }
121
122 static inline int superio_enter(int ioreg)
123 {
124         /*
125          * Try to reserve ioreg and ioreg + 1 for exclusive access.
126          */
127         if (!request_muxed_region(ioreg, 2, DRVNAME))
128                 return -EBUSY;
129
130         outb(0x87, ioreg);
131         outb(0x01, ioreg);
132         outb(0x55, ioreg);
133         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
134         return 0;
135 }
136
137 static inline void superio_exit(int ioreg)
138 {
139         outb(0x02, ioreg);
140         outb(0x02, ioreg + 1);
141         release_region(ioreg, 2);
142 }
143
144 /* Logical device 4 registers */
145 #define IT8712F_DEVID 0x8712
146 #define IT8705F_DEVID 0x8705
147 #define IT8716F_DEVID 0x8716
148 #define IT8718F_DEVID 0x8718
149 #define IT8720F_DEVID 0x8720
150 #define IT8721F_DEVID 0x8721
151 #define IT8726F_DEVID 0x8726
152 #define IT8728F_DEVID 0x8728
153 #define IT8771E_DEVID 0x8771
154 #define IT8772E_DEVID 0x8772
155 #define IT8781F_DEVID 0x8781
156 #define IT8782F_DEVID 0x8782
157 #define IT8783E_DEVID 0x8783
158 #define IT8786E_DEVID 0x8786
159 #define IT8603E_DEVID 0x8603
160 #define IT8620E_DEVID 0x8620
161 #define IT8623E_DEVID 0x8623
162 #define IT8790E_DEVID 0x8790
163 #define IT87_ACT_REG  0x30
164 #define IT87_BASE_REG 0x60
165
166 /* Logical device 7 registers (IT8712F and later) */
167 #define IT87_SIO_GPIO1_REG      0x25
168 #define IT87_SIO_GPIO2_REG      0x26
169 #define IT87_SIO_GPIO3_REG      0x27
170 #define IT87_SIO_GPIO4_REG      0x28
171 #define IT87_SIO_GPIO5_REG      0x29
172 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
173 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
174 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
175 #define IT87_SIO_VID_REG        0xfc    /* VID value */
176 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
177
178 /* Update battery voltage after every reading if true */
179 static bool update_vbat;
180
181 /* Not all BIOSes properly configure the PWM registers */
182 static bool fix_pwm_polarity;
183
184 /* Many IT87 constants specified below */
185
186 /* Length of ISA address segment */
187 #define IT87_EXTENT 8
188
189 /* Length of ISA address segment for Environmental Controller */
190 #define IT87_EC_EXTENT 2
191
192 /* Offset of EC registers from ISA base address */
193 #define IT87_EC_OFFSET 5
194
195 /* Where are the ISA address/data registers relative to the EC base address */
196 #define IT87_ADDR_REG_OFFSET 0
197 #define IT87_DATA_REG_OFFSET 1
198
199 /*----- The IT87 registers -----*/
200
201 #define IT87_REG_CONFIG        0x00
202
203 #define IT87_REG_ALARM1        0x01
204 #define IT87_REG_ALARM2        0x02
205 #define IT87_REG_ALARM3        0x03
206
207 /*
208  * The IT8718F and IT8720F have the VID value in a different register, in
209  * Super-I/O configuration space.
210  */
211 #define IT87_REG_VID           0x0a
212 /*
213  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
214  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
215  * mode.
216  */
217 #define IT87_REG_FAN_DIV       0x0b
218 #define IT87_REG_FAN_16BIT     0x0c
219
220 /* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */
221
222 static const u8 IT87_REG_FAN[]          = {0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c};
223 static const u8 IT87_REG_FAN_MIN[]      = {0x10, 0x11, 0x12, 0x84, 0x86, 0x4e};
224 static const u8 IT87_REG_FANX[]         = {0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d};
225 static const u8 IT87_REG_FANX_MIN[]     = {0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f};
226 static const u8 IT87_REG_TEMP_OFFSET[]  = {0x56, 0x57, 0x59};
227
228 #define IT87_REG_FAN_MAIN_CTRL 0x13
229 #define IT87_REG_FAN_CTL       0x14
230 static const u8 IT87_REG_PWM[]          = {0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf};
231 static const u8 IT87_REG_PWM_DUTY[]     = {0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab};
232
233 #define IT87_REG_VIN(nr)       (0x20 + (nr))
234 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
235
236 #define IT87_REG_AVCC3          0x2f
237
238 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
239 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
240 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
241 #define IT87_REG_TEMP_LOW(nr)  (0x41 + (nr) * 2)
242
243 #define IT87_REG_VIN_ENABLE    0x50
244 #define IT87_REG_TEMP_ENABLE   0x51
245 #define IT87_REG_TEMP_EXTRA    0x55
246 #define IT87_REG_BEEP_ENABLE   0x5c
247
248 #define IT87_REG_CHIPID        0x58
249
250 #define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i))
251 #define IT87_REG_AUTO_PWM(nr, i)  (0x65 + (nr) * 8 + (i))
252
253 struct it87_devices {
254         const char *name;
255         u16 features;
256         u8 peci_mask;
257         u8 old_peci_mask;
258         const char * const suffix;
259 };
260
261 #define FEAT_12MV_ADC           (1 << 0)
262 #define FEAT_NEWER_AUTOPWM      (1 << 1)
263 #define FEAT_OLD_AUTOPWM        (1 << 2)
264 #define FEAT_16BIT_FANS         (1 << 3)
265 #define FEAT_TEMP_OFFSET        (1 << 4)
266 #define FEAT_TEMP_PECI          (1 << 5)
267 #define FEAT_TEMP_OLD_PECI      (1 << 6)
268 #define FEAT_FAN16_CONFIG       (1 << 7)        /* Need to enable 16-bit fans */
269 #define FEAT_FIVE_FANS          (1 << 8)        /* Supports five fans */
270 #define FEAT_VID                (1 << 9)        /* Set if chip supports VID */
271 #define FEAT_IN7_INTERNAL       (1 << 10)       /* Set if in7 is internal */
272 #define FEAT_SIX_FANS           (1 << 11)       /* Supports six fans */
273 #define FEAT_AVCC3              (1 << 12)       /* Chip supports in9/AVCC3 */
274 #define FEAT_SIX_PWM            (1 << 13)       /* Chip supports 6 pwm chn */
275 #define FEAT_PWM_FREQ2          (1 << 14)       /* Separate pwm freq 2 */
276
277 static const struct it87_devices it87_devices[] = {
278         [it87] = {
279                 .name = "it87",
280                 .features = FEAT_OLD_AUTOPWM,   /* may need to overwrite */
281                 .suffix = "F",
282         },
283         [it8712] = {
284                 .name = "it8712",
285                 .features = FEAT_OLD_AUTOPWM | FEAT_VID,
286                                                 /* may need to overwrite */
287                 .suffix = "F",
288         },
289         [it8716] = {
290                 .name = "it8716",
291                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
292                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2,
293                 .suffix = "F",
294         },
295         [it8718] = {
296                 .name = "it8718",
297                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
298                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
299                   | FEAT_PWM_FREQ2,
300                 .old_peci_mask = 0x4,
301                 .suffix = "F",
302         },
303         [it8720] = {
304                 .name = "it8720",
305                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
306                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
307                   | FEAT_PWM_FREQ2,
308                 .old_peci_mask = 0x4,
309                 .suffix = "F",
310         },
311         [it8721] = {
312                 .name = "it8721",
313                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
314                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
315                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
316                   | FEAT_PWM_FREQ2,
317                 .peci_mask = 0x05,
318                 .old_peci_mask = 0x02,  /* Actually reports PCH */
319                 .suffix = "F",
320         },
321         [it8728] = {
322                 .name = "it8728",
323                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
324                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
325                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
326                 .peci_mask = 0x07,
327                 .suffix = "F",
328         },
329         [it8771] = {
330                 .name = "it8771",
331                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
332                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
333                   | FEAT_PWM_FREQ2,
334                                 /* PECI: guesswork */
335                                 /* 12mV ADC (OHM) */
336                                 /* 16 bit fans (OHM) */
337                                 /* three fans, always 16 bit (guesswork) */
338                 .peci_mask = 0x07,
339                 .suffix = "E",
340         },
341         [it8772] = {
342                 .name = "it8772",
343                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
344                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
345                   | FEAT_PWM_FREQ2,
346                                 /* PECI (coreboot) */
347                                 /* 12mV ADC (HWSensors4, OHM) */
348                                 /* 16 bit fans (HWSensors4, OHM) */
349                                 /* three fans, always 16 bit (datasheet) */
350                 .peci_mask = 0x07,
351                 .suffix = "E",
352         },
353         [it8781] = {
354                 .name = "it8781",
355                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
356                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
357                 .old_peci_mask = 0x4,
358                 .suffix = "F",
359         },
360         [it8782] = {
361                 .name = "it8782",
362                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
363                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
364                 .old_peci_mask = 0x4,
365                 .suffix = "F",
366         },
367         [it8783] = {
368                 .name = "it8783",
369                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
370                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
371                 .old_peci_mask = 0x4,
372                 .suffix = "E/F",
373         },
374         [it8786] = {
375                 .name = "it8786",
376                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
377                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
378                   | FEAT_PWM_FREQ2,
379                 .peci_mask = 0x07,
380                 .suffix = "E",
381         },
382         [it8790] = {
383                 .name = "it8790",
384                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
385                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
386                   | FEAT_PWM_FREQ2,
387                 .peci_mask = 0x07,
388                 .suffix = "E",
389         },
390         [it8603] = {
391                 .name = "it8603",
392                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
393                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
394                   | FEAT_AVCC3 | FEAT_PWM_FREQ2,
395                 .peci_mask = 0x07,
396                 .suffix = "E",
397         },
398         [it8620] = {
399                 .name = "it8620",
400                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
401                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
402                   | FEAT_IN7_INTERNAL | FEAT_AVCC3 | FEAT_SIX_PWM
403                   | FEAT_PWM_FREQ2,
404                 .peci_mask = 0x07,
405                 .suffix = "E",
406         },
407 };
408
409 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
410 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
411 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
412 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
413 #define has_temp_offset(data)   ((data)->features & FEAT_TEMP_OFFSET)
414 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
415                                  ((data)->peci_mask & (1 << nr)))
416 #define has_temp_old_peci(data, nr) \
417                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
418                                  ((data)->old_peci_mask & (1 << nr)))
419 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
420 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
421                                                      FEAT_SIX_FANS))
422 #define has_vid(data)           ((data)->features & FEAT_VID)
423 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
424 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
425 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
426 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
427 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
428
429 struct it87_sio_data {
430         enum chips type;
431         /* Values read from Super-I/O config space */
432         u8 revision;
433         u8 vid_value;
434         u8 beep_pin;
435         u8 internal;    /* Internal sensors can be labeled */
436         /* Features skipped based on config or DMI */
437         u16 skip_in;
438         u8 skip_vid;
439         u8 skip_fan;
440         u8 skip_pwm;
441         u8 skip_temp;
442 };
443
444 /*
445  * For each registered chip, we need to keep some data in memory.
446  * The structure is dynamically allocated.
447  */
448 struct it87_data {
449         struct device *hwmon_dev;
450         enum chips type;
451         u16 features;
452         u8 peci_mask;
453         u8 old_peci_mask;
454
455         unsigned short addr;
456         const char *name;
457         struct mutex update_lock;
458         char valid;             /* !=0 if following fields are valid */
459         unsigned long last_updated;     /* In jiffies */
460
461         u16 in_scaled;          /* Internal voltage sensors are scaled */
462         u8 in[10][3];           /* [nr][0]=in, [1]=min, [2]=max */
463         u8 has_fan;             /* Bitfield, fans enabled */
464         u16 fan[6][2];          /* Register values, [nr][0]=fan, [1]=min */
465         u8 has_temp;            /* Bitfield, temp sensors enabled */
466         s8 temp[3][4];          /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
467         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
468         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
469         u8 fan_div[3];          /* Register encoding, shifted right */
470         u8 vid;                 /* Register encoding, combined */
471         u8 vrm;
472         u32 alarms;             /* Register encoding, combined */
473         u8 beeps;               /* Register encoding */
474         u8 fan_main_ctrl;       /* Register value */
475         u8 fan_ctl;             /* Register value */
476
477         /*
478          * The following 3 arrays correspond to the same registers up to
479          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
480          * 7, and we want to preserve settings on mode changes, so we have
481          * to track all values separately.
482          * Starting with the IT8721F, the manual PWM duty cycles are stored
483          * in separate registers (8-bit values), so the separate tracking
484          * is no longer needed, but it is still done to keep the driver
485          * simple.
486          */
487         u8 pwm_ctrl[6];         /* Register value */
488         u8 pwm_duty[6];         /* Manual PWM value set by user */
489         u8 pwm_temp_map[6];     /* PWM to temp. chan. mapping (bits 1-0) */
490
491         /* Automatic fan speed control registers */
492         u8 auto_pwm[3][4];      /* [nr][3] is hard-coded */
493         s8 auto_temp[3][5];     /* [nr][0] is point1_temp_hyst */
494 };
495
496 static int adc_lsb(const struct it87_data *data, int nr)
497 {
498         int lsb = has_12mv_adc(data) ? 12 : 16;
499         if (data->in_scaled & (1 << nr))
500                 lsb <<= 1;
501         return lsb;
502 }
503
504 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
505 {
506         val = DIV_ROUND_CLOSEST(val, adc_lsb(data, nr));
507         return clamp_val(val, 0, 255);
508 }
509
510 static int in_from_reg(const struct it87_data *data, int nr, int val)
511 {
512         return val * adc_lsb(data, nr);
513 }
514
515 static inline u8 FAN_TO_REG(long rpm, int div)
516 {
517         if (rpm == 0)
518                 return 255;
519         rpm = clamp_val(rpm, 1, 1000000);
520         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
521 }
522
523 static inline u16 FAN16_TO_REG(long rpm)
524 {
525         if (rpm == 0)
526                 return 0xffff;
527         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
528 }
529
530 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
531                                 1350000 / ((val) * (div)))
532 /* The divider is fixed to 2 in 16-bit mode */
533 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
534                              1350000 / ((val) * 2))
535
536 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
537                                     ((val) + 500) / 1000), -128, 127))
538 #define TEMP_FROM_REG(val) ((val) * 1000)
539
540 static u8 pwm_to_reg(const struct it87_data *data, long val)
541 {
542         if (has_newer_autopwm(data))
543                 return val;
544         else
545                 return val >> 1;
546 }
547
548 static int pwm_from_reg(const struct it87_data *data, u8 reg)
549 {
550         if (has_newer_autopwm(data))
551                 return reg;
552         else
553                 return (reg & 0x7f) << 1;
554 }
555
556
557 static int DIV_TO_REG(int val)
558 {
559         int answer = 0;
560         while (answer < 7 && (val >>= 1))
561                 answer++;
562         return answer;
563 }
564 #define DIV_FROM_REG(val) (1 << (val))
565
566 /*
567  * pwm base frequencies. The frequency has to be divided by either 128 or 256,
568  * depending on the chip type, to calculate the actual pwm frequency.
569  *
570  * Some of the chip datasheets suggest a base frequency of 51kHz instead
571  * of 750kHz for the slowest base frequency, resulting in a pwm frequency
572  * of 200Hz. Sometimes both pwm frequency select registers are affected,
573  * sometimes just one. It is unknown if this is a datasheet error or real,
574  * so this is ignored for now.
575  */
576 static const unsigned int pwm_freq[8] = {
577         48000000,
578         24000000,
579         12000000,
580         8000000,
581         6000000,
582         3000000,
583         1500000,
584         750000,
585 };
586
587 /*
588  * Must be called with data->update_lock held, except during initialization.
589  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
590  * would slow down the IT87 access and should not be necessary.
591  */
592 static int it87_read_value(struct it87_data *data, u8 reg)
593 {
594         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
595         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
596 }
597
598 /*
599  * Must be called with data->update_lock held, except during initialization.
600  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
601  * would slow down the IT87 access and should not be necessary.
602  */
603 static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
604 {
605         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
606         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
607 }
608
609 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
610 {
611         data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
612         if (has_newer_autopwm(data)) {
613                 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
614                 data->pwm_duty[nr] = it87_read_value(data,
615                                                      IT87_REG_PWM_DUTY[nr]);
616         } else {
617                 if (data->pwm_ctrl[nr] & 0x80)  /* Automatic mode */
618                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
619                 else                            /* Manual mode */
620                         data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
621         }
622
623         if (has_old_autopwm(data)) {
624                 int i;
625
626                 for (i = 0; i < 5 ; i++)
627                         data->auto_temp[nr][i] = it87_read_value(data,
628                                                 IT87_REG_AUTO_TEMP(nr, i));
629                 for (i = 0; i < 3 ; i++)
630                         data->auto_pwm[nr][i] = it87_read_value(data,
631                                                 IT87_REG_AUTO_PWM(nr, i));
632         }
633 }
634
635 static struct it87_data *it87_update_device(struct device *dev)
636 {
637         struct it87_data *data = dev_get_drvdata(dev);
638         int i;
639
640         mutex_lock(&data->update_lock);
641
642         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
643             || !data->valid) {
644                 if (update_vbat) {
645                         /*
646                          * Cleared after each update, so reenable.  Value
647                          * returned by this read will be previous value
648                          */
649                         it87_write_value(data, IT87_REG_CONFIG,
650                                 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
651                 }
652                 for (i = 0; i <= 7; i++) {
653                         data->in[i][0] =
654                                 it87_read_value(data, IT87_REG_VIN(i));
655                         data->in[i][1] =
656                                 it87_read_value(data, IT87_REG_VIN_MIN(i));
657                         data->in[i][2] =
658                                 it87_read_value(data, IT87_REG_VIN_MAX(i));
659                 }
660                 /* in8 (battery) has no limit registers */
661                 data->in[8][0] = it87_read_value(data, IT87_REG_VIN(8));
662                 if (has_avcc3(data))
663                         data->in[9][0] = it87_read_value(data, IT87_REG_AVCC3);
664
665                 for (i = 0; i < 6; i++) {
666                         /* Skip disabled fans */
667                         if (!(data->has_fan & (1 << i)))
668                                 continue;
669
670                         data->fan[i][1] =
671                                 it87_read_value(data, IT87_REG_FAN_MIN[i]);
672                         data->fan[i][0] = it87_read_value(data,
673                                        IT87_REG_FAN[i]);
674                         /* Add high byte if in 16-bit mode */
675                         if (has_16bit_fans(data)) {
676                                 data->fan[i][0] |= it87_read_value(data,
677                                                 IT87_REG_FANX[i]) << 8;
678                                 data->fan[i][1] |= it87_read_value(data,
679                                                 IT87_REG_FANX_MIN[i]) << 8;
680                         }
681                 }
682                 for (i = 0; i < 3; i++) {
683                         if (!(data->has_temp & (1 << i)))
684                                 continue;
685                         data->temp[i][0] =
686                                 it87_read_value(data, IT87_REG_TEMP(i));
687                         data->temp[i][1] =
688                                 it87_read_value(data, IT87_REG_TEMP_LOW(i));
689                         data->temp[i][2] =
690                                 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
691                         if (has_temp_offset(data))
692                                 data->temp[i][3] =
693                                   it87_read_value(data,
694                                                   IT87_REG_TEMP_OFFSET[i]);
695                 }
696
697                 /* Newer chips don't have clock dividers */
698                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
699                         i = it87_read_value(data, IT87_REG_FAN_DIV);
700                         data->fan_div[0] = i & 0x07;
701                         data->fan_div[1] = (i >> 3) & 0x07;
702                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
703                 }
704
705                 data->alarms =
706                         it87_read_value(data, IT87_REG_ALARM1) |
707                         (it87_read_value(data, IT87_REG_ALARM2) << 8) |
708                         (it87_read_value(data, IT87_REG_ALARM3) << 16);
709                 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
710
711                 data->fan_main_ctrl = it87_read_value(data,
712                                 IT87_REG_FAN_MAIN_CTRL);
713                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
714                 for (i = 0; i < 3; i++)
715                         it87_update_pwm_ctrl(data, i);
716
717                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
718                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
719                 /*
720                  * The IT8705F does not have VID capability.
721                  * The IT8718F and later don't use IT87_REG_VID for the
722                  * same purpose.
723                  */
724                 if (data->type == it8712 || data->type == it8716) {
725                         data->vid = it87_read_value(data, IT87_REG_VID);
726                         /*
727                          * The older IT8712F revisions had only 5 VID pins,
728                          * but we assume it is always safe to read 6 bits.
729                          */
730                         data->vid &= 0x3f;
731                 }
732                 data->last_updated = jiffies;
733                 data->valid = 1;
734         }
735
736         mutex_unlock(&data->update_lock);
737
738         return data;
739 }
740
741 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
742                        char *buf)
743 {
744         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
745         int nr = sattr->nr;
746         int index = sattr->index;
747
748         struct it87_data *data = it87_update_device(dev);
749         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
750 }
751
752 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
753                       const char *buf, size_t count)
754 {
755         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
756         int nr = sattr->nr;
757         int index = sattr->index;
758
759         struct it87_data *data = dev_get_drvdata(dev);
760         unsigned long val;
761
762         if (kstrtoul(buf, 10, &val) < 0)
763                 return -EINVAL;
764
765         mutex_lock(&data->update_lock);
766         data->in[nr][index] = in_to_reg(data, nr, val);
767         it87_write_value(data,
768                          index == 1 ? IT87_REG_VIN_MIN(nr)
769                                     : IT87_REG_VIN_MAX(nr),
770                          data->in[nr][index]);
771         mutex_unlock(&data->update_lock);
772         return count;
773 }
774
775 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
776 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
777                             0, 1);
778 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
779                             0, 2);
780
781 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
782 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
783                             1, 1);
784 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
785                             1, 2);
786
787 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
788 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
789                             2, 1);
790 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
791                             2, 2);
792
793 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
794 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
795                             3, 1);
796 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
797                             3, 2);
798
799 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
800 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
801                             4, 1);
802 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
803                             4, 2);
804
805 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
806 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
807                             5, 1);
808 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
809                             5, 2);
810
811 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
812 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
813                             6, 1);
814 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
815                             6, 2);
816
817 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
818 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
819                             7, 1);
820 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
821                             7, 2);
822
823 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
824 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
825
826 /* 3 temperatures */
827 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
828                          char *buf)
829 {
830         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
831         int nr = sattr->nr;
832         int index = sattr->index;
833         struct it87_data *data = it87_update_device(dev);
834
835         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
836 }
837
838 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
839                         const char *buf, size_t count)
840 {
841         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
842         int nr = sattr->nr;
843         int index = sattr->index;
844         struct it87_data *data = dev_get_drvdata(dev);
845         long val;
846         u8 reg, regval;
847
848         if (kstrtol(buf, 10, &val) < 0)
849                 return -EINVAL;
850
851         mutex_lock(&data->update_lock);
852
853         switch (index) {
854         default:
855         case 1:
856                 reg = IT87_REG_TEMP_LOW(nr);
857                 break;
858         case 2:
859                 reg = IT87_REG_TEMP_HIGH(nr);
860                 break;
861         case 3:
862                 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
863                 if (!(regval & 0x80)) {
864                         regval |= 0x80;
865                         it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
866                 }
867                 data->valid = 0;
868                 reg = IT87_REG_TEMP_OFFSET[nr];
869                 break;
870         }
871
872         data->temp[nr][index] = TEMP_TO_REG(val);
873         it87_write_value(data, reg, data->temp[nr][index]);
874         mutex_unlock(&data->update_lock);
875         return count;
876 }
877
878 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
879 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
880                             0, 1);
881 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
882                             0, 2);
883 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
884                             set_temp, 0, 3);
885 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
886 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
887                             1, 1);
888 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
889                             1, 2);
890 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
891                             set_temp, 1, 3);
892 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
893 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
894                             2, 1);
895 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
896                             2, 2);
897 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
898                             set_temp, 2, 3);
899
900 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
901                               char *buf)
902 {
903         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
904         int nr = sensor_attr->index;
905         struct it87_data *data = it87_update_device(dev);
906         u8 reg = data->sensor;      /* In case value is updated while used */
907         u8 extra = data->extra;
908
909         if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1))
910             || (has_temp_old_peci(data, nr) && (extra & 0x80)))
911                 return sprintf(buf, "6\n");  /* Intel PECI */
912         if (reg & (1 << nr))
913                 return sprintf(buf, "3\n");  /* thermal diode */
914         if (reg & (8 << nr))
915                 return sprintf(buf, "4\n");  /* thermistor */
916         return sprintf(buf, "0\n");      /* disabled */
917 }
918
919 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
920                              const char *buf, size_t count)
921 {
922         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
923         int nr = sensor_attr->index;
924
925         struct it87_data *data = dev_get_drvdata(dev);
926         long val;
927         u8 reg, extra;
928
929         if (kstrtol(buf, 10, &val) < 0)
930                 return -EINVAL;
931
932         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
933         reg &= ~(1 << nr);
934         reg &= ~(8 << nr);
935         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
936                 reg &= 0x3f;
937         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
938         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
939                 extra &= 0x7f;
940         if (val == 2) { /* backwards compatibility */
941                 dev_warn(dev,
942                          "Sensor type 2 is deprecated, please use 4 instead\n");
943                 val = 4;
944         }
945         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
946         if (val == 3)
947                 reg |= 1 << nr;
948         else if (val == 4)
949                 reg |= 8 << nr;
950         else if (has_temp_peci(data, nr) && val == 6)
951                 reg |= (nr + 1) << 6;
952         else if (has_temp_old_peci(data, nr) && val == 6)
953                 extra |= 0x80;
954         else if (val != 0)
955                 return -EINVAL;
956
957         mutex_lock(&data->update_lock);
958         data->sensor = reg;
959         data->extra = extra;
960         it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
961         if (has_temp_old_peci(data, nr))
962                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
963         data->valid = 0;        /* Force cache refresh */
964         mutex_unlock(&data->update_lock);
965         return count;
966 }
967
968 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
969                           set_temp_type, 0);
970 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
971                           set_temp_type, 1);
972 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
973                           set_temp_type, 2);
974
975 /* 3 Fans */
976
977 static int pwm_mode(const struct it87_data *data, int nr)
978 {
979         int ctrl = data->fan_main_ctrl & (1 << nr);
980
981         if (ctrl == 0 && data->type != it8603)          /* Full speed */
982                 return 0;
983         if (data->pwm_ctrl[nr] & 0x80)                  /* Automatic mode */
984                 return 2;
985         else                                            /* Manual mode */
986                 return 1;
987 }
988
989 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
990                         char *buf)
991 {
992         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
993         int nr = sattr->nr;
994         int index = sattr->index;
995         int speed;
996         struct it87_data *data = it87_update_device(dev);
997
998         speed = has_16bit_fans(data) ?
999                 FAN16_FROM_REG(data->fan[nr][index]) :
1000                 FAN_FROM_REG(data->fan[nr][index],
1001                              DIV_FROM_REG(data->fan_div[nr]));
1002         return sprintf(buf, "%d\n", speed);
1003 }
1004
1005 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1006                 char *buf)
1007 {
1008         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1009         int nr = sensor_attr->index;
1010
1011         struct it87_data *data = it87_update_device(dev);
1012         return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
1013 }
1014 static ssize_t show_pwm_enable(struct device *dev,
1015                 struct device_attribute *attr, char *buf)
1016 {
1017         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1018         int nr = sensor_attr->index;
1019
1020         struct it87_data *data = it87_update_device(dev);
1021         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1022 }
1023 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1024                 char *buf)
1025 {
1026         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1027         int nr = sensor_attr->index;
1028
1029         struct it87_data *data = it87_update_device(dev);
1030         return sprintf(buf, "%d\n",
1031                        pwm_from_reg(data, data->pwm_duty[nr]));
1032 }
1033 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1034                 char *buf)
1035 {
1036         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1037         struct it87_data *data = it87_update_device(dev);
1038         int nr = sensor_attr->index;
1039         unsigned int freq;
1040         int index;
1041
1042         if (has_pwm_freq2(data) && nr == 1)
1043                 index = (data->extra >> 4) & 0x07;
1044         else
1045                 index = (data->fan_ctl >> 4) & 0x07;
1046
1047         freq = pwm_freq[index] / has_newer_autopwm(data) ? 256 : 128;
1048
1049         return sprintf(buf, "%u\n", freq);
1050 }
1051
1052 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1053                        const char *buf, size_t count)
1054 {
1055         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1056         int nr = sattr->nr;
1057         int index = sattr->index;
1058
1059         struct it87_data *data = dev_get_drvdata(dev);
1060         long val;
1061         u8 reg;
1062
1063         if (kstrtol(buf, 10, &val) < 0)
1064                 return -EINVAL;
1065
1066         mutex_lock(&data->update_lock);
1067
1068         if (has_16bit_fans(data)) {
1069                 data->fan[nr][index] = FAN16_TO_REG(val);
1070                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1071                                  data->fan[nr][index] & 0xff);
1072                 it87_write_value(data, IT87_REG_FANX_MIN[nr],
1073                                  data->fan[nr][index] >> 8);
1074         } else {
1075                 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1076                 switch (nr) {
1077                 case 0:
1078                         data->fan_div[nr] = reg & 0x07;
1079                         break;
1080                 case 1:
1081                         data->fan_div[nr] = (reg >> 3) & 0x07;
1082                         break;
1083                 case 2:
1084                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1085                         break;
1086                 }
1087                 data->fan[nr][index] =
1088                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1089                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1090                                  data->fan[nr][index]);
1091         }
1092
1093         mutex_unlock(&data->update_lock);
1094         return count;
1095 }
1096
1097 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1098                 const char *buf, size_t count)
1099 {
1100         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1101         int nr = sensor_attr->index;
1102
1103         struct it87_data *data = dev_get_drvdata(dev);
1104         unsigned long val;
1105         int min;
1106         u8 old;
1107
1108         if (kstrtoul(buf, 10, &val) < 0)
1109                 return -EINVAL;
1110
1111         mutex_lock(&data->update_lock);
1112         old = it87_read_value(data, IT87_REG_FAN_DIV);
1113
1114         /* Save fan min limit */
1115         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1116
1117         switch (nr) {
1118         case 0:
1119         case 1:
1120                 data->fan_div[nr] = DIV_TO_REG(val);
1121                 break;
1122         case 2:
1123                 if (val < 8)
1124                         data->fan_div[nr] = 1;
1125                 else
1126                         data->fan_div[nr] = 3;
1127         }
1128         val = old & 0x80;
1129         val |= (data->fan_div[0] & 0x07);
1130         val |= (data->fan_div[1] & 0x07) << 3;
1131         if (data->fan_div[2] == 3)
1132                 val |= 0x1 << 6;
1133         it87_write_value(data, IT87_REG_FAN_DIV, val);
1134
1135         /* Restore fan min limit */
1136         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1137         it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
1138
1139         mutex_unlock(&data->update_lock);
1140         return count;
1141 }
1142
1143 /* Returns 0 if OK, -EINVAL otherwise */
1144 static int check_trip_points(struct device *dev, int nr)
1145 {
1146         const struct it87_data *data = dev_get_drvdata(dev);
1147         int i, err = 0;
1148
1149         if (has_old_autopwm(data)) {
1150                 for (i = 0; i < 3; i++) {
1151                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1152                                 err = -EINVAL;
1153                 }
1154                 for (i = 0; i < 2; i++) {
1155                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1156                                 err = -EINVAL;
1157                 }
1158         }
1159
1160         if (err) {
1161                 dev_err(dev,
1162                         "Inconsistent trip points, not switching to automatic mode\n");
1163                 dev_err(dev, "Adjust the trip points and try again\n");
1164         }
1165         return err;
1166 }
1167
1168 static ssize_t set_pwm_enable(struct device *dev,
1169                 struct device_attribute *attr, const char *buf, size_t count)
1170 {
1171         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1172         int nr = sensor_attr->index;
1173
1174         struct it87_data *data = dev_get_drvdata(dev);
1175         long val;
1176
1177         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1178                 return -EINVAL;
1179
1180         /* Check trip points before switching to automatic mode */
1181         if (val == 2) {
1182                 if (check_trip_points(dev, nr) < 0)
1183                         return -EINVAL;
1184         }
1185
1186         /* IT8603E does not have on/off mode */
1187         if (val == 0 && data->type == it8603)
1188                 return -EINVAL;
1189
1190         mutex_lock(&data->update_lock);
1191
1192         if (val == 0) {
1193                 int tmp;
1194                 /* make sure the fan is on when in on/off mode */
1195                 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1196                 it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr));
1197                 /* set on/off mode */
1198                 data->fan_main_ctrl &= ~(1 << nr);
1199                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1200                                  data->fan_main_ctrl);
1201         } else {
1202                 if (val == 1)                           /* Manual mode */
1203                         data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
1204                                              data->pwm_temp_map[nr] :
1205                                              data->pwm_duty[nr];
1206                 else                                    /* Automatic mode */
1207                         data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1208                 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1209
1210                 if (data->type != it8603) {
1211                         /* set SmartGuardian mode */
1212                         data->fan_main_ctrl |= (1 << nr);
1213                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1214                                          data->fan_main_ctrl);
1215                 }
1216         }
1217
1218         mutex_unlock(&data->update_lock);
1219         return count;
1220 }
1221 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1222                 const char *buf, size_t count)
1223 {
1224         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1225         int nr = sensor_attr->index;
1226
1227         struct it87_data *data = dev_get_drvdata(dev);
1228         long val;
1229
1230         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1231                 return -EINVAL;
1232
1233         mutex_lock(&data->update_lock);
1234         if (has_newer_autopwm(data)) {
1235                 /*
1236                  * If we are in automatic mode, the PWM duty cycle register
1237                  * is read-only so we can't write the value.
1238                  */
1239                 if (data->pwm_ctrl[nr] & 0x80) {
1240                         mutex_unlock(&data->update_lock);
1241                         return -EBUSY;
1242                 }
1243                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1244                 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1245                                  data->pwm_duty[nr]);
1246         } else {
1247                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1248                 /*
1249                  * If we are in manual mode, write the duty cycle immediately;
1250                  * otherwise, just store it for later use.
1251                  */
1252                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1253                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1254                         it87_write_value(data, IT87_REG_PWM[nr],
1255                                          data->pwm_ctrl[nr]);
1256                 }
1257         }
1258         mutex_unlock(&data->update_lock);
1259         return count;
1260 }
1261 static ssize_t set_pwm_freq(struct device *dev,
1262                 struct device_attribute *attr, const char *buf, size_t count)
1263 {
1264         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1265         struct it87_data *data = dev_get_drvdata(dev);
1266         int nr = sensor_attr->index;
1267         unsigned long val;
1268         int i;
1269
1270         if (kstrtoul(buf, 10, &val) < 0)
1271                 return -EINVAL;
1272
1273         val = clamp_val(val, 0, 1000000);
1274         val *= has_newer_autopwm(data) ? 256 : 128;
1275
1276         /* Search for the nearest available frequency */
1277         for (i = 0; i < 7; i++) {
1278                 if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2)
1279                         break;
1280         }
1281
1282         mutex_lock(&data->update_lock);
1283         if (nr == 0) {
1284                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1285                 data->fan_ctl |= i << 4;
1286                 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1287         } else {
1288                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1289                 data->extra |= i << 4;
1290                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1291         }
1292         mutex_unlock(&data->update_lock);
1293
1294         return count;
1295 }
1296 static ssize_t show_pwm_temp_map(struct device *dev,
1297                 struct device_attribute *attr, char *buf)
1298 {
1299         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1300         int nr = sensor_attr->index;
1301
1302         struct it87_data *data = it87_update_device(dev);
1303         int map;
1304
1305         if (data->pwm_temp_map[nr] < 3)
1306                 map = 1 << data->pwm_temp_map[nr];
1307         else
1308                 map = 0;                        /* Should never happen */
1309         return sprintf(buf, "%d\n", map);
1310 }
1311 static ssize_t set_pwm_temp_map(struct device *dev,
1312                 struct device_attribute *attr, const char *buf, size_t count)
1313 {
1314         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1315         int nr = sensor_attr->index;
1316
1317         struct it87_data *data = dev_get_drvdata(dev);
1318         long val;
1319         u8 reg;
1320
1321         /*
1322          * This check can go away if we ever support automatic fan speed
1323          * control on newer chips.
1324          */
1325         if (!has_old_autopwm(data)) {
1326                 dev_notice(dev, "Mapping change disabled for safety reasons\n");
1327                 return -EINVAL;
1328         }
1329
1330         if (kstrtol(buf, 10, &val) < 0)
1331                 return -EINVAL;
1332
1333         switch (val) {
1334         case (1 << 0):
1335                 reg = 0x00;
1336                 break;
1337         case (1 << 1):
1338                 reg = 0x01;
1339                 break;
1340         case (1 << 2):
1341                 reg = 0x02;
1342                 break;
1343         default:
1344                 return -EINVAL;
1345         }
1346
1347         mutex_lock(&data->update_lock);
1348         data->pwm_temp_map[nr] = reg;
1349         /*
1350          * If we are in automatic mode, write the temp mapping immediately;
1351          * otherwise, just store it for later use.
1352          */
1353         if (data->pwm_ctrl[nr] & 0x80) {
1354                 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1355                 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1356         }
1357         mutex_unlock(&data->update_lock);
1358         return count;
1359 }
1360
1361 static ssize_t show_auto_pwm(struct device *dev,
1362                 struct device_attribute *attr, char *buf)
1363 {
1364         struct it87_data *data = it87_update_device(dev);
1365         struct sensor_device_attribute_2 *sensor_attr =
1366                         to_sensor_dev_attr_2(attr);
1367         int nr = sensor_attr->nr;
1368         int point = sensor_attr->index;
1369
1370         return sprintf(buf, "%d\n",
1371                        pwm_from_reg(data, data->auto_pwm[nr][point]));
1372 }
1373
1374 static ssize_t set_auto_pwm(struct device *dev,
1375                 struct device_attribute *attr, const char *buf, size_t count)
1376 {
1377         struct it87_data *data = dev_get_drvdata(dev);
1378         struct sensor_device_attribute_2 *sensor_attr =
1379                         to_sensor_dev_attr_2(attr);
1380         int nr = sensor_attr->nr;
1381         int point = sensor_attr->index;
1382         long val;
1383
1384         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1385                 return -EINVAL;
1386
1387         mutex_lock(&data->update_lock);
1388         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1389         it87_write_value(data, IT87_REG_AUTO_PWM(nr, point),
1390                          data->auto_pwm[nr][point]);
1391         mutex_unlock(&data->update_lock);
1392         return count;
1393 }
1394
1395 static ssize_t show_auto_temp(struct device *dev,
1396                 struct device_attribute *attr, char *buf)
1397 {
1398         struct it87_data *data = it87_update_device(dev);
1399         struct sensor_device_attribute_2 *sensor_attr =
1400                         to_sensor_dev_attr_2(attr);
1401         int nr = sensor_attr->nr;
1402         int point = sensor_attr->index;
1403
1404         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point]));
1405 }
1406
1407 static ssize_t set_auto_temp(struct device *dev,
1408                 struct device_attribute *attr, const char *buf, size_t count)
1409 {
1410         struct it87_data *data = dev_get_drvdata(dev);
1411         struct sensor_device_attribute_2 *sensor_attr =
1412                         to_sensor_dev_attr_2(attr);
1413         int nr = sensor_attr->nr;
1414         int point = sensor_attr->index;
1415         long val;
1416
1417         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1418                 return -EINVAL;
1419
1420         mutex_lock(&data->update_lock);
1421         data->auto_temp[nr][point] = TEMP_TO_REG(val);
1422         it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point),
1423                          data->auto_temp[nr][point]);
1424         mutex_unlock(&data->update_lock);
1425         return count;
1426 }
1427
1428 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1429 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1430                             0, 1);
1431 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1432                           set_fan_div, 0);
1433
1434 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1435 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1436                             1, 1);
1437 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1438                           set_fan_div, 1);
1439
1440 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1441 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1442                             2, 1);
1443 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1444                           set_fan_div, 2);
1445
1446 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1447 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1448                             3, 1);
1449
1450 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1451 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1452                             4, 1);
1453
1454 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1455 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1456                             5, 1);
1457
1458 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1459                           show_pwm_enable, set_pwm_enable, 0);
1460 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1461 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1462                           set_pwm_freq, 0);
1463 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO | S_IWUSR,
1464                           show_pwm_temp_map, set_pwm_temp_map, 0);
1465 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1466                             show_auto_pwm, set_auto_pwm, 0, 0);
1467 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1468                             show_auto_pwm, set_auto_pwm, 0, 1);
1469 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1470                             show_auto_pwm, set_auto_pwm, 0, 2);
1471 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1472                             show_auto_pwm, NULL, 0, 3);
1473 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1474                             show_auto_temp, set_auto_temp, 0, 1);
1475 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1476                             show_auto_temp, set_auto_temp, 0, 0);
1477 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1478                             show_auto_temp, set_auto_temp, 0, 2);
1479 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1480                             show_auto_temp, set_auto_temp, 0, 3);
1481 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1482                             show_auto_temp, set_auto_temp, 0, 4);
1483
1484 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1485                           show_pwm_enable, set_pwm_enable, 1);
1486 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1487 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1488 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO | S_IWUSR,
1489                           show_pwm_temp_map, set_pwm_temp_map, 1);
1490 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1491                             show_auto_pwm, set_auto_pwm, 1, 0);
1492 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1493                             show_auto_pwm, set_auto_pwm, 1, 1);
1494 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1495                             show_auto_pwm, set_auto_pwm, 1, 2);
1496 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1497                             show_auto_pwm, NULL, 1, 3);
1498 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1499                             show_auto_temp, set_auto_temp, 1, 1);
1500 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1501                             show_auto_temp, set_auto_temp, 1, 0);
1502 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1503                             show_auto_temp, set_auto_temp, 1, 2);
1504 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1505                             show_auto_temp, set_auto_temp, 1, 3);
1506 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1507                             show_auto_temp, set_auto_temp, 1, 4);
1508
1509 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1510                           show_pwm_enable, set_pwm_enable, 2);
1511 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1512 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1513 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO | S_IWUSR,
1514                           show_pwm_temp_map, set_pwm_temp_map, 2);
1515 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1516                             show_auto_pwm, set_auto_pwm, 2, 0);
1517 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1518                             show_auto_pwm, set_auto_pwm, 2, 1);
1519 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1520                             show_auto_pwm, set_auto_pwm, 2, 2);
1521 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1522                             show_auto_pwm, NULL, 2, 3);
1523 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1524                             show_auto_temp, set_auto_temp, 2, 1);
1525 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1526                             show_auto_temp, set_auto_temp, 2, 0);
1527 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1528                             show_auto_temp, set_auto_temp, 2, 2);
1529 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1530                             show_auto_temp, set_auto_temp, 2, 3);
1531 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1532                             show_auto_temp, set_auto_temp, 2, 4);
1533
1534 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1535                           show_pwm_enable, set_pwm_enable, 3);
1536 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1537 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1538 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO | S_IWUSR,
1539                           show_pwm_temp_map, set_pwm_temp_map, 3);
1540
1541 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1542                           show_pwm_enable, set_pwm_enable, 4);
1543 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1544 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1545 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO | S_IWUSR,
1546                           show_pwm_temp_map, set_pwm_temp_map, 4);
1547
1548 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1549                           show_pwm_enable, set_pwm_enable, 5);
1550 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1551 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1552 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO | S_IWUSR,
1553                           show_pwm_temp_map, set_pwm_temp_map, 5);
1554
1555 /* Alarms */
1556 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1557                 char *buf)
1558 {
1559         struct it87_data *data = it87_update_device(dev);
1560         return sprintf(buf, "%u\n", data->alarms);
1561 }
1562 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1563
1564 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1565                 char *buf)
1566 {
1567         int bitnr = to_sensor_dev_attr(attr)->index;
1568         struct it87_data *data = it87_update_device(dev);
1569         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1570 }
1571
1572 static ssize_t clear_intrusion(struct device *dev, struct device_attribute
1573                 *attr, const char *buf, size_t count)
1574 {
1575         struct it87_data *data = dev_get_drvdata(dev);
1576         long val;
1577         int config;
1578
1579         if (kstrtol(buf, 10, &val) < 0 || val != 0)
1580                 return -EINVAL;
1581
1582         mutex_lock(&data->update_lock);
1583         config = it87_read_value(data, IT87_REG_CONFIG);
1584         if (config < 0) {
1585                 count = config;
1586         } else {
1587                 config |= 1 << 5;
1588                 it87_write_value(data, IT87_REG_CONFIG, config);
1589                 /* Invalidate cache to force re-read */
1590                 data->valid = 0;
1591         }
1592         mutex_unlock(&data->update_lock);
1593
1594         return count;
1595 }
1596
1597 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1598 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1599 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1600 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1601 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1602 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1603 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1604 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1605 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1606 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1607 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1608 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1609 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1610 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1611 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1612 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1613 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1614 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1615                           show_alarm, clear_intrusion, 4);
1616
1617 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1618                 char *buf)
1619 {
1620         int bitnr = to_sensor_dev_attr(attr)->index;
1621         struct it87_data *data = it87_update_device(dev);
1622         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1623 }
1624 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1625                 const char *buf, size_t count)
1626 {
1627         int bitnr = to_sensor_dev_attr(attr)->index;
1628         struct it87_data *data = dev_get_drvdata(dev);
1629         long val;
1630
1631         if (kstrtol(buf, 10, &val) < 0
1632          || (val != 0 && val != 1))
1633                 return -EINVAL;
1634
1635         mutex_lock(&data->update_lock);
1636         data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1637         if (val)
1638                 data->beeps |= (1 << bitnr);
1639         else
1640                 data->beeps &= ~(1 << bitnr);
1641         it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1642         mutex_unlock(&data->update_lock);
1643         return count;
1644 }
1645
1646 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1647                           show_beep, set_beep, 1);
1648 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1649 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1650 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1651 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1652 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1653 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1654 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1655 /* fanX_beep writability is set later */
1656 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1657 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1658 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1659 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1660 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1661 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
1662 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1663                           show_beep, set_beep, 2);
1664 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1665 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1666
1667 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1668                 char *buf)
1669 {
1670         struct it87_data *data = dev_get_drvdata(dev);
1671         return sprintf(buf, "%u\n", data->vrm);
1672 }
1673 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1674                 const char *buf, size_t count)
1675 {
1676         struct it87_data *data = dev_get_drvdata(dev);
1677         unsigned long val;
1678
1679         if (kstrtoul(buf, 10, &val) < 0)
1680                 return -EINVAL;
1681
1682         data->vrm = val;
1683
1684         return count;
1685 }
1686 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1687
1688 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1689                 char *buf)
1690 {
1691         struct it87_data *data = it87_update_device(dev);
1692         return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
1693 }
1694 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
1695
1696 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1697                 char *buf)
1698 {
1699         static const char * const labels[] = {
1700                 "+5V",
1701                 "5VSB",
1702                 "Vbat",
1703         };
1704         static const char * const labels_it8721[] = {
1705                 "+3.3V",
1706                 "3VSB",
1707                 "Vbat",
1708         };
1709         struct it87_data *data = dev_get_drvdata(dev);
1710         int nr = to_sensor_dev_attr(attr)->index;
1711
1712         return sprintf(buf, "%s\n", has_12mv_adc(data) ? labels_it8721[nr]
1713                                                        : labels[nr]);
1714 }
1715 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1716 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1717 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1718 /* AVCC3 */
1719 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 0);
1720
1721 static ssize_t show_name(struct device *dev, struct device_attribute
1722                          *devattr, char *buf)
1723 {
1724         struct it87_data *data = dev_get_drvdata(dev);
1725         return sprintf(buf, "%s\n", data->name);
1726 }
1727 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1728
1729 static struct attribute *it87_attributes_in[10][5] = {
1730 {
1731         &sensor_dev_attr_in0_input.dev_attr.attr,
1732         &sensor_dev_attr_in0_min.dev_attr.attr,
1733         &sensor_dev_attr_in0_max.dev_attr.attr,
1734         &sensor_dev_attr_in0_alarm.dev_attr.attr,
1735         NULL
1736 }, {
1737         &sensor_dev_attr_in1_input.dev_attr.attr,
1738         &sensor_dev_attr_in1_min.dev_attr.attr,
1739         &sensor_dev_attr_in1_max.dev_attr.attr,
1740         &sensor_dev_attr_in1_alarm.dev_attr.attr,
1741         NULL
1742 }, {
1743         &sensor_dev_attr_in2_input.dev_attr.attr,
1744         &sensor_dev_attr_in2_min.dev_attr.attr,
1745         &sensor_dev_attr_in2_max.dev_attr.attr,
1746         &sensor_dev_attr_in2_alarm.dev_attr.attr,
1747         NULL
1748 }, {
1749         &sensor_dev_attr_in3_input.dev_attr.attr,
1750         &sensor_dev_attr_in3_min.dev_attr.attr,
1751         &sensor_dev_attr_in3_max.dev_attr.attr,
1752         &sensor_dev_attr_in3_alarm.dev_attr.attr,
1753         NULL
1754 }, {
1755         &sensor_dev_attr_in4_input.dev_attr.attr,
1756         &sensor_dev_attr_in4_min.dev_attr.attr,
1757         &sensor_dev_attr_in4_max.dev_attr.attr,
1758         &sensor_dev_attr_in4_alarm.dev_attr.attr,
1759         NULL
1760 }, {
1761         &sensor_dev_attr_in5_input.dev_attr.attr,
1762         &sensor_dev_attr_in5_min.dev_attr.attr,
1763         &sensor_dev_attr_in5_max.dev_attr.attr,
1764         &sensor_dev_attr_in5_alarm.dev_attr.attr,
1765         NULL
1766 }, {
1767         &sensor_dev_attr_in6_input.dev_attr.attr,
1768         &sensor_dev_attr_in6_min.dev_attr.attr,
1769         &sensor_dev_attr_in6_max.dev_attr.attr,
1770         &sensor_dev_attr_in6_alarm.dev_attr.attr,
1771         NULL
1772 }, {
1773         &sensor_dev_attr_in7_input.dev_attr.attr,
1774         &sensor_dev_attr_in7_min.dev_attr.attr,
1775         &sensor_dev_attr_in7_max.dev_attr.attr,
1776         &sensor_dev_attr_in7_alarm.dev_attr.attr,
1777         NULL
1778 }, {
1779         &sensor_dev_attr_in8_input.dev_attr.attr,
1780         NULL
1781 }, {
1782         &sensor_dev_attr_in9_input.dev_attr.attr,
1783         NULL
1784 } };
1785
1786 static const struct attribute_group it87_group_in[10] = {
1787         { .attrs = it87_attributes_in[0] },
1788         { .attrs = it87_attributes_in[1] },
1789         { .attrs = it87_attributes_in[2] },
1790         { .attrs = it87_attributes_in[3] },
1791         { .attrs = it87_attributes_in[4] },
1792         { .attrs = it87_attributes_in[5] },
1793         { .attrs = it87_attributes_in[6] },
1794         { .attrs = it87_attributes_in[7] },
1795         { .attrs = it87_attributes_in[8] },
1796         { .attrs = it87_attributes_in[9] },
1797 };
1798
1799 static struct attribute *it87_attributes_temp[3][6] = {
1800 {
1801         &sensor_dev_attr_temp1_input.dev_attr.attr,
1802         &sensor_dev_attr_temp1_max.dev_attr.attr,
1803         &sensor_dev_attr_temp1_min.dev_attr.attr,
1804         &sensor_dev_attr_temp1_type.dev_attr.attr,
1805         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
1806         NULL
1807 } , {
1808         &sensor_dev_attr_temp2_input.dev_attr.attr,
1809         &sensor_dev_attr_temp2_max.dev_attr.attr,
1810         &sensor_dev_attr_temp2_min.dev_attr.attr,
1811         &sensor_dev_attr_temp2_type.dev_attr.attr,
1812         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
1813         NULL
1814 } , {
1815         &sensor_dev_attr_temp3_input.dev_attr.attr,
1816         &sensor_dev_attr_temp3_max.dev_attr.attr,
1817         &sensor_dev_attr_temp3_min.dev_attr.attr,
1818         &sensor_dev_attr_temp3_type.dev_attr.attr,
1819         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1820         NULL
1821 } };
1822
1823 static const struct attribute_group it87_group_temp[3] = {
1824         { .attrs = it87_attributes_temp[0] },
1825         { .attrs = it87_attributes_temp[1] },
1826         { .attrs = it87_attributes_temp[2] },
1827 };
1828
1829 static struct attribute *it87_attributes_temp_offset[] = {
1830         &sensor_dev_attr_temp1_offset.dev_attr.attr,
1831         &sensor_dev_attr_temp2_offset.dev_attr.attr,
1832         &sensor_dev_attr_temp3_offset.dev_attr.attr,
1833 };
1834
1835 static struct attribute *it87_attributes[] = {
1836         &dev_attr_alarms.attr,
1837         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
1838         &dev_attr_name.attr,
1839         NULL
1840 };
1841
1842 static const struct attribute_group it87_group = {
1843         .attrs = it87_attributes,
1844 };
1845
1846 static struct attribute *it87_attributes_in_beep[] = {
1847         &sensor_dev_attr_in0_beep.dev_attr.attr,
1848         &sensor_dev_attr_in1_beep.dev_attr.attr,
1849         &sensor_dev_attr_in2_beep.dev_attr.attr,
1850         &sensor_dev_attr_in3_beep.dev_attr.attr,
1851         &sensor_dev_attr_in4_beep.dev_attr.attr,
1852         &sensor_dev_attr_in5_beep.dev_attr.attr,
1853         &sensor_dev_attr_in6_beep.dev_attr.attr,
1854         &sensor_dev_attr_in7_beep.dev_attr.attr,
1855         NULL,
1856         NULL,
1857 };
1858
1859 static struct attribute *it87_attributes_temp_beep[] = {
1860         &sensor_dev_attr_temp1_beep.dev_attr.attr,
1861         &sensor_dev_attr_temp2_beep.dev_attr.attr,
1862         &sensor_dev_attr_temp3_beep.dev_attr.attr,
1863 };
1864
1865 static struct attribute *it87_attributes_fan[6][3+1] = { {
1866         &sensor_dev_attr_fan1_input.dev_attr.attr,
1867         &sensor_dev_attr_fan1_min.dev_attr.attr,
1868         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1869         NULL
1870 }, {
1871         &sensor_dev_attr_fan2_input.dev_attr.attr,
1872         &sensor_dev_attr_fan2_min.dev_attr.attr,
1873         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1874         NULL
1875 }, {
1876         &sensor_dev_attr_fan3_input.dev_attr.attr,
1877         &sensor_dev_attr_fan3_min.dev_attr.attr,
1878         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1879         NULL
1880 }, {
1881         &sensor_dev_attr_fan4_input.dev_attr.attr,
1882         &sensor_dev_attr_fan4_min.dev_attr.attr,
1883         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
1884         NULL
1885 }, {
1886         &sensor_dev_attr_fan5_input.dev_attr.attr,
1887         &sensor_dev_attr_fan5_min.dev_attr.attr,
1888         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
1889         NULL
1890 }, {
1891         &sensor_dev_attr_fan6_input.dev_attr.attr,
1892         &sensor_dev_attr_fan6_min.dev_attr.attr,
1893         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
1894         NULL
1895 } };
1896
1897 static const struct attribute_group it87_group_fan[6] = {
1898         { .attrs = it87_attributes_fan[0] },
1899         { .attrs = it87_attributes_fan[1] },
1900         { .attrs = it87_attributes_fan[2] },
1901         { .attrs = it87_attributes_fan[3] },
1902         { .attrs = it87_attributes_fan[4] },
1903         { .attrs = it87_attributes_fan[5] },
1904 };
1905
1906 static const struct attribute *it87_attributes_fan_div[] = {
1907         &sensor_dev_attr_fan1_div.dev_attr.attr,
1908         &sensor_dev_attr_fan2_div.dev_attr.attr,
1909         &sensor_dev_attr_fan3_div.dev_attr.attr,
1910 };
1911
1912 static struct attribute *it87_attributes_pwm[6][4+1] = { {
1913         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1914         &sensor_dev_attr_pwm1.dev_attr.attr,
1915         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1916         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
1917         NULL
1918 }, {
1919         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1920         &sensor_dev_attr_pwm2.dev_attr.attr,
1921         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1922         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
1923         NULL
1924 }, {
1925         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1926         &sensor_dev_attr_pwm3.dev_attr.attr,
1927         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
1928         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
1929         NULL
1930 }, {
1931         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
1932         &sensor_dev_attr_pwm4.dev_attr.attr,
1933         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
1934         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
1935         NULL
1936 }, {
1937         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
1938         &sensor_dev_attr_pwm5.dev_attr.attr,
1939         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
1940         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
1941         NULL
1942 }, {
1943         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
1944         &sensor_dev_attr_pwm6.dev_attr.attr,
1945         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
1946         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
1947         NULL
1948 } };
1949
1950 static umode_t pwm_attribute_mode(struct kobject *kobj, struct attribute *attr,
1951                                   int index)
1952 {
1953         struct device *dev = container_of(kobj, struct device, kobj);
1954         struct it87_data *data = dev_get_drvdata(dev);
1955
1956         if (has_pwm_freq2(data) && index == 2)
1957                 return attr->mode | S_IWUSR;
1958
1959         return attr->mode;
1960 }
1961
1962 static const struct attribute_group it87_group_pwm[6] = {
1963         { .attrs = it87_attributes_pwm[0] },
1964         { .attrs = it87_attributes_pwm[1],
1965           .is_visible = pwm_attribute_mode, },
1966         { .attrs = it87_attributes_pwm[2] },
1967         { .attrs = it87_attributes_pwm[3] },
1968         { .attrs = it87_attributes_pwm[4] },
1969         { .attrs = it87_attributes_pwm[5] },
1970 };
1971
1972 static struct attribute *it87_attributes_autopwm[3][9+1] = { {
1973         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
1974         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
1975         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
1976         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
1977         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
1978         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
1979         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
1980         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
1981         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
1982         NULL
1983 }, {
1984         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
1985         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
1986         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
1987         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
1988         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
1989         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
1990         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
1991         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
1992         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
1993         NULL
1994 }, {
1995         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
1996         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
1997         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
1998         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
1999         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2000         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2001         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2002         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2003         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2004         NULL
2005 } };
2006
2007 static const struct attribute_group it87_group_autopwm[3] = {
2008         { .attrs = it87_attributes_autopwm[0] },
2009         { .attrs = it87_attributes_autopwm[1] },
2010         { .attrs = it87_attributes_autopwm[2] },
2011 };
2012
2013 static struct attribute *it87_attributes_fan_beep[] = {
2014         &sensor_dev_attr_fan1_beep.dev_attr.attr,
2015         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2016         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2017         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2018         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2019         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2020 };
2021
2022 static struct attribute *it87_attributes_vid[] = {
2023         &dev_attr_vrm.attr,
2024         &dev_attr_cpu0_vid.attr,
2025         NULL
2026 };
2027
2028 static const struct attribute_group it87_group_vid = {
2029         .attrs = it87_attributes_vid,
2030 };
2031
2032 static struct attribute *it87_attributes_label[] = {
2033         &sensor_dev_attr_in3_label.dev_attr.attr,
2034         &sensor_dev_attr_in7_label.dev_attr.attr,
2035         &sensor_dev_attr_in8_label.dev_attr.attr,
2036         &sensor_dev_attr_in9_label.dev_attr.attr,
2037         NULL
2038 };
2039
2040 static const struct attribute_group it87_group_label = {
2041         .attrs = it87_attributes_label,
2042 };
2043
2044 /* SuperIO detection - will change isa_address if a chip is found */
2045 static int __init it87_find(int sioaddr, unsigned short *address,
2046                             struct it87_sio_data *sio_data)
2047 {
2048         int err;
2049         u16 chip_type;
2050         const char *board_vendor, *board_name;
2051
2052         err = superio_enter(sioaddr);
2053         if (err)
2054                 return err;
2055
2056         err = -ENODEV;
2057         chip_type = force_id ? force_id : superio_inw(sioaddr, DEVID);
2058
2059         switch (chip_type) {
2060         case IT8705F_DEVID:
2061                 sio_data->type = it87;
2062                 break;
2063         case IT8712F_DEVID:
2064                 sio_data->type = it8712;
2065                 break;
2066         case IT8716F_DEVID:
2067         case IT8726F_DEVID:
2068                 sio_data->type = it8716;
2069                 break;
2070         case IT8718F_DEVID:
2071                 sio_data->type = it8718;
2072                 break;
2073         case IT8720F_DEVID:
2074                 sio_data->type = it8720;
2075                 break;
2076         case IT8721F_DEVID:
2077                 sio_data->type = it8721;
2078                 break;
2079         case IT8728F_DEVID:
2080                 sio_data->type = it8728;
2081                 break;
2082         case IT8771E_DEVID:
2083                 sio_data->type = it8771;
2084                 break;
2085         case IT8772E_DEVID:
2086                 sio_data->type = it8772;
2087                 break;
2088         case IT8781F_DEVID:
2089                 sio_data->type = it8781;
2090                 break;
2091         case IT8782F_DEVID:
2092                 sio_data->type = it8782;
2093                 break;
2094         case IT8783E_DEVID:
2095                 sio_data->type = it8783;
2096                 break;
2097         case IT8786E_DEVID:
2098                 sio_data->type = it8786;
2099                 break;
2100         case IT8790E_DEVID:
2101                 sio_data->type = it8790;
2102                 break;
2103         case IT8603E_DEVID:
2104         case IT8623E_DEVID:
2105                 sio_data->type = it8603;
2106                 break;
2107         case IT8620E_DEVID:
2108                 sio_data->type = it8620;
2109                 break;
2110         case 0xffff:    /* No device at all */
2111                 goto exit;
2112         default:
2113                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2114                 goto exit;
2115         }
2116
2117         superio_select(sioaddr, PME);
2118         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2119                 pr_info("Device not activated, skipping\n");
2120                 goto exit;
2121         }
2122
2123         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2124         if (*address == 0) {
2125                 pr_info("Base address not set, skipping\n");
2126                 goto exit;
2127         }
2128
2129         err = 0;
2130         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2131         pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2132                 it87_devices[sio_data->type].suffix,
2133                 *address, sio_data->revision);
2134
2135         /* in8 (Vbat) is always internal */
2136         sio_data->internal = (1 << 2);
2137
2138         /* in7 (VSB or VCCH5V) is always internal on some chips */
2139         if (it87_devices[sio_data->type].features & FEAT_IN7_INTERNAL)
2140                 sio_data->internal |= (1 << 1);
2141
2142         /* in9 (AVCC3), always internal if supported */
2143         if (it87_devices[sio_data->type].features & FEAT_AVCC3)
2144                 sio_data->internal |= (1 << 3); /* in9 is AVCC */
2145         else
2146                 sio_data->skip_in |= (1 << 9);
2147
2148         if (!(it87_devices[sio_data->type].features & FEAT_SIX_PWM))
2149                 sio_data->skip_pwm |= (1 << 3) | (1 << 4) | (1 << 5);
2150
2151         if (!(it87_devices[sio_data->type].features & FEAT_VID))
2152                 sio_data->skip_vid = 1;
2153
2154         /* Read GPIO config and VID value from LDN 7 (GPIO) */
2155         if (sio_data->type == it87) {
2156                 /* The IT8705F has a different LD number for GPIO */
2157                 superio_select(sioaddr, 5);
2158                 sio_data->beep_pin = superio_inb(sioaddr,
2159                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2160         } else if (sio_data->type == it8783) {
2161                 int reg25, reg27, reg2a, reg2c, regef;
2162
2163                 superio_select(sioaddr, GPIO);
2164
2165                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2166                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2167                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2168                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2169                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2170
2171                 /* Check if fan3 is there or not */
2172                 if ((reg27 & (1 << 0)) || !(reg2c & (1 << 2)))
2173                         sio_data->skip_fan |= (1 << 2);
2174                 if ((reg25 & (1 << 4))
2175                     || (!(reg2a & (1 << 1)) && (regef & (1 << 0))))
2176                         sio_data->skip_pwm |= (1 << 2);
2177
2178                 /* Check if fan2 is there or not */
2179                 if (reg27 & (1 << 7))
2180                         sio_data->skip_fan |= (1 << 1);
2181                 if (reg27 & (1 << 3))
2182                         sio_data->skip_pwm |= (1 << 1);
2183
2184                 /* VIN5 */
2185                 if ((reg27 & (1 << 0)) || (reg2c & (1 << 2)))
2186                         sio_data->skip_in |= (1 << 5); /* No VIN5 */
2187
2188                 /* VIN6 */
2189                 if (reg27 & (1 << 1))
2190                         sio_data->skip_in |= (1 << 6); /* No VIN6 */
2191
2192                 /*
2193                  * VIN7
2194                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2195                  */
2196                 if (reg27 & (1 << 2)) {
2197                         /*
2198                          * The data sheet is a bit unclear regarding the
2199                          * internal voltage divider for VCCH5V. It says
2200                          * "This bit enables and switches VIN7 (pin 91) to the
2201                          * internal voltage divider for VCCH5V".
2202                          * This is different to other chips, where the internal
2203                          * voltage divider would connect VIN7 to an internal
2204                          * voltage source. Maybe that is the case here as well.
2205                          *
2206                          * Since we don't know for sure, re-route it if that is
2207                          * not the case, and ask the user to report if the
2208                          * resulting voltage is sane.
2209                          */
2210                         if (!(reg2c & (1 << 1))) {
2211                                 reg2c |= (1 << 1);
2212                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg2c);
2213                                 pr_notice("Routing internal VCCH5V to in7.\n");
2214                         }
2215                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2216                         pr_notice("Please report if it displays a reasonable voltage.\n");
2217                 }
2218
2219                 if (reg2c & (1 << 0))
2220                         sio_data->internal |= (1 << 0);
2221                 if (reg2c & (1 << 1))
2222                         sio_data->internal |= (1 << 1);
2223
2224                 sio_data->beep_pin = superio_inb(sioaddr,
2225                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2226         } else if (sio_data->type == it8603) {
2227                 int reg27, reg29;
2228
2229                 superio_select(sioaddr, GPIO);
2230
2231                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2232
2233                 /* Check if fan3 is there or not */
2234                 if (reg27 & (1 << 6))
2235                         sio_data->skip_pwm |= (1 << 2);
2236                 if (reg27 & (1 << 7))
2237                         sio_data->skip_fan |= (1 << 2);
2238
2239                 /* Check if fan2 is there or not */
2240                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2241                 if (reg29 & (1 << 1))
2242                         sio_data->skip_pwm |= (1 << 1);
2243                 if (reg29 & (1 << 2))
2244                         sio_data->skip_fan |= (1 << 1);
2245
2246                 sio_data->skip_in |= (1 << 5); /* No VIN5 */
2247                 sio_data->skip_in |= (1 << 6); /* No VIN6 */
2248
2249                 sio_data->beep_pin = superio_inb(sioaddr,
2250                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2251         } else if (sio_data->type == it8620) {
2252                 int reg;
2253
2254                 superio_select(sioaddr, GPIO);
2255
2256                 /* Check for pwm5 */
2257                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2258                 if (reg & (1 << 6))
2259                         sio_data->skip_pwm |= (1 << 4);
2260
2261                 /* Check for fan4, fan5 */
2262                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2263                 if (!(reg & (1 << 5)))
2264                         sio_data->skip_fan |= (1 << 3);
2265                 if (!(reg & (1 << 4)))
2266                         sio_data->skip_fan |= (1 << 4);
2267
2268                 /* Check for pwm3, fan3 */
2269                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2270                 if (reg & (1 << 6))
2271                         sio_data->skip_pwm |= (1 << 2);
2272                 if (reg & (1 << 7))
2273                         sio_data->skip_fan |= (1 << 2);
2274
2275                 /* Check for pwm4 */
2276                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2277                 if (!(reg & (1 << 4)))
2278                         sio_data->skip_pwm |= (1 << 3);
2279
2280                 /* Check for pwm2, fan2 */
2281                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2282                 if (reg & (1 << 1))
2283                         sio_data->skip_pwm |= (1 << 1);
2284                 if (reg & (1 << 2))
2285                         sio_data->skip_fan |= (1 << 1);
2286                 /* Check for pwm6, fan6 */
2287                 if (!(reg & (1 << 7))) {
2288                         sio_data->skip_pwm |= (1 << 5);
2289                         sio_data->skip_fan |= (1 << 5);
2290                 }
2291
2292                 sio_data->beep_pin = superio_inb(sioaddr,
2293                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2294         } else {
2295                 int reg;
2296                 bool uart6;
2297
2298                 superio_select(sioaddr, GPIO);
2299
2300                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2301                 if (!sio_data->skip_vid) {
2302                         /* We need at least 4 VID pins */
2303                         if (reg & 0x0f) {
2304                                 pr_info("VID is disabled (pins used for GPIO)\n");
2305                                 sio_data->skip_vid = 1;
2306                         }
2307                 }
2308
2309                 /* Check if fan3 is there or not */
2310                 if (reg & (1 << 6))
2311                         sio_data->skip_pwm |= (1 << 2);
2312                 if (reg & (1 << 7))
2313                         sio_data->skip_fan |= (1 << 2);
2314
2315                 /* Check if fan2 is there or not */
2316                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2317                 if (reg & (1 << 1))
2318                         sio_data->skip_pwm |= (1 << 1);
2319                 if (reg & (1 << 2))
2320                         sio_data->skip_fan |= (1 << 1);
2321
2322                 if ((sio_data->type == it8718 || sio_data->type == it8720)
2323                  && !(sio_data->skip_vid))
2324                         sio_data->vid_value = superio_inb(sioaddr,
2325                                                           IT87_SIO_VID_REG);
2326
2327                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2328
2329                 uart6 = sio_data->type == it8782 && (reg & (1 << 2));
2330
2331                 /*
2332                  * The IT8720F has no VIN7 pin, so VCCH should always be
2333                  * routed internally to VIN7 with an internal divider.
2334                  * Curiously, there still is a configuration bit to control
2335                  * this, which means it can be set incorrectly. And even
2336                  * more curiously, many boards out there are improperly
2337                  * configured, even though the IT8720F datasheet claims
2338                  * that the internal routing of VCCH to VIN7 is the default
2339                  * setting. So we force the internal routing in this case.
2340                  *
2341                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
2342                  * If UART6 is enabled, re-route VIN7 to the internal divider
2343                  * if that is not already the case.
2344                  */
2345                 if ((sio_data->type == it8720 || uart6) && !(reg & (1 << 1))) {
2346                         reg |= (1 << 1);
2347                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
2348                         pr_notice("Routing internal VCCH to in7\n");
2349                 }
2350                 if (reg & (1 << 0))
2351                         sio_data->internal |= (1 << 0);
2352                 if (reg & (1 << 1))
2353                         sio_data->internal |= (1 << 1);
2354
2355                 /*
2356                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
2357                  * While VIN7 can be routed to the internal voltage divider,
2358                  * VIN5 and VIN6 are not available if UART6 is enabled.
2359                  *
2360                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
2361                  * is the temperature source. Since we can not read the
2362                  * temperature source here, skip_temp is preliminary.
2363                  */
2364                 if (uart6) {
2365                         sio_data->skip_in |= (1 << 5) | (1 << 6);
2366                         sio_data->skip_temp |= (1 << 2);
2367                 }
2368
2369                 sio_data->beep_pin = superio_inb(sioaddr,
2370                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2371         }
2372         if (sio_data->beep_pin)
2373                 pr_info("Beeping is supported\n");
2374
2375         /* Disable specific features based on DMI strings */
2376         board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
2377         board_name = dmi_get_system_info(DMI_BOARD_NAME);
2378         if (board_vendor && board_name) {
2379                 if (strcmp(board_vendor, "nVIDIA") == 0
2380                  && strcmp(board_name, "FN68PT") == 0) {
2381                         /*
2382                          * On the Shuttle SN68PT, FAN_CTL2 is apparently not
2383                          * connected to a fan, but to something else. One user
2384                          * has reported instant system power-off when changing
2385                          * the PWM2 duty cycle, so we disable it.
2386                          * I use the board name string as the trigger in case
2387                          * the same board is ever used in other systems.
2388                          */
2389                         pr_info("Disabling pwm2 due to hardware constraints\n");
2390                         sio_data->skip_pwm = (1 << 1);
2391                 }
2392         }
2393
2394 exit:
2395         superio_exit(sioaddr);
2396         return err;
2397 }
2398
2399 static void it87_remove_files(struct device *dev)
2400 {
2401         struct it87_data *data = dev_get_drvdata(dev);
2402         struct it87_sio_data *sio_data = dev_get_platdata(dev);
2403         int i;
2404
2405         sysfs_remove_group(&dev->kobj, &it87_group);
2406         for (i = 0; i < 10; i++) {
2407                 if (sio_data->skip_in & (1 << i))
2408                         continue;
2409                 sysfs_remove_group(&dev->kobj, &it87_group_in[i]);
2410                 if (it87_attributes_in_beep[i])
2411                         sysfs_remove_file(&dev->kobj,
2412                                           it87_attributes_in_beep[i]);
2413         }
2414         for (i = 0; i < 3; i++) {
2415                 if (!(data->has_temp & (1 << i)))
2416                         continue;
2417                 sysfs_remove_group(&dev->kobj, &it87_group_temp[i]);
2418                 if (has_temp_offset(data))
2419                         sysfs_remove_file(&dev->kobj,
2420                                           it87_attributes_temp_offset[i]);
2421                 if (sio_data->beep_pin)
2422                         sysfs_remove_file(&dev->kobj,
2423                                           it87_attributes_temp_beep[i]);
2424         }
2425         for (i = 0; i < 6; i++) {
2426                 if (!(data->has_fan & (1 << i)))
2427                         continue;
2428                 sysfs_remove_group(&dev->kobj, &it87_group_fan[i]);
2429                 if (sio_data->beep_pin)
2430                         sysfs_remove_file(&dev->kobj,
2431                                           it87_attributes_fan_beep[i]);
2432                 if (i < 3 && !has_16bit_fans(data))
2433                         sysfs_remove_file(&dev->kobj,
2434                                           it87_attributes_fan_div[i]);
2435         }
2436         for (i = 0; i < 6; i++) {
2437                 if (sio_data->skip_pwm & (1 << i))
2438                         continue;
2439                 sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]);
2440                 if (has_old_autopwm(data))
2441                         sysfs_remove_group(&dev->kobj,
2442                                            &it87_group_autopwm[i]);
2443         }
2444         if (!sio_data->skip_vid)
2445                 sysfs_remove_group(&dev->kobj, &it87_group_vid);
2446         sysfs_remove_group(&dev->kobj, &it87_group_label);
2447 }
2448
2449 /* Called when we have found a new IT87. */
2450 static void it87_init_device(struct platform_device *pdev)
2451 {
2452         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2453         struct it87_data *data = platform_get_drvdata(pdev);
2454         int tmp, i;
2455         u8 mask;
2456
2457         /*
2458          * For each PWM channel:
2459          * - If it is in automatic mode, setting to manual mode should set
2460          *   the fan to full speed by default.
2461          * - If it is in manual mode, we need a mapping to temperature
2462          *   channels to use when later setting to automatic mode later.
2463          *   Use a 1:1 mapping by default (we are clueless.)
2464          * In both cases, the value can (and should) be changed by the user
2465          * prior to switching to a different mode.
2466          * Note that this is no longer needed for the IT8721F and later, as
2467          * these have separate registers for the temperature mapping and the
2468          * manual duty cycle.
2469          */
2470         for (i = 0; i < 3; i++) {
2471                 data->pwm_temp_map[i] = i;
2472                 data->pwm_duty[i] = 0x7f;       /* Full speed */
2473                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
2474         }
2475
2476         /*
2477          * Some chips seem to have default value 0xff for all limit
2478          * registers. For low voltage limits it makes no sense and triggers
2479          * alarms, so change to 0 instead. For high temperature limits, it
2480          * means -1 degree C, which surprisingly doesn't trigger an alarm,
2481          * but is still confusing, so change to 127 degrees C.
2482          */
2483         for (i = 0; i < 8; i++) {
2484                 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
2485                 if (tmp == 0xff)
2486                         it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
2487         }
2488         for (i = 0; i < 3; i++) {
2489                 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2490                 if (tmp == 0xff)
2491                         it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
2492         }
2493
2494         /*
2495          * Temperature channels are not forcibly enabled, as they can be
2496          * set to two different sensor types and we can't guess which one
2497          * is correct for a given system. These channels can be enabled at
2498          * run-time through the temp{1-3}_type sysfs accessors if needed.
2499          */
2500
2501         /* Check if voltage monitors are reset manually or by some reason */
2502         tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
2503         if ((tmp & 0xff) == 0) {
2504                 /* Enable all voltage monitors */
2505                 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
2506         }
2507
2508         /* Check if tachometers are reset manually or by some reason */
2509         mask = 0x70 & ~(sio_data->skip_fan << 4);
2510         data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2511         if ((data->fan_main_ctrl & mask) == 0) {
2512                 /* Enable all fan tachometers */
2513                 data->fan_main_ctrl |= mask;
2514                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2515                                  data->fan_main_ctrl);
2516         }
2517         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
2518
2519         tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
2520
2521         /* Set tachometers to 16-bit mode if needed */
2522         if (has_fan16_config(data)) {
2523                 if (~tmp & 0x07 & data->has_fan) {
2524                         dev_dbg(&pdev->dev,
2525                                 "Setting fan1-3 to 16-bit mode\n");
2526                         it87_write_value(data, IT87_REG_FAN_16BIT,
2527                                          tmp | 0x07);
2528                 }
2529         }
2530
2531         /* Check for additional fans */
2532         if (has_five_fans(data)) {
2533                 if (tmp & (1 << 4))
2534                         data->has_fan |= (1 << 3); /* fan4 enabled */
2535                 if (tmp & (1 << 5))
2536                         data->has_fan |= (1 << 4); /* fan5 enabled */
2537         }
2538
2539         if (has_six_fans(data)) {
2540                 if (tmp & (1 << 2))
2541                         data->has_fan |= (1 << 5); /* fan6 enabled */
2542         }
2543
2544         /* Fan input pins may be used for alternative functions */
2545         data->has_fan &= ~sio_data->skip_fan;
2546
2547         /* Check if pwm5, pwm6 are enabled */
2548         if (has_six_pwm(data)) {
2549                 /* The following code may be IT8620E specific */
2550                 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
2551                 if ((tmp & 0xc0) == 0xc0)
2552                         sio_data->skip_pwm |= (1 << 4);
2553                 if (!(tmp & (1 << 3)))
2554                         sio_data->skip_pwm |= (1 << 5);
2555         }
2556
2557         /* Start monitoring */
2558         it87_write_value(data, IT87_REG_CONFIG,
2559                          (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
2560                          | (update_vbat ? 0x41 : 0x01));
2561 }
2562
2563 /* Return 1 if and only if the PWM interface is safe to use */
2564 static int it87_check_pwm(struct device *dev)
2565 {
2566         struct it87_data *data = dev_get_drvdata(dev);
2567         /*
2568          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
2569          * and polarity set to active low is sign that this is the case so we
2570          * disable pwm control to protect the user.
2571          */
2572         int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
2573         if ((tmp & 0x87) == 0) {
2574                 if (fix_pwm_polarity) {
2575                         /*
2576                          * The user asks us to attempt a chip reconfiguration.
2577                          * This means switching to active high polarity and
2578                          * inverting all fan speed values.
2579                          */
2580                         int i;
2581                         u8 pwm[3];
2582
2583                         for (i = 0; i < 3; i++)
2584                                 pwm[i] = it87_read_value(data,
2585                                                          IT87_REG_PWM[i]);
2586
2587                         /*
2588                          * If any fan is in automatic pwm mode, the polarity
2589                          * might be correct, as suspicious as it seems, so we
2590                          * better don't change anything (but still disable the
2591                          * PWM interface).
2592                          */
2593                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
2594                                 dev_info(dev,
2595                                          "Reconfiguring PWM to active high polarity\n");
2596                                 it87_write_value(data, IT87_REG_FAN_CTL,
2597                                                  tmp | 0x87);
2598                                 for (i = 0; i < 3; i++)
2599                                         it87_write_value(data,
2600                                                          IT87_REG_PWM[i],
2601                                                          0x7f & ~pwm[i]);
2602                                 return 1;
2603                         }
2604
2605                         dev_info(dev,
2606                                  "PWM configuration is too broken to be fixed\n");
2607                 }
2608
2609                 dev_info(dev,
2610                          "Detected broken BIOS defaults, disabling PWM interface\n");
2611                 return 0;
2612         } else if (fix_pwm_polarity) {
2613                 dev_info(dev,
2614                          "PWM configuration looks sane, won't touch\n");
2615         }
2616
2617         return 1;
2618 }
2619
2620 static int it87_probe(struct platform_device *pdev)
2621 {
2622         struct it87_data *data;
2623         struct resource *res;
2624         struct device *dev = &pdev->dev;
2625         struct it87_sio_data *sio_data = dev_get_platdata(dev);
2626         int err = 0, i;
2627         int enable_pwm_interface;
2628         int fan_beep_need_rw;
2629
2630         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
2631         if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
2632                                  DRVNAME)) {
2633                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
2634                         (unsigned long)res->start,
2635                         (unsigned long)(res->start + IT87_EC_EXTENT - 1));
2636                 return -EBUSY;
2637         }
2638
2639         data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
2640         if (!data)
2641                 return -ENOMEM;
2642
2643         data->addr = res->start;
2644         data->type = sio_data->type;
2645         data->features = it87_devices[sio_data->type].features;
2646         data->peci_mask = it87_devices[sio_data->type].peci_mask;
2647         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
2648         data->name = it87_devices[sio_data->type].name;
2649         /*
2650          * IT8705F Datasheet 0.4.1, 3h == Version G.
2651          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
2652          * These are the first revisions with 16-bit tachometer support.
2653          */
2654         switch (data->type) {
2655         case it87:
2656                 if (sio_data->revision >= 0x03) {
2657                         data->features &= ~FEAT_OLD_AUTOPWM;
2658                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
2659                 }
2660                 break;
2661         case it8712:
2662                 if (sio_data->revision >= 0x08) {
2663                         data->features &= ~FEAT_OLD_AUTOPWM;
2664                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
2665                                           FEAT_FIVE_FANS;
2666                 }
2667                 break;
2668         default:
2669                 break;
2670         }
2671
2672         /* Now, we do the remaining detection. */
2673         if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80)
2674          || it87_read_value(data, IT87_REG_CHIPID) != 0x90)
2675                 return -ENODEV;
2676
2677         platform_set_drvdata(pdev, data);
2678
2679         mutex_init(&data->update_lock);
2680
2681         /* Check PWM configuration */
2682         enable_pwm_interface = it87_check_pwm(dev);
2683
2684         /* Starting with IT8721F, we handle scaling of internal voltages */
2685         if (has_12mv_adc(data)) {
2686                 if (sio_data->internal & (1 << 0))
2687                         data->in_scaled |= (1 << 3);    /* in3 is AVCC */
2688                 if (sio_data->internal & (1 << 1))
2689                         data->in_scaled |= (1 << 7);    /* in7 is VSB */
2690                 if (sio_data->internal & (1 << 2))
2691                         data->in_scaled |= (1 << 8);    /* in8 is Vbat */
2692                 if (sio_data->internal & (1 << 3))
2693                         data->in_scaled |= (1 << 9);    /* in9 is AVCC */
2694         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
2695                    sio_data->type == it8783) {
2696                 if (sio_data->internal & (1 << 0))
2697                         data->in_scaled |= (1 << 3);    /* in3 is VCC5V */
2698                 if (sio_data->internal & (1 << 1))
2699                         data->in_scaled |= (1 << 7);    /* in7 is VCCH5V */
2700         }
2701
2702         data->has_temp = 0x07;
2703         if (sio_data->skip_temp & (1 << 2)) {
2704                 if (sio_data->type == it8782
2705                     && !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
2706                         data->has_temp &= ~(1 << 2);
2707         }
2708
2709         /* Initialize the IT87 chip */
2710         it87_init_device(pdev);
2711
2712         /* Register sysfs hooks */
2713         err = sysfs_create_group(&dev->kobj, &it87_group);
2714         if (err)
2715                 return err;
2716
2717         for (i = 0; i < 10; i++) {
2718                 if (sio_data->skip_in & (1 << i))
2719                         continue;
2720                 err = sysfs_create_group(&dev->kobj, &it87_group_in[i]);
2721                 if (err)
2722                         goto error;
2723                 if (sio_data->beep_pin && it87_attributes_in_beep[i]) {
2724                         err = sysfs_create_file(&dev->kobj,
2725                                                 it87_attributes_in_beep[i]);
2726                         if (err)
2727                                 goto error;
2728                 }
2729         }
2730
2731         for (i = 0; i < 3; i++) {
2732                 if (!(data->has_temp & (1 << i)))
2733                         continue;
2734                 err = sysfs_create_group(&dev->kobj, &it87_group_temp[i]);
2735                 if (err)
2736                         goto error;
2737                 if (has_temp_offset(data)) {
2738                         err = sysfs_create_file(&dev->kobj,
2739                                                 it87_attributes_temp_offset[i]);
2740                         if (err)
2741                                 goto error;
2742                 }
2743                 if (sio_data->beep_pin) {
2744                         err = sysfs_create_file(&dev->kobj,
2745                                                 it87_attributes_temp_beep[i]);
2746                         if (err)
2747                                 goto error;
2748                 }
2749         }
2750
2751         /* Do not create fan files for disabled fans */
2752         fan_beep_need_rw = 1;
2753         for (i = 0; i < 6; i++) {
2754                 if (!(data->has_fan & (1 << i)))
2755                         continue;
2756                 err = sysfs_create_group(&dev->kobj, &it87_group_fan[i]);
2757                 if (err)
2758                         goto error;
2759
2760                 if (i < 3 && !has_16bit_fans(data)) {
2761                         err = sysfs_create_file(&dev->kobj,
2762                                                 it87_attributes_fan_div[i]);
2763                         if (err)
2764                                 goto error;
2765                 }
2766
2767                 if (sio_data->beep_pin) {
2768                         err = sysfs_create_file(&dev->kobj,
2769                                                 it87_attributes_fan_beep[i]);
2770                         if (err)
2771                                 goto error;
2772                         if (!fan_beep_need_rw)
2773                                 continue;
2774
2775                         /*
2776                          * As we have a single beep enable bit for all fans,
2777                          * only the first enabled fan has a writable attribute
2778                          * for it.
2779                          */
2780                         if (sysfs_chmod_file(&dev->kobj,
2781                                              it87_attributes_fan_beep[i],
2782                                              S_IRUGO | S_IWUSR))
2783                                 dev_dbg(dev, "chmod +w fan%d_beep failed\n",
2784                                         i + 1);
2785                         fan_beep_need_rw = 0;
2786                 }
2787         }
2788
2789         if (enable_pwm_interface) {
2790                 for (i = 0; i < 6; i++) {
2791                         if (sio_data->skip_pwm & (1 << i))
2792                                 continue;
2793                         err = sysfs_create_group(&dev->kobj,
2794                                                  &it87_group_pwm[i]);
2795                         if (err)
2796                                 goto error;
2797
2798                         if (!has_old_autopwm(data))
2799                                 continue;
2800                         err = sysfs_create_group(&dev->kobj,
2801                                                  &it87_group_autopwm[i]);
2802                         if (err)
2803                                 goto error;
2804                 }
2805         }
2806
2807         if (!sio_data->skip_vid) {
2808                 data->vrm = vid_which_vrm();
2809                 /* VID reading from Super-I/O config space if available */
2810                 data->vid = sio_data->vid_value;
2811                 err = sysfs_create_group(&dev->kobj, &it87_group_vid);
2812                 if (err)
2813                         goto error;
2814         }
2815
2816         /* Export labels for internal sensors */
2817         for (i = 0; i < 4; i++) {
2818                 if (!(sio_data->internal & (1 << i)))
2819                         continue;
2820                 err = sysfs_create_file(&dev->kobj,
2821                                         it87_attributes_label[i]);
2822                 if (err)
2823                         goto error;
2824         }
2825
2826         data->hwmon_dev = hwmon_device_register(dev);
2827         if (IS_ERR(data->hwmon_dev)) {
2828                 err = PTR_ERR(data->hwmon_dev);
2829                 goto error;
2830         }
2831
2832         return 0;
2833
2834 error:
2835         it87_remove_files(dev);
2836         return err;
2837 }
2838
2839 static int it87_remove(struct platform_device *pdev)
2840 {
2841         struct it87_data *data = platform_get_drvdata(pdev);
2842
2843         hwmon_device_unregister(data->hwmon_dev);
2844         it87_remove_files(&pdev->dev);
2845
2846         return 0;
2847 }
2848
2849 static struct platform_driver it87_driver = {
2850         .driver = {
2851                 .name   = DRVNAME,
2852         },
2853         .probe  = it87_probe,
2854         .remove = it87_remove,
2855 };
2856
2857 static int __init it87_device_add(int index, unsigned short address,
2858                                   const struct it87_sio_data *sio_data)
2859 {
2860         struct platform_device *pdev;
2861         struct resource res = {
2862                 .start  = address + IT87_EC_OFFSET,
2863                 .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
2864                 .name   = DRVNAME,
2865                 .flags  = IORESOURCE_IO,
2866         };
2867         int err;
2868
2869         err = acpi_check_resource_conflict(&res);
2870         if (err)
2871                 return err;
2872
2873         pdev = platform_device_alloc(DRVNAME, address);
2874         if (!pdev)
2875                 return -ENOMEM;
2876
2877         err = platform_device_add_resources(pdev, &res, 1);
2878         if (err) {
2879                 pr_err("Device resource addition failed (%d)\n", err);
2880                 goto exit_device_put;
2881         }
2882
2883         err = platform_device_add_data(pdev, sio_data,
2884                                        sizeof(struct it87_sio_data));
2885         if (err) {
2886                 pr_err("Platform data allocation failed\n");
2887                 goto exit_device_put;
2888         }
2889
2890         err = platform_device_add(pdev);
2891         if (err) {
2892                 pr_err("Device addition failed (%d)\n", err);
2893                 goto exit_device_put;
2894         }
2895
2896         it87_pdev[index] = pdev;
2897         return 0;
2898
2899 exit_device_put:
2900         platform_device_put(pdev);
2901         return err;
2902 }
2903
2904 static int __init sm_it87_init(void)
2905 {
2906         int sioaddr[2] = { REG_2E, REG_4E };
2907         struct it87_sio_data sio_data;
2908         unsigned short isa_address;
2909         bool found = false;
2910         int i, err;
2911
2912         err = platform_driver_register(&it87_driver);
2913         if (err)
2914                 return err;
2915
2916         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
2917                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
2918                 isa_address = 0;
2919                 err = it87_find(sioaddr[i], &isa_address, &sio_data);
2920                 if (err || isa_address == 0)
2921                         continue;
2922
2923                 err = it87_device_add(i, isa_address, &sio_data);
2924                 if (err)
2925                         goto exit_dev_unregister;
2926                 found = true;
2927         }
2928
2929         if (!found) {
2930                 err = -ENODEV;
2931                 goto exit_unregister;
2932         }
2933         return 0;
2934
2935 exit_dev_unregister:
2936         /* NULL check handled by platform_device_unregister */
2937         platform_device_unregister(it87_pdev[0]);
2938 exit_unregister:
2939         platform_driver_unregister(&it87_driver);
2940         return err;
2941 }
2942
2943 static void __exit sm_it87_exit(void)
2944 {
2945         /* NULL check handled by platform_device_unregister */
2946         platform_device_unregister(it87_pdev[1]);
2947         platform_device_unregister(it87_pdev[0]);
2948         platform_driver_unregister(&it87_driver);
2949 }
2950
2951
2952 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
2953 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
2954 module_param(update_vbat, bool, 0);
2955 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
2956 module_param(fix_pwm_polarity, bool, 0);
2957 MODULE_PARM_DESC(fix_pwm_polarity,
2958                  "Force PWM polarity to active high (DANGEROUS)");
2959 MODULE_LICENSE("GPL");
2960
2961 module_init(sm_it87_init);
2962 module_exit(sm_it87_exit);