2 ; Ullrich von Bassewitz, 02.04.1999
4 ; unsigned char getcpu (void);
6 .include "zeropage.inc"
9 ; ---------------------------------------------------------------------------
10 ; Subroutine to detect an 816. Returns
12 ; - carry clear and 0 in A for a NMOS 6502 CPU
13 ; - carry set and 1 in A for a 65C02
14 ; - carry set and 2 in A for a 65816
15 ; - carry set and 3 in A for a 4510
16 ; - carry set and 4 in A for a 65SC02
17 ; - carry set and 5 in A for a 65CE02
18 ; - carry set and 6 in A for a HuC6280
19 ; - carry clear and 7 in A for a 2a03/2a07
20 ; - carry set and 8 in A for a 45GS02
22 ; This function uses a $1A opcode which is a INA on the 816 and ignored
23 ; (interpreted as a NOP) on a NMOS 6502. There are several CMOS versions
24 ; of the 6502, but all of them interpret unknown opcodes as NOP so this is
27 .p816 ; Enable 65816 instructions
32 inc a ; .byte $1A ; nop on nmos, inc on every cmos
36 ; This is at least a 65C02, check for a 65CE02/4510
38 .byte $42,$EA ; neg on 65CE02/4510, nop #$EA on 65C02, wdm $EA on 65816
42 ; This is at least a 65CE02, check for 4510
44 lda #5 ; CPU_65CE02 constant
45 ldx #0 ; to make sure MAP doesn't do anything, the upper nybl of X and Z must be clear
46 .byte $5C ; map on 4510, aug on 65CE02 (acts like 4 byte nop)
47 lda #3 ; CPU_4510 constant
52 ; It is either a 4510 (C65) or a 45GS02 (MEGA65)
54 ; 45GS02 supports 32-bit ZP indirect, so use that to check CPU type
55 ; without requiring a functioning MEGA65 hypervisor.
56 ; We setup a read of $200xx, then store a different value in $xx
57 ; and then re-read $200xx to see if it is unchanged.
59 ; Setup 32-bit pointer to $00020000+tmp1
64 sta regsave+3 ; also write to upper byte of pointer to save an extra LDA #$00
68 ; Prefixing LDA ($nn),Z with a NOP uses 32-bit ZP pointer on 45GS02,
69 ; but normal 16-bit ZP pointer on 4510
70 ; (We assume Z=$00, which will be the normal case)
71 nop ; prefix to tell next instruction to be 32-bit ZP
72 .byte $b2,regsave ; LDA (regsave),Z
73 eor #$ff ; change the value
74 sta tmp1 ; store in $xx
75 ; now try again to load it: If the same, then 45GS02, as $200xx is unchanged
76 nop ; prefix to tell next instruction to be 32-bit ZP
77 .byte $b2,regsave ; LDA (regsave),Z
78 cmp tmp1 ; does the loaded value match what is in $xx?
79 bne @Is45GS02 ; $200xx and $xx have different values, so must be a MEGA65 45GS02
81 lda #3 ; CPU_4510 constant
82 ldx #0 ; load high byte of word
86 lda #8 ; CPU_45GS02 constant
87 ldx #0 ; load high byte of word
90 ; 6502 type of cpu, check for a 2a03/2a07
92 sed ; set decimal mode, no decimal mode on the 2a03/2a07
95 adc #1 ; $01+$09 = $10 on 6502, $01+$09 = $0A on 2a03/2a07
99 lda #0 ; CPU_6502 constant
102 lda #7 ; CPU_2A0x constant
105 ; 65C02 cpu type, check for HuC6280
107 ldx #6 ; CPU_HUC6280 constant
108 .byte $22,$EA ; sax nop on HuC6280 (A=$06, X=$01), nop #$EA on 65C02 (A=$01, X=$06)
111 ; Check for 65816/65802
113 xba ; .byte $EB, put $01 in B accu (nop on 65C02/65SC02)
114 dec a ; .byte $3A, A=$00
115 xba ; .byte $EB, A=$01 if 65816/65802 and A=$00 if 65C02/65SC02
116 inc a ; .byte $1A, A=$02 if 65816/65802 and A=$01 if 65C02/65SC02
125 .byte $F7,$F7 ; nop nop on 65SC02, smb7 $F7 on 65C02
130 lda #4 ; CPU_65SC02 constant