3 * Magnus Lilja <lilja.magnus@gmail.com>
6 * Maxim Artamonov, <scn1874 at yandex.ru>
8 * (C) Copyright 2006-2008
9 * Stefan Roese, DENX Software Engineering, sr at denx.de.
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #include <asm/arch/imx-regs.h>
33 static struct fsl_nfc_regs *const nfc = (void *)NFC_BASE_ADDR;
35 static void nfc_wait_ready(void)
39 while (!(readnfc(&nfc->config2) & NFC_V1_V2_CONFIG2_INT))
42 /* Reset interrupt flag */
43 tmp = readnfc(&nfc->config2);
44 tmp &= ~NFC_V1_V2_CONFIG2_INT;
45 writenfc(tmp, &nfc->config2);
48 static void nfc_nand_init(void)
50 #if defined(MXC_NFC_V2_1)
51 int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
54 writenfc(CONFIG_SYS_NAND_SPARE_SIZE / 2, &nfc->spare_area_size);
56 /* unlocking RAM Buff */
57 writenfc(0x2, &nfc->config);
59 /* hardware ECC checking and correct */
60 config1 = readnfc(&nfc->config1) | NFC_V1_V2_CONFIG1_ECC_EN |
61 NFC_V1_V2_CONFIG1_INT_MSK | NFC_V2_CONFIG1_ONE_CYCLE |
62 NFC_V2_CONFIG1_FP_INT;
64 * if spare size is larger that 16 bytes per 512 byte hunk
65 * then use 8 symbol correction instead of 4
67 if (CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page > 16)
68 config1 &= ~NFC_V2_CONFIG1_ECC_MODE_4;
70 config1 |= NFC_V2_CONFIG1_ECC_MODE_4;
71 writenfc(config1, &nfc->config1);
72 #elif defined(MXC_NFC_V1)
73 /* unlocking RAM Buff */
74 writenfc(0x2, &nfc->config);
76 /* hardware ECC checking and correct */
77 writenfc(NFC_V1_V2_CONFIG1_ECC_EN | NFC_V1_V2_CONFIG1_INT_MSK,
82 static void nfc_nand_command(unsigned short command)
84 writenfc(command, &nfc->flash_cmd);
85 writenfc(NFC_CMD, &nfc->operation);
89 static void nfc_nand_address(unsigned short address)
91 writenfc(address, &nfc->flash_addr);
92 writenfc(NFC_ADDR, &nfc->operation);
96 static void nfc_nand_page_address(unsigned int page_address)
98 unsigned int page_count;
100 nfc_nand_address(0x00);
102 /* code only for large page flash */
103 if (CONFIG_SYS_NAND_PAGE_SIZE > 512)
104 nfc_nand_address(0x00);
106 page_count = CONFIG_SYS_NAND_SIZE / CONFIG_SYS_NAND_PAGE_SIZE;
108 if (page_address <= page_count) {
109 page_count--; /* transform 0x01000000 to 0x00ffffff */
111 nfc_nand_address(page_address & 0xff);
112 page_address = page_address >> 8;
113 page_count = page_count >> 8;
114 } while (page_count);
117 nfc_nand_address(0x00);
120 static void nfc_nand_data_output(void)
122 #ifdef NAND_MXC_2K_MULTI_CYCLE
126 writenfc(0, &nfc->buf_addr);
127 writenfc(NFC_OUTPUT, &nfc->operation);
129 #ifdef NAND_MXC_2K_MULTI_CYCLE
131 * This NAND controller requires multiple input commands
132 * for pages larger than 512 bytes.
134 for (i = 1; i < CONFIG_SYS_NAND_PAGE_SIZE / 512; i++) {
135 writenfc(i, &nfc->buf_addr);
136 writenfc(NFC_OUTPUT, &nfc->operation);
142 static int nfc_nand_check_ecc(void)
144 #if defined(MXC_NFC_V1)
145 u16 ecc_status = readw(&nfc->ecc_status_result);
146 return (ecc_status & 0x3) == 2 || (ecc_status >> 2) == 2;
147 #elif defined(MXC_NFC_V2_1)
148 u32 ecc_status = readl(&nfc->ecc_status_result);
149 int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
150 int err_limit = CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page > 16 ? 8 : 4;
151 int subpages = CONFIG_SYS_NAND_PAGE_SIZE / 512;
154 if ((ecc_status & 0xf) > err_limit)
157 } while (--subpages);
163 static void nfc_nand_read_page(unsigned int page_address)
165 /* read in first 0 buffer */
166 writenfc(0, &nfc->buf_addr);
167 nfc_nand_command(NAND_CMD_READ0);
168 nfc_nand_page_address(page_address);
170 if (CONFIG_SYS_NAND_PAGE_SIZE > 512)
171 nfc_nand_command(NAND_CMD_READSTART);
173 nfc_nand_data_output(); /* fill the main buffer 0 */
176 static int nfc_read_page(unsigned int page_address, unsigned char *buf)
182 nfc_nand_read_page(page_address);
184 if (nfc_nand_check_ecc())
187 src = (u32 *)&nfc->main_area[0][0];
190 /* main copy loop from NAND-buffer to SDRAM memory */
191 for (i = 0; i < CONFIG_SYS_NAND_PAGE_SIZE / 4; i++) {
192 writel(readl(src), dst);
200 static int is_badblock(int pagenumber)
202 int page = pagenumber;
206 /* Check the first two pages for bad block markers */
207 for (page = pagenumber; page < pagenumber + 2; page++) {
208 nfc_nand_read_page(page);
210 src = (u32 *)&nfc->spare_area[0][0];
213 * IMPORTANT NOTE: The nand flash controller uses a non-
214 * standard layout for large page devices. This can
215 * affect the position of the bad block marker.
217 /* Get the bad block marker */
218 badblock = readl(&src[CONFIG_SYS_NAND_BAD_BLOCK_POS / 4]);
219 badblock >>= 8 * (CONFIG_SYS_NAND_BAD_BLOCK_POS % 4);
222 /* bad block marker verify */
223 if (badblock != 0xff)
224 return 1; /* potential bad block */
230 static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)
234 unsigned int maxpages = CONFIG_SYS_NAND_SIZE /
235 CONFIG_SYS_NAND_PAGE_SIZE;
239 /* Convert to page number */
240 page = from / CONFIG_SYS_NAND_PAGE_SIZE;
243 while (i < size / CONFIG_SYS_NAND_PAGE_SIZE) {
244 if (nfc_read_page(page, buf) < 0)
249 buf = buf + CONFIG_SYS_NAND_PAGE_SIZE;
252 * Check if we have crossed a block boundary, and if so
253 * check for bad block.
255 if (!(page % CONFIG_SYS_NAND_PAGE_COUNT)) {
257 * Yes, new block. See if this block is good. If not,
258 * loop until we find a good block.
260 while (is_badblock(page)) {
261 page = page + CONFIG_SYS_NAND_PAGE_COUNT;
262 /* Check i we've reached the end of flash. */
263 if (page >= maxpages)
272 #if defined(CONFIG_ARM)
273 void board_init_f (ulong bootflag)
275 relocate_code (CONFIG_SYS_TEXT_BASE - TOTAL_MALLOC_LEN, NULL,
276 CONFIG_SYS_TEXT_BASE);
281 * The main entry for NAND booting. It's necessary that SDRAM is already
282 * configured and available since this code loads the main U-Boot image
283 * from NAND into SDRAM and starts it from there.
287 __attribute__((noreturn)) void (*uboot)(void);
290 * CONFIG_SYS_NAND_U_BOOT_OFFS and CONFIG_SYS_NAND_U_BOOT_SIZE must
291 * be aligned to full pages
293 if (!nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
294 (uchar *)CONFIG_SYS_NAND_U_BOOT_DST)) {
295 /* Copy from NAND successful, start U-boot */
296 uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
299 /* Unrecoverable error when copying from NAND */
305 * Called in case of an exception.