2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2012 Jean Delvare <jdelvare@suse.de>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 * Supports the following chips:
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3
37 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
38 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
39 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
40 * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3
41 * nct6792d 15 6 6 2+6 0xc910 0xc1 0x5ca3
42 * nct6793d 15 6 6 2+6 0xd120 0xc1 0x5ca3
43 * nct6795d 15? 6? 6? 2+6? 0xd350 0xc1 0x5ca3
45 * #temp lists the number of monitored temperature sources (first value) plus
46 * the number of directly connectable temperature sensors (second value).
49 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
51 #include <linux/module.h>
52 #include <linux/init.h>
53 #include <linux/slab.h>
54 #include <linux/jiffies.h>
55 #include <linux/platform_device.h>
56 #include <linux/hwmon.h>
57 #include <linux/hwmon-sysfs.h>
58 #include <linux/hwmon-vid.h>
59 #include <linux/err.h>
60 #include <linux/mutex.h>
61 #include <linux/acpi.h>
62 #include <linux/dmi.h>
69 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792, nct6793,
72 /* used to set data->name = nct6775_device_names[data->sio_kind] */
73 static const char * const nct6775_device_names[] = {
84 static const char * const nct6775_sio_names[] __initconst = {
95 static unsigned short force_id;
96 module_param(force_id, ushort, 0);
97 MODULE_PARM_DESC(force_id, "Override the detected device ID");
99 static unsigned short fan_debounce;
100 module_param(fan_debounce, ushort, 0);
101 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
103 #define DRVNAME "nct6775"
106 * Super-I/O constants and functions
109 #define NCT6775_LD_ACPI 0x0a
110 #define NCT6775_LD_HWM 0x0b
111 #define NCT6775_LD_VID 0x0d
113 #define SIO_REG_LDSEL 0x07 /* Logical device select */
114 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
115 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
116 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
118 #define SIO_NCT6106_ID 0xc450
119 #define SIO_NCT6775_ID 0xb470
120 #define SIO_NCT6776_ID 0xc330
121 #define SIO_NCT6779_ID 0xc560
122 #define SIO_NCT6791_ID 0xc800
123 #define SIO_NCT6792_ID 0xc910
124 #define SIO_NCT6793_ID 0xd120
125 #define SIO_NCT6795_ID 0xd350
126 #define SIO_ID_MASK 0xFFF0
128 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
131 superio_outb(int ioreg, int reg, int val)
134 outb(val, ioreg + 1);
138 superio_inb(int ioreg, int reg)
141 return inb(ioreg + 1);
145 superio_select(int ioreg, int ld)
147 outb(SIO_REG_LDSEL, ioreg);
152 superio_enter(int ioreg)
155 * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
157 if (!request_muxed_region(ioreg, 2, DRVNAME))
167 superio_exit(int ioreg)
171 outb(0x02, ioreg + 1);
172 release_region(ioreg, 2);
179 #define IOREGION_ALIGNMENT (~7)
180 #define IOREGION_OFFSET 5
181 #define IOREGION_LENGTH 2
182 #define ADDR_REG_OFFSET 0
183 #define DATA_REG_OFFSET 1
185 #define NCT6775_REG_BANK 0x4E
186 #define NCT6775_REG_CONFIG 0x40
189 * Not currently used:
190 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
191 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
192 * REG_MAN_ID is at port 0x4f
193 * REG_CHIP_ID is at port 0x58
196 #define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
197 #define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
199 #define NUM_REG_ALARM 7 /* Max number of alarm registers */
200 #define NUM_REG_BEEP 5 /* Max number of beep registers */
204 #define TEMP_SOURCE_VIRTUAL 0x1f
206 /* Common and NCT6775 specific data */
208 /* Voltage min/max registers for nr=7..14 are in bank 5 */
210 static const u16 NCT6775_REG_IN_MAX[] = {
211 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
212 0x55c, 0x55e, 0x560, 0x562 };
213 static const u16 NCT6775_REG_IN_MIN[] = {
214 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
215 0x55d, 0x55f, 0x561, 0x563 };
216 static const u16 NCT6775_REG_IN[] = {
217 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
220 #define NCT6775_REG_VBAT 0x5D
221 #define NCT6775_REG_DIODE 0x5E
222 #define NCT6775_DIODE_MASK 0x02
224 #define NCT6775_REG_FANDIV1 0x506
225 #define NCT6775_REG_FANDIV2 0x507
227 #define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
229 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
231 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
233 static const s8 NCT6775_ALARM_BITS[] = {
234 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
235 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
237 6, 7, 11, -1, -1, /* fan1..fan5 */
238 -1, -1, -1, /* unused */
239 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
240 12, -1 }; /* intrusion0, intrusion1 */
242 #define FAN_ALARM_BASE 16
243 #define TEMP_ALARM_BASE 24
244 #define INTRUSION_ALARM_BASE 30
246 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
249 * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
252 static const s8 NCT6775_BEEP_BITS[] = {
253 0, 1, 2, 3, 8, 9, 10, 16, /* in0.. in7 */
254 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
255 21, /* global beep enable */
256 6, 7, 11, 28, -1, /* fan1..fan5 */
257 -1, -1, -1, /* unused */
258 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
259 12, -1 }; /* intrusion0, intrusion1 */
261 #define BEEP_ENABLE_BASE 15
263 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
264 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
266 /* DC or PWM output fan configuration */
267 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
268 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
270 /* Advanced Fan control, some values are common for all fans */
272 static const u16 NCT6775_REG_TARGET[] = {
273 0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
274 static const u16 NCT6775_REG_FAN_MODE[] = {
275 0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
276 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
277 0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
278 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
279 0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
280 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
281 0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
282 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
283 0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
284 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
285 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
287 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
288 0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
289 static const u16 NCT6775_REG_PWM[] = {
290 0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
291 static const u16 NCT6775_REG_PWM_READ[] = {
292 0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
294 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
295 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
296 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
297 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
299 static const u16 NCT6775_REG_TEMP[] = {
300 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
302 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
304 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
305 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
306 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
307 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
308 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
309 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
311 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
312 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
314 static const u16 NCT6775_REG_TEMP_SEL[] = {
315 0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
317 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
318 0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
319 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
320 0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
321 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
322 0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
323 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
324 0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
325 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
326 0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
328 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
330 static const u16 NCT6775_REG_AUTO_TEMP[] = {
331 0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
332 static const u16 NCT6775_REG_AUTO_PWM[] = {
333 0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
335 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
336 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
338 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
340 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
341 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
342 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
343 0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
345 static const char *const nct6775_temp_label[] = {
359 "PCH_CHIP_CPU_MAX_TEMP",
369 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
370 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
372 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
373 = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
376 /* NCT6776 specific data */
378 /* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */
379 #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME
380 #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME
382 static const s8 NCT6776_ALARM_BITS[] = {
383 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
384 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
386 6, 7, 11, 10, 23, /* fan1..fan5 */
387 -1, -1, -1, /* unused */
388 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
389 12, 9 }; /* intrusion0, intrusion1 */
391 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
393 static const s8 NCT6776_BEEP_BITS[] = {
394 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
395 8, -1, -1, -1, -1, -1, -1, /* in8..in14 */
396 24, /* global beep enable */
397 25, 26, 27, 28, 29, /* fan1..fan5 */
398 -1, -1, -1, /* unused */
399 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
400 30, 31 }; /* intrusion0, intrusion1 */
402 static const u16 NCT6776_REG_TOLERANCE_H[] = {
403 0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
405 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
406 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
408 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
409 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
411 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
412 0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
414 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
415 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
417 static const char *const nct6776_temp_label[] = {
432 "PCH_CHIP_CPU_MAX_TEMP",
443 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
444 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
446 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
447 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
449 /* NCT6779 specific data */
451 static const u16 NCT6779_REG_IN[] = {
452 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
453 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
455 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
456 0x459, 0x45A, 0x45B, 0x568 };
458 static const s8 NCT6779_ALARM_BITS[] = {
459 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
460 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
462 6, 7, 11, 10, 23, /* fan1..fan5 */
463 -1, -1, -1, /* unused */
464 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
465 12, 9 }; /* intrusion0, intrusion1 */
467 static const s8 NCT6779_BEEP_BITS[] = {
468 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
469 8, 9, 10, 11, 12, 13, 14, /* in8..in14 */
470 24, /* global beep enable */
471 25, 26, 27, 28, 29, /* fan1..fan5 */
472 -1, -1, -1, /* unused */
473 16, 17, -1, -1, -1, -1, /* temp1..temp6 */
474 30, 31 }; /* intrusion0, intrusion1 */
476 static const u16 NCT6779_REG_FAN[] = {
477 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
478 static const u16 NCT6779_REG_FAN_PULSES[] = {
479 0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
481 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
482 0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
483 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01
484 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
485 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
487 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
488 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
489 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
491 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
493 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
496 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
497 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
499 static const char *const nct6779_temp_label[] = {
518 "PCH_CHIP_CPU_MAX_TEMP",
534 #define NCT6779_NUM_LABELS (ARRAY_SIZE(nct6779_temp_label) - 5)
535 #define NCT6791_NUM_LABELS ARRAY_SIZE(nct6779_temp_label)
537 static const u16 NCT6779_REG_TEMP_ALTERNATE[NCT6791_NUM_LABELS - 1]
538 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
539 0, 0, 0, 0, 0, 0, 0, 0,
540 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
543 static const u16 NCT6779_REG_TEMP_CRIT[NCT6791_NUM_LABELS - 1]
544 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
546 /* NCT6791 specific data */
548 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE 0x28
550 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
551 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
552 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
553 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
554 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
555 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
557 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
558 0x459, 0x45A, 0x45B, 0x568, 0x45D };
560 static const s8 NCT6791_ALARM_BITS[] = {
561 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
562 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
564 6, 7, 11, 10, 23, 33, /* fan1..fan6 */
566 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
567 12, 9 }; /* intrusion0, intrusion1 */
569 /* NCT6792/NCT6793 specific data */
571 static const u16 NCT6792_REG_TEMP_MON[] = {
572 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
573 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
574 0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
576 static const char *const nct6792_temp_label[] = {
595 "PCH_CHIP_CPU_MAX_TEMP",
604 "PECI Agent 0 Calibration",
605 "PECI Agent 1 Calibration",
611 static const char *const nct6793_temp_label[] = {
630 "PCH_CHIP_CPU_MAX_TEMP",
640 "PECI Agent 0 Calibration",
641 "PECI Agent 1 Calibration",
646 /* NCT6102D/NCT6106D specific data */
648 #define NCT6106_REG_VBAT 0x318
649 #define NCT6106_REG_DIODE 0x319
650 #define NCT6106_DIODE_MASK 0x01
652 static const u16 NCT6106_REG_IN_MAX[] = {
653 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
654 static const u16 NCT6106_REG_IN_MIN[] = {
655 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
656 static const u16 NCT6106_REG_IN[] = {
657 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
659 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
660 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
661 static const u16 NCT6106_REG_TEMP_HYST[] = {
662 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
663 static const u16 NCT6106_REG_TEMP_OVER[] = {
664 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
665 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
666 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
667 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
668 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
669 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
670 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
671 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
673 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
674 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
675 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
676 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
678 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
679 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
680 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
681 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
682 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
683 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
684 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
685 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
687 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
688 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
689 0x11b, 0x12b, 0x13b };
691 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
692 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10
693 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
695 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
696 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
697 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
698 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
699 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
700 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
702 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
704 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
705 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
706 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
707 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
708 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
709 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
711 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
712 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
714 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
715 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
717 static const s8 NCT6106_ALARM_BITS[] = {
718 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
719 9, -1, -1, -1, -1, -1, -1, /* in8..in14 */
721 32, 33, 34, -1, -1, /* fan1..fan5 */
722 -1, -1, -1, /* unused */
723 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
724 48, -1 /* intrusion0, intrusion1 */
727 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
728 0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
730 static const s8 NCT6106_BEEP_BITS[] = {
731 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
732 9, 10, 11, 12, -1, -1, -1, /* in8..in14 */
733 32, /* global beep enable */
734 24, 25, 26, 27, 28, /* fan1..fan5 */
735 -1, -1, -1, /* unused */
736 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
737 34, -1 /* intrusion0, intrusion1 */
740 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
741 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
743 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
744 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
746 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
748 if (mode == 0 && pwm == 255)
753 static int pwm_enable_to_reg(enum pwm_enable mode)
764 /* 1 is DC mode, output in ms */
765 static unsigned int step_time_from_reg(u8 reg, u8 mode)
767 return mode ? 400 * reg : 100 * reg;
770 static u8 step_time_to_reg(unsigned int msec, u8 mode)
772 return clamp_val((mode ? (msec + 200) / 400 :
773 (msec + 50) / 100), 1, 255);
776 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
778 if (reg == 0 || reg == 255)
780 return 1350000U / (reg << divreg);
783 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
785 if ((reg & 0xff1f) == 0xff1f)
788 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
793 return 1350000U / reg;
796 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
798 if (reg == 0 || reg == 0xffff)
802 * Even though the registers are 16 bit wide, the fan divisor
805 return 1350000U / (reg << divreg);
808 static u16 fan_to_reg(u32 fan, unsigned int divreg)
813 return (1350000U / fan) >> divreg;
816 static inline unsigned int
823 * Some of the voltage inputs have internal scaling, the tables below
824 * contain 8 (the ADC LSB in mV) * scaling factor * 100
826 static const u16 scale_in[15] = {
827 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
831 static inline long in_from_reg(u8 reg, u8 nr)
833 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
836 static inline u8 in_to_reg(u32 val, u8 nr)
838 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
842 * Data structures and manipulation thereof
845 struct nct6775_data {
846 int addr; /* IO base of hw monitor block */
847 int sioreg; /* SIO register address */
851 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
852 struct device *hwmon_dev;
855 const struct attribute_group *groups[6];
857 u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
858 * 3=temp_crit, 4=temp_lcrit
860 u8 temp_src[NUM_TEMP];
861 u16 reg_temp_config[NUM_TEMP];
862 const char * const *temp_label;
870 const s8 *ALARM_BITS;
874 const u16 *REG_IN_MINMAX[2];
876 const u16 *REG_TARGET;
878 const u16 *REG_FAN_MODE;
879 const u16 *REG_FAN_MIN;
880 const u16 *REG_FAN_PULSES;
881 const u16 *FAN_PULSE_SHIFT;
882 const u16 *REG_FAN_TIME[3];
884 const u16 *REG_TOLERANCE_H;
886 const u8 *REG_PWM_MODE;
887 const u8 *PWM_MODE_MASK;
889 const u16 *REG_PWM[7]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
890 * [3]=pwm_max, [4]=pwm_step,
891 * [5]=weight_duty_step, [6]=weight_duty_base
893 const u16 *REG_PWM_READ;
895 const u16 *REG_CRITICAL_PWM_ENABLE;
896 u8 CRITICAL_PWM_ENABLE_MASK;
897 const u16 *REG_CRITICAL_PWM;
899 const u16 *REG_AUTO_TEMP;
900 const u16 *REG_AUTO_PWM;
902 const u16 *REG_CRITICAL_TEMP;
903 const u16 *REG_CRITICAL_TEMP_TOLERANCE;
905 const u16 *REG_TEMP_SOURCE; /* temp register sources */
906 const u16 *REG_TEMP_SEL;
907 const u16 *REG_WEIGHT_TEMP_SEL;
908 const u16 *REG_WEIGHT_TEMP[3]; /* 0=base, 1=tolerance, 2=step */
910 const u16 *REG_TEMP_OFFSET;
912 const u16 *REG_ALARM;
915 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
916 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
918 struct mutex update_lock;
919 bool valid; /* true if following fields are valid */
920 unsigned long last_updated; /* In jiffies */
922 /* Register values */
923 u8 bank; /* current register bank */
924 u8 in_num; /* number of in inputs we have */
925 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
926 unsigned int rpm[NUM_FAN];
927 u16 fan_min[NUM_FAN];
928 u8 fan_pulses[NUM_FAN];
931 u8 has_fan; /* some fan inputs can be disabled */
932 u8 has_fan_min; /* some fans don't have min register */
935 u8 num_temp_alarms; /* 2, 3, or 6 */
936 u8 num_temp_beeps; /* 2, 3, or 6 */
937 u8 temp_fixed_num; /* 3 or 6 */
938 u8 temp_type[NUM_TEMP_FIXED];
939 s8 temp_offset[NUM_TEMP_FIXED];
940 s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
941 * 3=temp_crit, 4=temp_lcrit */
945 u8 pwm_num; /* number of pwm */
946 u8 pwm_mode[NUM_FAN]; /* 1->DC variable voltage,
947 * 0->PWM variable duty cycle
949 enum pwm_enable pwm_enable[NUM_FAN];
952 * 2->thermal cruise mode (also called SmartFan I)
953 * 3->fan speed cruise mode
955 * 5->enhanced variable thermal cruise (SmartFan IV)
957 u8 pwm[7][NUM_FAN]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
958 * [3]=pwm_max, [4]=pwm_step,
959 * [5]=weight_duty_step, [6]=weight_duty_base
962 u8 target_temp[NUM_FAN];
964 u32 target_speed[NUM_FAN];
965 u32 target_speed_tolerance[NUM_FAN];
966 u8 speed_tolerance_limit;
968 u8 temp_tolerance[2][NUM_FAN];
971 u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
973 /* Automatic fan speed control registers */
975 u8 auto_pwm[NUM_FAN][7];
976 u8 auto_temp[NUM_FAN][7];
977 u8 pwm_temp_sel[NUM_FAN];
978 u8 pwm_weight_temp_sel[NUM_FAN];
979 u8 weight_temp[3][NUM_FAN]; /* 0->temp_step, 1->temp_step_tol,
992 /* Remember extra register values over suspend/resume */
999 struct nct6775_sio_data {
1004 struct sensor_device_template {
1005 struct device_attribute dev_attr;
1013 bool s2; /* true if both index and nr are used */
1016 struct sensor_device_attr_u {
1018 struct sensor_device_attribute a1;
1019 struct sensor_device_attribute_2 a2;
1024 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \
1025 .attr = {.name = _template, .mode = _mode }, \
1030 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
1031 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1032 .u.index = _index, \
1035 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
1037 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
1038 .u.s.index = _index, \
1042 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
1043 static struct sensor_device_template sensor_dev_template_##_name \
1044 = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \
1047 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \
1049 static struct sensor_device_template sensor_dev_template_##_name \
1050 = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
1053 struct sensor_template_group {
1054 struct sensor_device_template **templates;
1055 umode_t (*is_visible)(struct kobject *, struct attribute *, int);
1059 static struct attribute_group *
1060 nct6775_create_attr_group(struct device *dev,
1061 const struct sensor_template_group *tg,
1064 struct attribute_group *group;
1065 struct sensor_device_attr_u *su;
1066 struct sensor_device_attribute *a;
1067 struct sensor_device_attribute_2 *a2;
1068 struct attribute **attrs;
1069 struct sensor_device_template **t;
1073 return ERR_PTR(-EINVAL);
1076 for (count = 0; *t; t++, count++)
1080 return ERR_PTR(-EINVAL);
1082 group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
1084 return ERR_PTR(-ENOMEM);
1086 attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
1089 return ERR_PTR(-ENOMEM);
1091 su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
1094 return ERR_PTR(-ENOMEM);
1096 group->attrs = attrs;
1097 group->is_visible = tg->is_visible;
1099 for (i = 0; i < repeat; i++) {
1101 while (*t != NULL) {
1102 snprintf(su->name, sizeof(su->name),
1103 (*t)->dev_attr.attr.name, tg->base + i);
1106 sysfs_attr_init(&a2->dev_attr.attr);
1107 a2->dev_attr.attr.name = su->name;
1108 a2->nr = (*t)->u.s.nr + i;
1109 a2->index = (*t)->u.s.index;
1110 a2->dev_attr.attr.mode =
1111 (*t)->dev_attr.attr.mode;
1112 a2->dev_attr.show = (*t)->dev_attr.show;
1113 a2->dev_attr.store = (*t)->dev_attr.store;
1114 *attrs = &a2->dev_attr.attr;
1117 sysfs_attr_init(&a->dev_attr.attr);
1118 a->dev_attr.attr.name = su->name;
1119 a->index = (*t)->u.index + i;
1120 a->dev_attr.attr.mode =
1121 (*t)->dev_attr.attr.mode;
1122 a->dev_attr.show = (*t)->dev_attr.show;
1123 a->dev_attr.store = (*t)->dev_attr.store;
1124 *attrs = &a->dev_attr.attr;
1135 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1137 switch (data->kind) {
1139 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1140 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1141 reg == 0x111 || reg == 0x121 || reg == 0x131;
1143 return (((reg & 0xff00) == 0x100 ||
1144 (reg & 0xff00) == 0x200) &&
1145 ((reg & 0x00ff) == 0x50 ||
1146 (reg & 0x00ff) == 0x53 ||
1147 (reg & 0x00ff) == 0x55)) ||
1148 (reg & 0xfff0) == 0x630 ||
1149 reg == 0x640 || reg == 0x642 ||
1151 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1152 reg == 0x73 || reg == 0x75 || reg == 0x77;
1154 return (((reg & 0xff00) == 0x100 ||
1155 (reg & 0xff00) == 0x200) &&
1156 ((reg & 0x00ff) == 0x50 ||
1157 (reg & 0x00ff) == 0x53 ||
1158 (reg & 0x00ff) == 0x55)) ||
1159 (reg & 0xfff0) == 0x630 ||
1161 reg == 0x640 || reg == 0x642 ||
1162 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1163 reg == 0x73 || reg == 0x75 || reg == 0x77;
1169 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1170 ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1172 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1173 reg == 0x640 || reg == 0x642 ||
1174 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1175 reg == 0x7b || reg == 0x7d;
1181 * On older chips, only registers 0x50-0x5f are banked.
1182 * On more recent chips, all registers are banked.
1183 * Assume that is the case and set the bank number for each access.
1184 * Cache the bank number so it only needs to be set if it changes.
1186 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1190 if (data->bank != bank) {
1191 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1192 outb_p(bank, data->addr + DATA_REG_OFFSET);
1197 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1199 int res, word_sized = is_word_sized(data, reg);
1201 nct6775_set_bank(data, reg);
1202 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1203 res = inb_p(data->addr + DATA_REG_OFFSET);
1205 outb_p((reg & 0xff) + 1,
1206 data->addr + ADDR_REG_OFFSET);
1207 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1212 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1214 int word_sized = is_word_sized(data, reg);
1216 nct6775_set_bank(data, reg);
1217 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1219 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1220 outb_p((reg & 0xff) + 1,
1221 data->addr + ADDR_REG_OFFSET);
1223 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1227 /* We left-align 8-bit temperature values to make the code simpler */
1228 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1232 res = nct6775_read_value(data, reg);
1233 if (!is_word_sized(data, reg))
1239 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1241 if (!is_word_sized(data, reg))
1243 return nct6775_write_value(data, reg, value);
1246 /* This function assumes that the caller holds data->update_lock */
1247 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1253 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1254 | (data->fan_div[0] & 0x7);
1255 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1258 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1259 | ((data->fan_div[1] << 4) & 0x70);
1260 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1263 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1264 | (data->fan_div[2] & 0x7);
1265 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1268 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1269 | ((data->fan_div[3] << 4) & 0x70);
1270 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1275 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1277 if (data->kind == nct6775)
1278 nct6775_write_fan_div(data, nr);
1281 static void nct6775_update_fan_div(struct nct6775_data *data)
1285 i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1286 data->fan_div[0] = i & 0x7;
1287 data->fan_div[1] = (i & 0x70) >> 4;
1288 i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1289 data->fan_div[2] = i & 0x7;
1290 if (data->has_fan & (1 << 3))
1291 data->fan_div[3] = (i & 0x70) >> 4;
1294 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1296 if (data->kind == nct6775)
1297 nct6775_update_fan_div(data);
1300 static void nct6775_init_fan_div(struct nct6775_data *data)
1304 nct6775_update_fan_div_common(data);
1306 * For all fans, start with highest divider value if the divider
1307 * register is not initialized. This ensures that we get a
1308 * reading from the fan count register, even if it is not optimal.
1309 * We'll compute a better divider later on.
1311 for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1312 if (!(data->has_fan & (1 << i)))
1314 if (data->fan_div[i] == 0) {
1315 data->fan_div[i] = 7;
1316 nct6775_write_fan_div_common(data, i);
1321 static void nct6775_init_fan_common(struct device *dev,
1322 struct nct6775_data *data)
1327 if (data->has_fan_div)
1328 nct6775_init_fan_div(data);
1331 * If fan_min is not set (0), set it to 0xff to disable it. This
1332 * prevents the unnecessary warning when fanX_min is reported as 0.
1334 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1335 if (data->has_fan_min & (1 << i)) {
1336 reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1338 nct6775_write_value(data, data->REG_FAN_MIN[i],
1339 data->has_fan_div ? 0xff
1345 static void nct6775_select_fan_div(struct device *dev,
1346 struct nct6775_data *data, int nr, u16 reg)
1348 u8 fan_div = data->fan_div[nr];
1351 if (!data->has_fan_div)
1355 * If we failed to measure the fan speed, or the reported value is not
1356 * in the optimal range, and the clock divider can be modified,
1357 * let's try that for next time.
1359 if (reg == 0x00 && fan_div < 0x07)
1361 else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1364 if (fan_div != data->fan_div[nr]) {
1365 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1366 nr + 1, div_from_reg(data->fan_div[nr]),
1367 div_from_reg(fan_div));
1369 /* Preserve min limit if possible */
1370 if (data->has_fan_min & (1 << nr)) {
1371 fan_min = data->fan_min[nr];
1372 if (fan_div > data->fan_div[nr]) {
1373 if (fan_min != 255 && fan_min > 1)
1376 if (fan_min != 255) {
1382 if (fan_min != data->fan_min[nr]) {
1383 data->fan_min[nr] = fan_min;
1384 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1388 data->fan_div[nr] = fan_div;
1389 nct6775_write_fan_div_common(data, nr);
1393 static void nct6775_update_pwm(struct device *dev)
1395 struct nct6775_data *data = dev_get_drvdata(dev);
1397 int fanmodecfg, reg;
1400 for (i = 0; i < data->pwm_num; i++) {
1401 if (!(data->has_pwm & (1 << i)))
1404 duty_is_dc = data->REG_PWM_MODE[i] &&
1405 (nct6775_read_value(data, data->REG_PWM_MODE[i])
1406 & data->PWM_MODE_MASK[i]);
1407 data->pwm_mode[i] = duty_is_dc;
1409 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1410 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1411 if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1413 = nct6775_read_value(data,
1414 data->REG_PWM[j][i]);
1418 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1419 (fanmodecfg >> 4) & 7);
1421 if (!data->temp_tolerance[0][i] ||
1422 data->pwm_enable[i] != speed_cruise)
1423 data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1424 if (!data->target_speed_tolerance[i] ||
1425 data->pwm_enable[i] == speed_cruise) {
1426 u8 t = fanmodecfg & 0x0f;
1428 if (data->REG_TOLERANCE_H) {
1429 t |= (nct6775_read_value(data,
1430 data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1432 data->target_speed_tolerance[i] = t;
1435 data->temp_tolerance[1][i] =
1436 nct6775_read_value(data,
1437 data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1439 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1440 data->pwm_temp_sel[i] = reg & 0x1f;
1441 /* If fan can stop, report floor as 0 */
1443 data->pwm[2][i] = 0;
1445 if (!data->REG_WEIGHT_TEMP_SEL[i])
1448 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1449 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1450 /* If weight is disabled, report weight source as 0 */
1451 if (j == 1 && !(reg & 0x80))
1452 data->pwm_weight_temp_sel[i] = 0;
1454 /* Weight temp data */
1455 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1456 data->weight_temp[j][i]
1457 = nct6775_read_value(data,
1458 data->REG_WEIGHT_TEMP[j][i]);
1463 static void nct6775_update_pwm_limits(struct device *dev)
1465 struct nct6775_data *data = dev_get_drvdata(dev);
1470 for (i = 0; i < data->pwm_num; i++) {
1471 if (!(data->has_pwm & (1 << i)))
1474 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1475 data->fan_time[j][i] =
1476 nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1479 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1480 /* Update only in matching mode or if never updated */
1481 if (!data->target_temp[i] ||
1482 data->pwm_enable[i] == thermal_cruise)
1483 data->target_temp[i] = reg_t & data->target_temp_mask;
1484 if (!data->target_speed[i] ||
1485 data->pwm_enable[i] == speed_cruise) {
1486 if (data->REG_TOLERANCE_H) {
1487 reg_t |= (nct6775_read_value(data,
1488 data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1490 data->target_speed[i] = reg_t;
1493 for (j = 0; j < data->auto_pwm_num; j++) {
1494 data->auto_pwm[i][j] =
1495 nct6775_read_value(data,
1496 NCT6775_AUTO_PWM(data, i, j));
1497 data->auto_temp[i][j] =
1498 nct6775_read_value(data,
1499 NCT6775_AUTO_TEMP(data, i, j));
1502 /* critical auto_pwm temperature data */
1503 data->auto_temp[i][data->auto_pwm_num] =
1504 nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1506 switch (data->kind) {
1508 reg = nct6775_read_value(data,
1509 NCT6775_REG_CRITICAL_ENAB[i]);
1510 data->auto_pwm[i][data->auto_pwm_num] =
1511 (reg & 0x02) ? 0xff : 0x00;
1514 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1522 reg = nct6775_read_value(data,
1523 data->REG_CRITICAL_PWM_ENABLE[i]);
1524 if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1525 reg = nct6775_read_value(data,
1526 data->REG_CRITICAL_PWM[i]);
1529 data->auto_pwm[i][data->auto_pwm_num] = reg;
1535 static struct nct6775_data *nct6775_update_device(struct device *dev)
1537 struct nct6775_data *data = dev_get_drvdata(dev);
1540 mutex_lock(&data->update_lock);
1542 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1544 /* Fan clock dividers */
1545 nct6775_update_fan_div_common(data);
1547 /* Measured voltages and limits */
1548 for (i = 0; i < data->in_num; i++) {
1549 if (!(data->have_in & (1 << i)))
1552 data->in[i][0] = nct6775_read_value(data,
1554 data->in[i][1] = nct6775_read_value(data,
1555 data->REG_IN_MINMAX[0][i]);
1556 data->in[i][2] = nct6775_read_value(data,
1557 data->REG_IN_MINMAX[1][i]);
1560 /* Measured fan speeds and limits */
1561 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1564 if (!(data->has_fan & (1 << i)))
1567 reg = nct6775_read_value(data, data->REG_FAN[i]);
1568 data->rpm[i] = data->fan_from_reg(reg,
1571 if (data->has_fan_min & (1 << i))
1572 data->fan_min[i] = nct6775_read_value(data,
1573 data->REG_FAN_MIN[i]);
1574 data->fan_pulses[i] =
1575 (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1576 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1578 nct6775_select_fan_div(dev, data, i, reg);
1581 nct6775_update_pwm(dev);
1582 nct6775_update_pwm_limits(dev);
1584 /* Measured temperatures and limits */
1585 for (i = 0; i < NUM_TEMP; i++) {
1586 if (!(data->have_temp & (1 << i)))
1588 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1589 if (data->reg_temp[j][i])
1591 = nct6775_read_temp(data,
1592 data->reg_temp[j][i]);
1594 if (i >= NUM_TEMP_FIXED ||
1595 !(data->have_temp_fixed & (1 << i)))
1597 data->temp_offset[i]
1598 = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1602 for (i = 0; i < NUM_REG_ALARM; i++) {
1605 if (!data->REG_ALARM[i])
1607 alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1608 data->alarms |= ((u64)alarm) << (i << 3);
1612 for (i = 0; i < NUM_REG_BEEP; i++) {
1615 if (!data->REG_BEEP[i])
1617 beep = nct6775_read_value(data, data->REG_BEEP[i]);
1618 data->beeps |= ((u64)beep) << (i << 3);
1621 data->last_updated = jiffies;
1625 mutex_unlock(&data->update_lock);
1630 * Sysfs callback functions
1633 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1635 struct nct6775_data *data = nct6775_update_device(dev);
1636 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1637 int index = sattr->index;
1640 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1644 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1647 struct nct6775_data *data = dev_get_drvdata(dev);
1648 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1649 int index = sattr->index;
1654 err = kstrtoul(buf, 10, &val);
1657 mutex_lock(&data->update_lock);
1658 data->in[nr][index] = in_to_reg(val, nr);
1659 nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1660 data->in[nr][index]);
1661 mutex_unlock(&data->update_lock);
1666 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1668 struct nct6775_data *data = nct6775_update_device(dev);
1669 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1670 int nr = data->ALARM_BITS[sattr->index];
1672 return sprintf(buf, "%u\n",
1673 (unsigned int)((data->alarms >> nr) & 0x01));
1676 static int find_temp_source(struct nct6775_data *data, int index, int count)
1678 int source = data->temp_src[index];
1681 for (nr = 0; nr < count; nr++) {
1684 src = nct6775_read_value(data,
1685 data->REG_TEMP_SOURCE[nr]) & 0x1f;
1693 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1695 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1696 struct nct6775_data *data = nct6775_update_device(dev);
1697 unsigned int alarm = 0;
1701 * For temperatures, there is no fixed mapping from registers to alarm
1702 * bits. Alarm bits are determined by the temperature source mapping.
1704 nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1706 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1708 alarm = (data->alarms >> bit) & 0x01;
1710 return sprintf(buf, "%u\n", alarm);
1714 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1716 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1717 struct nct6775_data *data = nct6775_update_device(dev);
1718 int nr = data->BEEP_BITS[sattr->index];
1720 return sprintf(buf, "%u\n",
1721 (unsigned int)((data->beeps >> nr) & 0x01));
1725 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1728 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1729 struct nct6775_data *data = dev_get_drvdata(dev);
1730 int nr = data->BEEP_BITS[sattr->index];
1731 int regindex = nr >> 3;
1735 err = kstrtoul(buf, 10, &val);
1741 mutex_lock(&data->update_lock);
1743 data->beeps |= (1ULL << nr);
1745 data->beeps &= ~(1ULL << nr);
1746 nct6775_write_value(data, data->REG_BEEP[regindex],
1747 (data->beeps >> (regindex << 3)) & 0xff);
1748 mutex_unlock(&data->update_lock);
1753 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1755 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1756 struct nct6775_data *data = nct6775_update_device(dev);
1757 unsigned int beep = 0;
1761 * For temperatures, there is no fixed mapping from registers to beep
1762 * enable bits. Beep enable bits are determined by the temperature
1765 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1767 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1769 beep = (data->beeps >> bit) & 0x01;
1771 return sprintf(buf, "%u\n", beep);
1775 store_temp_beep(struct device *dev, struct device_attribute *attr,
1776 const char *buf, size_t count)
1778 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1779 struct nct6775_data *data = dev_get_drvdata(dev);
1780 int nr, bit, regindex;
1784 err = kstrtoul(buf, 10, &val);
1790 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1794 bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1795 regindex = bit >> 3;
1797 mutex_lock(&data->update_lock);
1799 data->beeps |= (1ULL << bit);
1801 data->beeps &= ~(1ULL << bit);
1802 nct6775_write_value(data, data->REG_BEEP[regindex],
1803 (data->beeps >> (regindex << 3)) & 0xff);
1804 mutex_unlock(&data->update_lock);
1809 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1810 struct attribute *attr, int index)
1812 struct device *dev = container_of(kobj, struct device, kobj);
1813 struct nct6775_data *data = dev_get_drvdata(dev);
1814 int in = index / 5; /* voltage index */
1816 if (!(data->have_in & (1 << in)))
1822 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1823 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1824 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1826 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1827 store_in_reg, 0, 1);
1828 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1829 store_in_reg, 0, 2);
1832 * nct6775_in_is_visible uses the index into the following array
1833 * to determine if attributes should be created or not.
1834 * Any change in order or content must be matched.
1836 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1837 &sensor_dev_template_in_input,
1838 &sensor_dev_template_in_alarm,
1839 &sensor_dev_template_in_beep,
1840 &sensor_dev_template_in_min,
1841 &sensor_dev_template_in_max,
1845 static const struct sensor_template_group nct6775_in_template_group = {
1846 .templates = nct6775_attributes_in_template,
1847 .is_visible = nct6775_in_is_visible,
1851 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1853 struct nct6775_data *data = nct6775_update_device(dev);
1854 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1855 int nr = sattr->index;
1857 return sprintf(buf, "%d\n", data->rpm[nr]);
1861 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1863 struct nct6775_data *data = nct6775_update_device(dev);
1864 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1865 int nr = sattr->index;
1867 return sprintf(buf, "%d\n",
1868 data->fan_from_reg_min(data->fan_min[nr],
1869 data->fan_div[nr]));
1873 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1875 struct nct6775_data *data = nct6775_update_device(dev);
1876 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1877 int nr = sattr->index;
1879 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1883 store_fan_min(struct device *dev, struct device_attribute *attr,
1884 const char *buf, size_t count)
1886 struct nct6775_data *data = dev_get_drvdata(dev);
1887 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1888 int nr = sattr->index;
1894 err = kstrtoul(buf, 10, &val);
1898 mutex_lock(&data->update_lock);
1899 if (!data->has_fan_div) {
1900 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1906 val = 1350000U / val;
1907 val = (val & 0x1f) | ((val << 3) & 0xff00);
1909 data->fan_min[nr] = val;
1910 goto write_min; /* Leave fan divider alone */
1913 /* No min limit, alarm disabled */
1914 data->fan_min[nr] = 255;
1915 new_div = data->fan_div[nr]; /* No change */
1916 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1919 reg = 1350000U / val;
1920 if (reg >= 128 * 255) {
1922 * Speed below this value cannot possibly be represented,
1923 * even with the highest divider (128)
1925 data->fan_min[nr] = 254;
1926 new_div = 7; /* 128 == (1 << 7) */
1928 "fan%u low limit %lu below minimum %u, set to minimum\n",
1929 nr + 1, val, data->fan_from_reg_min(254, 7));
1932 * Speed above this value cannot possibly be represented,
1933 * even with the lowest divider (1)
1935 data->fan_min[nr] = 1;
1936 new_div = 0; /* 1 == (1 << 0) */
1938 "fan%u low limit %lu above maximum %u, set to maximum\n",
1939 nr + 1, val, data->fan_from_reg_min(1, 0));
1942 * Automatically pick the best divider, i.e. the one such
1943 * that the min limit will correspond to a register value
1944 * in the 96..192 range
1947 while (reg > 192 && new_div < 7) {
1951 data->fan_min[nr] = reg;
1956 * Write both the fan clock divider (if it changed) and the new
1957 * fan min (unconditionally)
1959 if (new_div != data->fan_div[nr]) {
1960 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1961 nr + 1, div_from_reg(data->fan_div[nr]),
1962 div_from_reg(new_div));
1963 data->fan_div[nr] = new_div;
1964 nct6775_write_fan_div_common(data, nr);
1965 /* Give the chip time to sample a new speed value */
1966 data->last_updated = jiffies;
1970 nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1971 mutex_unlock(&data->update_lock);
1977 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1979 struct nct6775_data *data = nct6775_update_device(dev);
1980 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1981 int p = data->fan_pulses[sattr->index];
1983 return sprintf(buf, "%d\n", p ? : 4);
1987 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1988 const char *buf, size_t count)
1990 struct nct6775_data *data = dev_get_drvdata(dev);
1991 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1992 int nr = sattr->index;
1997 err = kstrtoul(buf, 10, &val);
2004 mutex_lock(&data->update_lock);
2005 data->fan_pulses[nr] = val & 3;
2006 reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
2007 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
2008 reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
2009 nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
2010 mutex_unlock(&data->update_lock);
2015 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
2016 struct attribute *attr, int index)
2018 struct device *dev = container_of(kobj, struct device, kobj);
2019 struct nct6775_data *data = dev_get_drvdata(dev);
2020 int fan = index / 6; /* fan index */
2021 int nr = index % 6; /* attribute index */
2023 if (!(data->has_fan & (1 << fan)))
2026 if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
2028 if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
2030 if (nr == 4 && !(data->has_fan_min & (1 << fan)))
2032 if (nr == 5 && data->kind != nct6775)
2038 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
2039 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
2041 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
2042 store_beep, FAN_ALARM_BASE);
2043 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
2044 store_fan_pulses, 0);
2045 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
2047 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
2050 * nct6775_fan_is_visible uses the index into the following array
2051 * to determine if attributes should be created or not.
2052 * Any change in order or content must be matched.
2054 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
2055 &sensor_dev_template_fan_input,
2056 &sensor_dev_template_fan_alarm, /* 1 */
2057 &sensor_dev_template_fan_beep, /* 2 */
2058 &sensor_dev_template_fan_pulses,
2059 &sensor_dev_template_fan_min, /* 4 */
2060 &sensor_dev_template_fan_div, /* 5 */
2064 static const struct sensor_template_group nct6775_fan_template_group = {
2065 .templates = nct6775_attributes_fan_template,
2066 .is_visible = nct6775_fan_is_visible,
2071 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
2073 struct nct6775_data *data = nct6775_update_device(dev);
2074 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2075 int nr = sattr->index;
2077 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
2081 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
2083 struct nct6775_data *data = nct6775_update_device(dev);
2084 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2086 int index = sattr->index;
2088 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
2092 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
2095 struct nct6775_data *data = dev_get_drvdata(dev);
2096 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2098 int index = sattr->index;
2102 err = kstrtol(buf, 10, &val);
2106 mutex_lock(&data->update_lock);
2107 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
2108 nct6775_write_temp(data, data->reg_temp[index][nr],
2109 data->temp[index][nr]);
2110 mutex_unlock(&data->update_lock);
2115 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2117 struct nct6775_data *data = nct6775_update_device(dev);
2118 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2120 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2124 store_temp_offset(struct device *dev, struct device_attribute *attr,
2125 const char *buf, size_t count)
2127 struct nct6775_data *data = dev_get_drvdata(dev);
2128 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2129 int nr = sattr->index;
2133 err = kstrtol(buf, 10, &val);
2137 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2139 mutex_lock(&data->update_lock);
2140 data->temp_offset[nr] = val;
2141 nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2142 mutex_unlock(&data->update_lock);
2148 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2150 struct nct6775_data *data = nct6775_update_device(dev);
2151 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2152 int nr = sattr->index;
2154 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2158 store_temp_type(struct device *dev, struct device_attribute *attr,
2159 const char *buf, size_t count)
2161 struct nct6775_data *data = nct6775_update_device(dev);
2162 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2163 int nr = sattr->index;
2166 u8 vbat, diode, vbit, dbit;
2168 err = kstrtoul(buf, 10, &val);
2172 if (val != 1 && val != 3 && val != 4)
2175 mutex_lock(&data->update_lock);
2177 data->temp_type[nr] = val;
2179 dbit = data->DIODE_MASK << nr;
2180 vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2181 diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2183 case 1: /* CPU diode (diode, current mode) */
2187 case 3: /* diode, voltage mode */
2190 case 4: /* thermistor */
2193 nct6775_write_value(data, data->REG_VBAT, vbat);
2194 nct6775_write_value(data, data->REG_DIODE, diode);
2196 mutex_unlock(&data->update_lock);
2200 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2201 struct attribute *attr, int index)
2203 struct device *dev = container_of(kobj, struct device, kobj);
2204 struct nct6775_data *data = dev_get_drvdata(dev);
2205 int temp = index / 10; /* temp index */
2206 int nr = index % 10; /* attribute index */
2208 if (!(data->have_temp & (1 << temp)))
2211 if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2212 return 0; /* alarm */
2214 if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2215 return 0; /* beep */
2217 if (nr == 4 && !data->reg_temp[1][temp]) /* max */
2220 if (nr == 5 && !data->reg_temp[2][temp]) /* max_hyst */
2223 if (nr == 6 && !data->reg_temp[3][temp]) /* crit */
2226 if (nr == 7 && !data->reg_temp[4][temp]) /* lcrit */
2229 /* offset and type only apply to fixed sensors */
2230 if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2236 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2237 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2238 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2240 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2241 show_temp, store_temp, 0, 2);
2242 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2244 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2246 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2247 show_temp_offset, store_temp_offset, 0);
2248 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2249 store_temp_type, 0);
2250 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2251 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2252 store_temp_beep, 0);
2255 * nct6775_temp_is_visible uses the index into the following array
2256 * to determine if attributes should be created or not.
2257 * Any change in order or content must be matched.
2259 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2260 &sensor_dev_template_temp_input,
2261 &sensor_dev_template_temp_label,
2262 &sensor_dev_template_temp_alarm, /* 2 */
2263 &sensor_dev_template_temp_beep, /* 3 */
2264 &sensor_dev_template_temp_max, /* 4 */
2265 &sensor_dev_template_temp_max_hyst, /* 5 */
2266 &sensor_dev_template_temp_crit, /* 6 */
2267 &sensor_dev_template_temp_lcrit, /* 7 */
2268 &sensor_dev_template_temp_offset, /* 8 */
2269 &sensor_dev_template_temp_type, /* 9 */
2273 static const struct sensor_template_group nct6775_temp_template_group = {
2274 .templates = nct6775_attributes_temp_template,
2275 .is_visible = nct6775_temp_is_visible,
2280 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2282 struct nct6775_data *data = nct6775_update_device(dev);
2283 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2285 return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2289 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2290 const char *buf, size_t count)
2292 struct nct6775_data *data = dev_get_drvdata(dev);
2293 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2294 int nr = sattr->index;
2299 err = kstrtoul(buf, 10, &val);
2306 /* Setting DC mode is not supported for all chips/channels */
2307 if (data->REG_PWM_MODE[nr] == 0) {
2313 mutex_lock(&data->update_lock);
2314 data->pwm_mode[nr] = val;
2315 reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2316 reg &= ~data->PWM_MODE_MASK[nr];
2318 reg |= data->PWM_MODE_MASK[nr];
2319 nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2320 mutex_unlock(&data->update_lock);
2325 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2327 struct nct6775_data *data = nct6775_update_device(dev);
2328 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2330 int index = sattr->index;
2334 * For automatic fan control modes, show current pwm readings.
2335 * Otherwise, show the configured value.
2337 if (index == 0 && data->pwm_enable[nr] > manual)
2338 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2340 pwm = data->pwm[index][nr];
2342 return sprintf(buf, "%d\n", pwm);
2346 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2349 struct nct6775_data *data = dev_get_drvdata(dev);
2350 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2352 int index = sattr->index;
2354 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2356 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2360 err = kstrtoul(buf, 10, &val);
2363 val = clamp_val(val, minval[index], maxval[index]);
2365 mutex_lock(&data->update_lock);
2366 data->pwm[index][nr] = val;
2367 nct6775_write_value(data, data->REG_PWM[index][nr], val);
2368 if (index == 2) { /* floor: disable if val == 0 */
2369 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2373 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2375 mutex_unlock(&data->update_lock);
2379 /* Returns 0 if OK, -EINVAL otherwise */
2380 static int check_trip_points(struct nct6775_data *data, int nr)
2384 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2385 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2388 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2389 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2392 /* validate critical temperature and pwm if enabled (pwm > 0) */
2393 if (data->auto_pwm[nr][data->auto_pwm_num]) {
2394 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2395 data->auto_temp[nr][data->auto_pwm_num] ||
2396 data->auto_pwm[nr][data->auto_pwm_num - 1] >
2397 data->auto_pwm[nr][data->auto_pwm_num])
2403 static void pwm_update_registers(struct nct6775_data *data, int nr)
2407 switch (data->pwm_enable[nr]) {
2412 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2413 reg = (reg & ~data->tolerance_mask) |
2414 (data->target_speed_tolerance[nr] & data->tolerance_mask);
2415 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2416 nct6775_write_value(data, data->REG_TARGET[nr],
2417 data->target_speed[nr] & 0xff);
2418 if (data->REG_TOLERANCE_H) {
2419 reg = (data->target_speed[nr] >> 8) & 0x0f;
2420 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2421 nct6775_write_value(data,
2422 data->REG_TOLERANCE_H[nr],
2426 case thermal_cruise:
2427 nct6775_write_value(data, data->REG_TARGET[nr],
2428 data->target_temp[nr]);
2431 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2432 reg = (reg & ~data->tolerance_mask) |
2433 data->temp_tolerance[0][nr];
2434 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2440 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2442 struct nct6775_data *data = nct6775_update_device(dev);
2443 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2445 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2449 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2450 const char *buf, size_t count)
2452 struct nct6775_data *data = dev_get_drvdata(dev);
2453 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2454 int nr = sattr->index;
2459 err = kstrtoul(buf, 10, &val);
2466 if (val == sf3 && data->kind != nct6775)
2469 if (val == sf4 && check_trip_points(data, nr)) {
2470 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2471 dev_err(dev, "Adjust trip points and try again\n");
2475 mutex_lock(&data->update_lock);
2476 data->pwm_enable[nr] = val;
2479 * turn off pwm control: select manual mode, set pwm to maximum
2481 data->pwm[0][nr] = 255;
2482 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2484 pwm_update_registers(data, nr);
2485 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2487 reg |= pwm_enable_to_reg(val) << 4;
2488 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2489 mutex_unlock(&data->update_lock);
2494 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2498 for (i = 0; i < NUM_TEMP; i++) {
2499 if (!(data->have_temp & (1 << i)))
2501 if (src == data->temp_src[i]) {
2507 return sprintf(buf, "%d\n", sel);
2511 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2513 struct nct6775_data *data = nct6775_update_device(dev);
2514 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2515 int index = sattr->index;
2517 return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2521 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2522 const char *buf, size_t count)
2524 struct nct6775_data *data = nct6775_update_device(dev);
2525 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2526 int nr = sattr->index;
2530 err = kstrtoul(buf, 10, &val);
2533 if (val == 0 || val > NUM_TEMP)
2535 if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2538 mutex_lock(&data->update_lock);
2539 src = data->temp_src[val - 1];
2540 data->pwm_temp_sel[nr] = src;
2541 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2544 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2545 mutex_unlock(&data->update_lock);
2551 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2554 struct nct6775_data *data = nct6775_update_device(dev);
2555 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2556 int index = sattr->index;
2558 return show_pwm_temp_sel_common(data, buf,
2559 data->pwm_weight_temp_sel[index]);
2563 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2564 const char *buf, size_t count)
2566 struct nct6775_data *data = nct6775_update_device(dev);
2567 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2568 int nr = sattr->index;
2572 err = kstrtoul(buf, 10, &val);
2577 if (val && (!(data->have_temp & (1 << (val - 1))) ||
2578 !data->temp_src[val - 1]))
2581 mutex_lock(&data->update_lock);
2583 src = data->temp_src[val - 1];
2584 data->pwm_weight_temp_sel[nr] = src;
2585 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2587 reg |= (src | 0x80);
2588 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2590 data->pwm_weight_temp_sel[nr] = 0;
2591 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2593 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2595 mutex_unlock(&data->update_lock);
2601 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2603 struct nct6775_data *data = nct6775_update_device(dev);
2604 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2606 return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2610 store_target_temp(struct device *dev, struct device_attribute *attr,
2611 const char *buf, size_t count)
2613 struct nct6775_data *data = dev_get_drvdata(dev);
2614 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2615 int nr = sattr->index;
2619 err = kstrtoul(buf, 10, &val);
2623 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2624 data->target_temp_mask);
2626 mutex_lock(&data->update_lock);
2627 data->target_temp[nr] = val;
2628 pwm_update_registers(data, nr);
2629 mutex_unlock(&data->update_lock);
2634 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2636 struct nct6775_data *data = nct6775_update_device(dev);
2637 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2638 int nr = sattr->index;
2640 return sprintf(buf, "%d\n",
2641 fan_from_reg16(data->target_speed[nr],
2642 data->fan_div[nr]));
2646 store_target_speed(struct device *dev, struct device_attribute *attr,
2647 const char *buf, size_t count)
2649 struct nct6775_data *data = dev_get_drvdata(dev);
2650 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2651 int nr = sattr->index;
2656 err = kstrtoul(buf, 10, &val);
2660 val = clamp_val(val, 0, 1350000U);
2661 speed = fan_to_reg(val, data->fan_div[nr]);
2663 mutex_lock(&data->update_lock);
2664 data->target_speed[nr] = speed;
2665 pwm_update_registers(data, nr);
2666 mutex_unlock(&data->update_lock);
2671 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2674 struct nct6775_data *data = nct6775_update_device(dev);
2675 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2677 int index = sattr->index;
2679 return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2683 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2684 const char *buf, size_t count)
2686 struct nct6775_data *data = dev_get_drvdata(dev);
2687 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2689 int index = sattr->index;
2693 err = kstrtoul(buf, 10, &val);
2697 /* Limit tolerance as needed */
2698 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2700 mutex_lock(&data->update_lock);
2701 data->temp_tolerance[index][nr] = val;
2703 pwm_update_registers(data, nr);
2705 nct6775_write_value(data,
2706 data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2708 mutex_unlock(&data->update_lock);
2713 * Fan speed tolerance is a tricky beast, since the associated register is
2714 * a tick counter, but the value is reported and configured as rpm.
2715 * Compute resulting low and high rpm values and report the difference.
2718 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2721 struct nct6775_data *data = nct6775_update_device(dev);
2722 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2723 int nr = sattr->index;
2724 int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2725 int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2735 tolerance = (fan_from_reg16(low, data->fan_div[nr])
2736 - fan_from_reg16(high, data->fan_div[nr])) / 2;
2738 return sprintf(buf, "%d\n", tolerance);
2742 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2743 const char *buf, size_t count)
2745 struct nct6775_data *data = dev_get_drvdata(dev);
2746 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2747 int nr = sattr->index;
2752 err = kstrtoul(buf, 10, &val);
2756 high = fan_from_reg16(data->target_speed[nr],
2757 data->fan_div[nr]) + val;
2758 low = fan_from_reg16(data->target_speed[nr],
2759 data->fan_div[nr]) - val;
2765 val = (fan_to_reg(low, data->fan_div[nr]) -
2766 fan_to_reg(high, data->fan_div[nr])) / 2;
2768 /* Limit tolerance as needed */
2769 val = clamp_val(val, 0, data->speed_tolerance_limit);
2771 mutex_lock(&data->update_lock);
2772 data->target_speed_tolerance[nr] = val;
2773 pwm_update_registers(data, nr);
2774 mutex_unlock(&data->update_lock);
2778 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2779 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2781 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2782 store_pwm_enable, 0);
2783 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2784 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2785 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2786 show_target_temp, store_target_temp, 0);
2787 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2788 show_target_speed, store_target_speed, 0);
2789 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2790 show_speed_tolerance, store_speed_tolerance, 0);
2792 /* Smart Fan registers */
2795 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2797 struct nct6775_data *data = nct6775_update_device(dev);
2798 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2800 int index = sattr->index;
2802 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2806 store_weight_temp(struct device *dev, struct device_attribute *attr,
2807 const char *buf, size_t count)
2809 struct nct6775_data *data = dev_get_drvdata(dev);
2810 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2812 int index = sattr->index;
2816 err = kstrtoul(buf, 10, &val);
2820 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2822 mutex_lock(&data->update_lock);
2823 data->weight_temp[index][nr] = val;
2824 nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2825 mutex_unlock(&data->update_lock);
2829 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2830 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2831 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2832 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2833 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2834 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2835 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2836 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2837 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2838 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2839 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2840 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2843 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2845 struct nct6775_data *data = nct6775_update_device(dev);
2846 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2848 int index = sattr->index;
2850 return sprintf(buf, "%d\n",
2851 step_time_from_reg(data->fan_time[index][nr],
2852 data->pwm_mode[nr]));
2856 store_fan_time(struct device *dev, struct device_attribute *attr,
2857 const char *buf, size_t count)
2859 struct nct6775_data *data = dev_get_drvdata(dev);
2860 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2862 int index = sattr->index;
2866 err = kstrtoul(buf, 10, &val);
2870 val = step_time_to_reg(val, data->pwm_mode[nr]);
2871 mutex_lock(&data->update_lock);
2872 data->fan_time[index][nr] = val;
2873 nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2874 mutex_unlock(&data->update_lock);
2878 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
2880 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2882 struct nct6775_data *data = dev_get_drvdata(dev);
2884 return sprintf(buf, "%s\n", data->name);
2887 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2891 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2893 struct nct6775_data *data = nct6775_update_device(dev);
2894 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2896 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2900 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2901 const char *buf, size_t count)
2903 struct nct6775_data *data = dev_get_drvdata(dev);
2904 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2906 int point = sattr->index;
2911 err = kstrtoul(buf, 10, &val);
2917 if (point == data->auto_pwm_num) {
2918 if (data->kind != nct6775 && !val)
2920 if (data->kind != nct6779 && val)
2924 mutex_lock(&data->update_lock);
2925 data->auto_pwm[nr][point] = val;
2926 if (point < data->auto_pwm_num) {
2927 nct6775_write_value(data,
2928 NCT6775_AUTO_PWM(data, nr, point),
2929 data->auto_pwm[nr][point]);
2931 switch (data->kind) {
2933 /* disable if needed (pwm == 0) */
2934 reg = nct6775_read_value(data,
2935 NCT6775_REG_CRITICAL_ENAB[nr]);
2940 nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2944 break; /* always enabled, nothing to do */
2951 nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2953 reg = nct6775_read_value(data,
2954 data->REG_CRITICAL_PWM_ENABLE[nr]);
2956 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2958 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2959 nct6775_write_value(data,
2960 data->REG_CRITICAL_PWM_ENABLE[nr],
2965 mutex_unlock(&data->update_lock);
2970 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2972 struct nct6775_data *data = nct6775_update_device(dev);
2973 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2975 int point = sattr->index;
2978 * We don't know for sure if the temperature is signed or unsigned.
2979 * Assume it is unsigned.
2981 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2985 store_auto_temp(struct device *dev, struct device_attribute *attr,
2986 const char *buf, size_t count)
2988 struct nct6775_data *data = dev_get_drvdata(dev);
2989 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2991 int point = sattr->index;
2995 err = kstrtoul(buf, 10, &val);
3001 mutex_lock(&data->update_lock);
3002 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
3003 if (point < data->auto_pwm_num) {
3004 nct6775_write_value(data,
3005 NCT6775_AUTO_TEMP(data, nr, point),
3006 data->auto_temp[nr][point]);
3008 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
3009 data->auto_temp[nr][point]);
3011 mutex_unlock(&data->update_lock);
3015 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
3016 struct attribute *attr, int index)
3018 struct device *dev = container_of(kobj, struct device, kobj);
3019 struct nct6775_data *data = dev_get_drvdata(dev);
3020 int pwm = index / 36; /* pwm index */
3021 int nr = index % 36; /* attribute index */
3023 if (!(data->has_pwm & (1 << pwm)))
3026 if ((nr >= 14 && nr <= 18) || nr == 21) /* weight */
3027 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
3029 if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
3031 if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
3033 if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
3036 if (nr >= 22 && nr <= 35) { /* auto point */
3037 int api = (nr - 22) / 2; /* auto point index */
3039 if (api > data->auto_pwm_num)
3045 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
3046 show_fan_time, store_fan_time, 0, 0);
3047 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
3048 show_fan_time, store_fan_time, 0, 1);
3049 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
3050 show_fan_time, store_fan_time, 0, 2);
3051 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
3053 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
3055 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
3056 show_temp_tolerance, store_temp_tolerance, 0, 0);
3057 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
3058 S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
3061 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
3064 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
3067 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
3068 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
3069 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
3070 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
3072 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
3073 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
3074 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
3075 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
3077 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
3078 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
3079 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
3080 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
3082 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
3083 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
3084 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
3085 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
3087 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
3088 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
3089 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
3090 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
3092 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
3093 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
3094 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
3095 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
3097 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
3098 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
3099 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
3100 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
3103 * nct6775_pwm_is_visible uses the index into the following array
3104 * to determine if attributes should be created or not.
3105 * Any change in order or content must be matched.
3107 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
3108 &sensor_dev_template_pwm,
3109 &sensor_dev_template_pwm_mode,
3110 &sensor_dev_template_pwm_enable,
3111 &sensor_dev_template_pwm_temp_sel,
3112 &sensor_dev_template_pwm_temp_tolerance,
3113 &sensor_dev_template_pwm_crit_temp_tolerance,
3114 &sensor_dev_template_pwm_target_temp,
3115 &sensor_dev_template_fan_target,
3116 &sensor_dev_template_fan_tolerance,
3117 &sensor_dev_template_pwm_stop_time,
3118 &sensor_dev_template_pwm_step_up_time,
3119 &sensor_dev_template_pwm_step_down_time,
3120 &sensor_dev_template_pwm_start,
3121 &sensor_dev_template_pwm_floor,
3122 &sensor_dev_template_pwm_weight_temp_sel, /* 14 */
3123 &sensor_dev_template_pwm_weight_temp_step,
3124 &sensor_dev_template_pwm_weight_temp_step_tol,
3125 &sensor_dev_template_pwm_weight_temp_step_base,
3126 &sensor_dev_template_pwm_weight_duty_step, /* 18 */
3127 &sensor_dev_template_pwm_max, /* 19 */
3128 &sensor_dev_template_pwm_step, /* 20 */
3129 &sensor_dev_template_pwm_weight_duty_base, /* 21 */
3130 &sensor_dev_template_pwm_auto_point1_pwm, /* 22 */
3131 &sensor_dev_template_pwm_auto_point1_temp,
3132 &sensor_dev_template_pwm_auto_point2_pwm,
3133 &sensor_dev_template_pwm_auto_point2_temp,
3134 &sensor_dev_template_pwm_auto_point3_pwm,
3135 &sensor_dev_template_pwm_auto_point3_temp,
3136 &sensor_dev_template_pwm_auto_point4_pwm,
3137 &sensor_dev_template_pwm_auto_point4_temp,
3138 &sensor_dev_template_pwm_auto_point5_pwm,
3139 &sensor_dev_template_pwm_auto_point5_temp,
3140 &sensor_dev_template_pwm_auto_point6_pwm,
3141 &sensor_dev_template_pwm_auto_point6_temp,
3142 &sensor_dev_template_pwm_auto_point7_pwm,
3143 &sensor_dev_template_pwm_auto_point7_temp, /* 35 */
3148 static const struct sensor_template_group nct6775_pwm_template_group = {
3149 .templates = nct6775_attributes_pwm_template,
3150 .is_visible = nct6775_pwm_is_visible,
3155 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3157 struct nct6775_data *data = dev_get_drvdata(dev);
3159 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3162 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3164 /* Case open detection */
3167 clear_caseopen(struct device *dev, struct device_attribute *attr,
3168 const char *buf, size_t count)
3170 struct nct6775_data *data = dev_get_drvdata(dev);
3171 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3176 if (kstrtoul(buf, 10, &val) || val != 0)
3179 mutex_lock(&data->update_lock);
3182 * Use CR registers to clear caseopen status.
3183 * The CR registers are the same for all chips, and not all chips
3184 * support clearing the caseopen status through "regular" registers.
3186 ret = superio_enter(data->sioreg);
3192 superio_select(data->sioreg, NCT6775_LD_ACPI);
3193 reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3194 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3195 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3196 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3197 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3198 superio_exit(data->sioreg);
3200 data->valid = false; /* Force cache refresh */
3202 mutex_unlock(&data->update_lock);
3206 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3207 clear_caseopen, INTRUSION_ALARM_BASE);
3208 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3209 clear_caseopen, INTRUSION_ALARM_BASE + 1);
3210 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3211 store_beep, INTRUSION_ALARM_BASE);
3212 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3213 store_beep, INTRUSION_ALARM_BASE + 1);
3214 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3215 store_beep, BEEP_ENABLE_BASE);
3217 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3218 struct attribute *attr, int index)
3220 struct device *dev = container_of(kobj, struct device, kobj);
3221 struct nct6775_data *data = dev_get_drvdata(dev);
3223 if (index == 0 && !data->have_vid)
3226 if (index == 1 || index == 2) {
3227 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3231 if (index == 3 || index == 4) {
3232 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3240 * nct6775_other_is_visible uses the index into the following array
3241 * to determine if attributes should be created or not.
3242 * Any change in order or content must be matched.
3244 static struct attribute *nct6775_attributes_other[] = {
3245 &dev_attr_cpu0_vid.attr, /* 0 */
3246 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr, /* 1 */
3247 &sensor_dev_attr_intrusion1_alarm.dev_attr.attr, /* 2 */
3248 &sensor_dev_attr_intrusion0_beep.dev_attr.attr, /* 3 */
3249 &sensor_dev_attr_intrusion1_beep.dev_attr.attr, /* 4 */
3250 &sensor_dev_attr_beep_enable.dev_attr.attr, /* 5 */
3251 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3252 &dev_attr_name.attr,
3257 static const struct attribute_group nct6775_group_other = {
3258 .attrs = nct6775_attributes_other,
3259 .is_visible = nct6775_other_is_visible,
3262 static inline void nct6775_init_device(struct nct6775_data *data)
3267 /* Start monitoring if needed */
3268 if (data->REG_CONFIG) {
3269 tmp = nct6775_read_value(data, data->REG_CONFIG);
3271 nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3274 /* Enable temperature sensors if needed */
3275 for (i = 0; i < NUM_TEMP; i++) {
3276 if (!(data->have_temp & (1 << i)))
3278 if (!data->reg_temp_config[i])
3280 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3282 nct6775_write_value(data, data->reg_temp_config[i],
3286 /* Enable VBAT monitoring if needed */
3287 tmp = nct6775_read_value(data, data->REG_VBAT);
3289 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3291 diode = nct6775_read_value(data, data->REG_DIODE);
3293 for (i = 0; i < data->temp_fixed_num; i++) {
3294 if (!(data->have_temp_fixed & (1 << i)))
3296 if ((tmp & (data->DIODE_MASK << i))) /* diode */
3298 = 3 - ((diode >> i) & data->DIODE_MASK);
3299 else /* thermistor */
3300 data->temp_type[i] = 4;
3305 nct6775_check_fan_inputs(struct nct6775_data *data)
3307 bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3308 bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3309 int sioreg = data->sioreg;
3312 /* Store SIO_REG_ENABLE for use during resume */
3313 superio_select(sioreg, NCT6775_LD_HWM);
3314 data->sio_reg_enable = superio_inb(sioreg, SIO_REG_ENABLE);
3316 /* fan4 and fan5 share some pins with the GPIO and serial flash */
3317 if (data->kind == nct6775) {
3318 regval = superio_inb(sioreg, 0x2c);
3320 fan3pin = regval & (1 << 6);
3321 pwm3pin = regval & (1 << 7);
3323 /* On NCT6775, fan4 shares pins with the fdc interface */
3324 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3331 } else if (data->kind == nct6776) {
3332 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3333 const char *board_vendor, *board_name;
3335 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
3336 board_name = dmi_get_system_info(DMI_BOARD_NAME);
3338 if (board_name && board_vendor &&
3339 !strcmp(board_vendor, "ASRock")) {
3341 * Auxiliary fan monitoring is not enabled on ASRock
3342 * Z77 Pro4-M if booted in UEFI Ultra-FastBoot mode.
3343 * Observed with BIOS version 2.00.
3345 if (!strcmp(board_name, "Z77 Pro4-M")) {
3346 if ((data->sio_reg_enable & 0xe0) != 0xe0) {
3347 data->sio_reg_enable |= 0xe0;
3348 superio_outb(sioreg, SIO_REG_ENABLE,
3349 data->sio_reg_enable);
3354 if (data->sio_reg_enable & 0x80)
3357 fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3359 if (data->sio_reg_enable & 0x40)
3362 fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3364 if (data->sio_reg_enable & 0x20)
3367 fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3375 } else if (data->kind == nct6106) {
3376 regval = superio_inb(sioreg, 0x24);
3377 fan3pin = !(regval & 0x80);
3378 pwm3pin = regval & 0x08;
3387 } else { /* NCT6779D, NCT6791D, NCT6792D, NCT6793D, NCT6795D */
3388 regval = superio_inb(sioreg, 0x1c);
3390 fan3pin = !(regval & (1 << 5));
3391 fan4pin = !(regval & (1 << 6));
3392 fan5pin = !(regval & (1 << 7));
3394 pwm3pin = !(regval & (1 << 0));
3395 pwm4pin = !(regval & (1 << 1));
3396 pwm5pin = !(regval & (1 << 2));
3400 if (data->kind == nct6791 || data->kind == nct6792 ||
3401 data->kind == nct6793 || data->kind == nct6795) {
3402 regval = superio_inb(sioreg, 0x2d);
3403 fan6pin = (regval & (1 << 1));
3404 pwm6pin = (regval & (1 << 0));
3405 } else { /* NCT6779D */
3411 /* fan 1 and 2 (0x03) are always present */
3412 data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3413 (fan5pin << 4) | (fan6pin << 5);
3414 data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3416 data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3417 (pwm5pin << 4) | (pwm6pin << 5);
3420 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3421 int *available, int *mask)
3426 for (i = 0; i < data->pwm_num && *available; i++) {
3431 src = nct6775_read_value(data, regp[i]);
3433 if (!src || (*mask & (1 << src)))
3435 if (src >= data->temp_label_num ||
3436 !strlen(data->temp_label[src]))
3439 index = __ffs(*available);
3440 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3441 *available &= ~(1 << index);
3446 static int nct6775_probe(struct platform_device *pdev)
3448 struct device *dev = &pdev->dev;
3449 struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
3450 struct nct6775_data *data;
3451 struct resource *res;
3453 int src, mask, available;
3454 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3455 const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3456 const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3457 int num_reg_temp, num_reg_temp_mon;
3459 struct attribute_group *group;
3460 struct device *hwmon_dev;
3461 int num_attr_groups = 0;
3463 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3464 if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3468 data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3473 data->kind = sio_data->kind;
3474 data->sioreg = sio_data->sioreg;
3475 data->addr = res->start;
3476 mutex_init(&data->update_lock);
3477 data->name = nct6775_device_names[data->kind];
3478 data->bank = 0xff; /* Force initial bank selection */
3479 platform_set_drvdata(pdev, data);
3481 switch (data->kind) {
3485 data->auto_pwm_num = 4;
3486 data->temp_fixed_num = 3;
3487 data->num_temp_alarms = 6;
3488 data->num_temp_beeps = 6;
3490 data->fan_from_reg = fan_from_reg13;
3491 data->fan_from_reg_min = fan_from_reg13;
3493 data->temp_label = nct6776_temp_label;
3494 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3496 data->REG_VBAT = NCT6106_REG_VBAT;
3497 data->REG_DIODE = NCT6106_REG_DIODE;
3498 data->DIODE_MASK = NCT6106_DIODE_MASK;
3499 data->REG_VIN = NCT6106_REG_IN;
3500 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3501 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3502 data->REG_TARGET = NCT6106_REG_TARGET;
3503 data->REG_FAN = NCT6106_REG_FAN;
3504 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3505 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3506 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3507 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3508 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3509 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3510 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3511 data->REG_PWM[0] = NCT6106_REG_PWM;
3512 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3513 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3514 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3515 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3516 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3517 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3518 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3519 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3520 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3521 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3522 data->REG_CRITICAL_TEMP_TOLERANCE
3523 = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3524 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3525 data->CRITICAL_PWM_ENABLE_MASK
3526 = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3527 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3528 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3529 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3530 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3531 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3532 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3533 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3534 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3535 data->REG_ALARM = NCT6106_REG_ALARM;
3536 data->ALARM_BITS = NCT6106_ALARM_BITS;
3537 data->REG_BEEP = NCT6106_REG_BEEP;
3538 data->BEEP_BITS = NCT6106_BEEP_BITS;
3540 reg_temp = NCT6106_REG_TEMP;
3541 reg_temp_mon = NCT6106_REG_TEMP_MON;
3542 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3543 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3544 reg_temp_over = NCT6106_REG_TEMP_OVER;
3545 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3546 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3547 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3548 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3549 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3550 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3556 data->auto_pwm_num = 6;
3557 data->has_fan_div = true;
3558 data->temp_fixed_num = 3;
3559 data->num_temp_alarms = 3;
3560 data->num_temp_beeps = 3;
3562 data->ALARM_BITS = NCT6775_ALARM_BITS;
3563 data->BEEP_BITS = NCT6775_BEEP_BITS;
3565 data->fan_from_reg = fan_from_reg16;
3566 data->fan_from_reg_min = fan_from_reg8;
3567 data->target_temp_mask = 0x7f;
3568 data->tolerance_mask = 0x0f;
3569 data->speed_tolerance_limit = 15;
3571 data->temp_label = nct6775_temp_label;
3572 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3574 data->REG_CONFIG = NCT6775_REG_CONFIG;
3575 data->REG_VBAT = NCT6775_REG_VBAT;
3576 data->REG_DIODE = NCT6775_REG_DIODE;
3577 data->DIODE_MASK = NCT6775_DIODE_MASK;
3578 data->REG_VIN = NCT6775_REG_IN;
3579 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3580 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3581 data->REG_TARGET = NCT6775_REG_TARGET;
3582 data->REG_FAN = NCT6775_REG_FAN;
3583 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3584 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3585 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3586 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3587 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3588 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3589 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3590 data->REG_PWM[0] = NCT6775_REG_PWM;
3591 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3592 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3593 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3594 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3595 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3596 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3597 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3598 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3599 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3600 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3601 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3602 data->REG_CRITICAL_TEMP_TOLERANCE
3603 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3604 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3605 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3606 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3607 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3608 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3609 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3610 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3611 data->REG_ALARM = NCT6775_REG_ALARM;
3612 data->REG_BEEP = NCT6775_REG_BEEP;
3614 reg_temp = NCT6775_REG_TEMP;
3615 reg_temp_mon = NCT6775_REG_TEMP_MON;
3616 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3617 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3618 reg_temp_over = NCT6775_REG_TEMP_OVER;
3619 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3620 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3621 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3622 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3628 data->auto_pwm_num = 4;
3629 data->has_fan_div = false;
3630 data->temp_fixed_num = 3;
3631 data->num_temp_alarms = 3;
3632 data->num_temp_beeps = 6;
3634 data->ALARM_BITS = NCT6776_ALARM_BITS;
3635 data->BEEP_BITS = NCT6776_BEEP_BITS;
3637 data->fan_from_reg = fan_from_reg13;
3638 data->fan_from_reg_min = fan_from_reg13;
3639 data->target_temp_mask = 0xff;
3640 data->tolerance_mask = 0x07;
3641 data->speed_tolerance_limit = 63;
3643 data->temp_label = nct6776_temp_label;
3644 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3646 data->REG_CONFIG = NCT6775_REG_CONFIG;
3647 data->REG_VBAT = NCT6775_REG_VBAT;
3648 data->REG_DIODE = NCT6775_REG_DIODE;
3649 data->DIODE_MASK = NCT6775_DIODE_MASK;
3650 data->REG_VIN = NCT6775_REG_IN;
3651 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3652 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3653 data->REG_TARGET = NCT6775_REG_TARGET;
3654 data->REG_FAN = NCT6775_REG_FAN;
3655 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3656 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3657 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3658 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3659 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3660 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3661 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3662 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3663 data->REG_PWM[0] = NCT6775_REG_PWM;
3664 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3665 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3666 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3667 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3668 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3669 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3670 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3671 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3672 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3673 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3674 data->REG_CRITICAL_TEMP_TOLERANCE
3675 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3676 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3677 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3678 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3679 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3680 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3681 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3682 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3683 data->REG_ALARM = NCT6775_REG_ALARM;
3684 data->REG_BEEP = NCT6776_REG_BEEP;
3686 reg_temp = NCT6775_REG_TEMP;
3687 reg_temp_mon = NCT6775_REG_TEMP_MON;
3688 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3689 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3690 reg_temp_over = NCT6775_REG_TEMP_OVER;
3691 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3692 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3693 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3694 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3700 data->auto_pwm_num = 4;
3701 data->has_fan_div = false;
3702 data->temp_fixed_num = 6;
3703 data->num_temp_alarms = 2;
3704 data->num_temp_beeps = 2;
3706 data->ALARM_BITS = NCT6779_ALARM_BITS;
3707 data->BEEP_BITS = NCT6779_BEEP_BITS;
3709 data->fan_from_reg = fan_from_reg13;
3710 data->fan_from_reg_min = fan_from_reg13;
3711 data->target_temp_mask = 0xff;
3712 data->tolerance_mask = 0x07;
3713 data->speed_tolerance_limit = 63;
3715 data->temp_label = nct6779_temp_label;
3716 data->temp_label_num = NCT6779_NUM_LABELS;
3718 data->REG_CONFIG = NCT6775_REG_CONFIG;
3719 data->REG_VBAT = NCT6775_REG_VBAT;
3720 data->REG_DIODE = NCT6775_REG_DIODE;
3721 data->DIODE_MASK = NCT6775_DIODE_MASK;
3722 data->REG_VIN = NCT6779_REG_IN;
3723 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3724 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3725 data->REG_TARGET = NCT6775_REG_TARGET;
3726 data->REG_FAN = NCT6779_REG_FAN;
3727 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3728 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3729 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3730 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3731 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3732 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3733 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3734 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3735 data->REG_PWM[0] = NCT6775_REG_PWM;
3736 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3737 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3738 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3739 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3740 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3741 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3742 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3743 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3744 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3745 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3746 data->REG_CRITICAL_TEMP_TOLERANCE
3747 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3748 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3749 data->CRITICAL_PWM_ENABLE_MASK
3750 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3751 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3752 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3753 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3754 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3755 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3756 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3757 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3758 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3759 data->REG_ALARM = NCT6779_REG_ALARM;
3760 data->REG_BEEP = NCT6776_REG_BEEP;
3762 reg_temp = NCT6779_REG_TEMP;
3763 reg_temp_mon = NCT6779_REG_TEMP_MON;
3764 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3765 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3766 reg_temp_over = NCT6779_REG_TEMP_OVER;
3767 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3768 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3769 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3770 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3779 data->auto_pwm_num = 4;
3780 data->has_fan_div = false;
3781 data->temp_fixed_num = 6;
3782 data->num_temp_alarms = 2;
3783 data->num_temp_beeps = 2;
3785 data->ALARM_BITS = NCT6791_ALARM_BITS;
3786 data->BEEP_BITS = NCT6779_BEEP_BITS;
3788 data->fan_from_reg = fan_from_reg13;
3789 data->fan_from_reg_min = fan_from_reg13;
3790 data->target_temp_mask = 0xff;
3791 data->tolerance_mask = 0x07;
3792 data->speed_tolerance_limit = 63;
3794 switch (data->kind) {
3797 data->temp_label = nct6779_temp_label;
3800 data->temp_label = nct6792_temp_label;
3803 data->temp_label = nct6793_temp_label;
3805 case nct6795: /* unknown */
3808 data->temp_label_num = NCT6791_NUM_LABELS;
3810 data->REG_CONFIG = NCT6775_REG_CONFIG;
3811 data->REG_VBAT = NCT6775_REG_VBAT;
3812 data->REG_DIODE = NCT6775_REG_DIODE;
3813 data->DIODE_MASK = NCT6775_DIODE_MASK;
3814 data->REG_VIN = NCT6779_REG_IN;
3815 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3816 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3817 data->REG_TARGET = NCT6775_REG_TARGET;
3818 data->REG_FAN = NCT6779_REG_FAN;
3819 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3820 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3821 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3822 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3823 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3824 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3825 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3826 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3827 data->REG_PWM[0] = NCT6775_REG_PWM;
3828 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3829 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3830 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3831 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3832 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3833 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3834 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3835 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3836 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3837 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3838 data->REG_CRITICAL_TEMP_TOLERANCE
3839 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3840 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3841 data->CRITICAL_PWM_ENABLE_MASK
3842 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3843 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3844 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3845 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3846 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3847 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3848 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3849 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3850 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3851 data->REG_ALARM = NCT6791_REG_ALARM;
3852 if (data->kind == nct6791)
3853 data->REG_BEEP = NCT6776_REG_BEEP;
3855 data->REG_BEEP = NCT6792_REG_BEEP;
3857 reg_temp = NCT6779_REG_TEMP;
3858 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3859 if (data->kind == nct6791) {
3860 reg_temp_mon = NCT6779_REG_TEMP_MON;
3861 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3863 reg_temp_mon = NCT6792_REG_TEMP_MON;
3864 num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
3866 reg_temp_over = NCT6779_REG_TEMP_OVER;
3867 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3868 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3869 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3870 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3876 data->have_in = (1 << data->in_num) - 1;
3877 data->have_temp = 0;
3880 * On some boards, not all available temperature sources are monitored,
3881 * even though some of the monitoring registers are unused.
3882 * Get list of unused monitoring registers, then detect if any fan
3883 * controls are configured to use unmonitored temperature sources.
3884 * If so, assign the unmonitored temperature sources to available
3885 * monitoring registers.
3889 for (i = 0; i < num_reg_temp; i++) {
3890 if (reg_temp[i] == 0)
3893 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3894 if (!src || (mask & (1 << src)))
3895 available |= 1 << i;
3901 * Now find unmonitored temperature registers and enable monitoring
3902 * if additional monitoring registers are available.
3904 add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3905 add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3908 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
3909 for (i = 0; i < num_reg_temp; i++) {
3910 if (reg_temp[i] == 0)
3913 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3914 if (!src || (mask & (1 << src)))
3917 if (src >= data->temp_label_num ||
3918 !strlen(data->temp_label[src])) {
3920 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3921 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3927 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3928 if (src <= data->temp_fixed_num) {
3929 data->have_temp |= 1 << (src - 1);
3930 data->have_temp_fixed |= 1 << (src - 1);
3931 data->reg_temp[0][src - 1] = reg_temp[i];
3932 data->reg_temp[1][src - 1] = reg_temp_over[i];
3933 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3934 if (reg_temp_crit_h && reg_temp_crit_h[i])
3935 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3936 else if (reg_temp_crit[src - 1])
3937 data->reg_temp[3][src - 1]
3938 = reg_temp_crit[src - 1];
3939 if (reg_temp_crit_l && reg_temp_crit_l[i])
3940 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3941 data->reg_temp_config[src - 1] = reg_temp_config[i];
3942 data->temp_src[src - 1] = src;
3949 /* Use dynamic index for other sources */
3950 data->have_temp |= 1 << s;
3951 data->reg_temp[0][s] = reg_temp[i];
3952 data->reg_temp[1][s] = reg_temp_over[i];
3953 data->reg_temp[2][s] = reg_temp_hyst[i];
3954 data->reg_temp_config[s] = reg_temp_config[i];
3955 if (reg_temp_crit_h && reg_temp_crit_h[i])
3956 data->reg_temp[3][s] = reg_temp_crit_h[i];
3957 else if (reg_temp_crit[src - 1])
3958 data->reg_temp[3][s] = reg_temp_crit[src - 1];
3959 if (reg_temp_crit_l && reg_temp_crit_l[i])
3960 data->reg_temp[4][s] = reg_temp_crit_l[i];
3962 data->temp_src[s] = src;
3967 * Repeat with temperatures used for fan control.
3968 * This set of registers does not support limits.
3970 for (i = 0; i < num_reg_temp_mon; i++) {
3971 if (reg_temp_mon[i] == 0)
3974 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
3978 if (src >= data->temp_label_num ||
3979 !strlen(data->temp_label[src])) {
3981 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3982 src, i, data->REG_TEMP_SEL[i],
3988 * For virtual temperature sources, the 'virtual' temperature
3989 * for each fan reflects a different temperature, and there
3990 * are no duplicates.
3992 if (src != TEMP_SOURCE_VIRTUAL) {
3993 if (mask & (1 << src))
3998 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3999 if (src <= data->temp_fixed_num) {
4000 if (data->have_temp & (1 << (src - 1)))
4002 data->have_temp |= 1 << (src - 1);
4003 data->have_temp_fixed |= 1 << (src - 1);
4004 data->reg_temp[0][src - 1] = reg_temp_mon[i];
4005 data->temp_src[src - 1] = src;
4012 /* Use dynamic index for other sources */
4013 data->have_temp |= 1 << s;
4014 data->reg_temp[0][s] = reg_temp_mon[i];
4015 data->temp_src[s] = src;
4019 #ifdef USE_ALTERNATE
4021 * Go through the list of alternate temp registers and enable
4023 * The temperature is already monitored if the respective bit in <mask>
4026 for (i = 0; i < data->temp_label_num - 1; i++) {
4027 if (!reg_temp_alternate[i])
4029 if (mask & (1 << (i + 1)))
4031 if (i < data->temp_fixed_num) {
4032 if (data->have_temp & (1 << i))
4034 data->have_temp |= 1 << i;
4035 data->have_temp_fixed |= 1 << i;
4036 data->reg_temp[0][i] = reg_temp_alternate[i];
4037 if (i < num_reg_temp) {
4038 data->reg_temp[1][i] = reg_temp_over[i];
4039 data->reg_temp[2][i] = reg_temp_hyst[i];
4041 data->temp_src[i] = i + 1;
4045 if (s >= NUM_TEMP) /* Abort if no more space */
4048 data->have_temp |= 1 << s;
4049 data->reg_temp[0][s] = reg_temp_alternate[i];
4050 data->temp_src[s] = i + 1;
4053 #endif /* USE_ALTERNATE */
4055 /* Initialize the chip */
4056 nct6775_init_device(data);
4058 err = superio_enter(sio_data->sioreg);
4062 cr2a = superio_inb(sio_data->sioreg, 0x2a);
4063 switch (data->kind) {
4065 data->have_vid = (cr2a & 0x40);
4068 data->have_vid = (cr2a & 0x60) == 0x40;
4081 * We can get the VID input values directly at logical device D 0xe3.
4083 if (data->have_vid) {
4084 superio_select(sio_data->sioreg, NCT6775_LD_VID);
4085 data->vid = superio_inb(sio_data->sioreg, 0xe3);
4086 data->vrm = vid_which_vrm();
4092 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
4093 tmp = superio_inb(sio_data->sioreg,
4094 NCT6775_REG_CR_FAN_DEBOUNCE);
4095 switch (data->kind) {
4113 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
4115 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
4119 nct6775_check_fan_inputs(data);
4121 superio_exit(sio_data->sioreg);
4123 /* Read fan clock dividers immediately */
4124 nct6775_init_fan_common(dev, data);
4126 /* Register sysfs hooks */
4127 group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
4130 return PTR_ERR(group);
4132 data->groups[num_attr_groups++] = group;
4134 group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
4135 fls(data->have_in));
4137 return PTR_ERR(group);
4139 data->groups[num_attr_groups++] = group;
4141 group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
4142 fls(data->has_fan));
4144 return PTR_ERR(group);
4146 data->groups[num_attr_groups++] = group;
4148 group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
4149 fls(data->have_temp));
4151 return PTR_ERR(group);
4153 data->groups[num_attr_groups++] = group;
4154 data->groups[num_attr_groups++] = &nct6775_group_other;
4156 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4157 err = sysfs_create_groups(&dev->kobj, data->groups);
4160 hwmon_dev = hwmon_device_register(dev);
4161 if (IS_ERR(hwmon_dev)) {
4162 sysfs_remove_groups(&dev->kobj, data->groups);
4163 return PTR_ERR(hwmon_dev);
4165 data->hwmon_dev = hwmon_dev;
4167 hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4168 data, data->groups);
4170 return PTR_ERR_OR_ZERO(hwmon_dev);
4173 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4174 static int nct6775_remove(struct platform_device *pdev)
4176 struct nct6775_data *data = platform_get_drvdata(pdev);
4178 hwmon_device_unregister(data->hwmon_dev);
4179 sysfs_remove_groups(&pdev->dev.kobj, data->groups);
4184 static void nct6791_enable_io_mapping(int sioaddr)
4188 val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4190 pr_info("Enabling hardware monitor logical device mappings.\n");
4191 superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4196 static int __maybe_unused nct6775_suspend(struct device *dev)
4198 struct nct6775_data *data = nct6775_update_device(dev);
4200 mutex_lock(&data->update_lock);
4201 data->vbat = nct6775_read_value(data, data->REG_VBAT);
4202 if (data->kind == nct6775) {
4203 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4204 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4206 mutex_unlock(&data->update_lock);
4211 static int __maybe_unused nct6775_resume(struct device *dev)
4213 struct nct6775_data *data = dev_get_drvdata(dev);
4214 int sioreg = data->sioreg;
4218 mutex_lock(&data->update_lock);
4219 data->bank = 0xff; /* Force initial bank selection */
4221 err = superio_enter(sioreg);
4225 superio_select(sioreg, NCT6775_LD_HWM);
4226 reg = superio_inb(sioreg, SIO_REG_ENABLE);
4227 if (reg != data->sio_reg_enable)
4228 superio_outb(sioreg, SIO_REG_ENABLE, data->sio_reg_enable);
4230 if (data->kind == nct6791 || data->kind == nct6792 ||
4231 data->kind == nct6793 || data->kind == nct6795)
4232 nct6791_enable_io_mapping(sioreg);
4234 superio_exit(sioreg);
4236 /* Restore limits */
4237 for (i = 0; i < data->in_num; i++) {
4238 if (!(data->have_in & (1 << i)))
4241 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4243 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4247 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4248 if (!(data->has_fan_min & (1 << i)))
4251 nct6775_write_value(data, data->REG_FAN_MIN[i],
4255 for (i = 0; i < NUM_TEMP; i++) {
4256 if (!(data->have_temp & (1 << i)))
4259 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4260 if (data->reg_temp[j][i])
4261 nct6775_write_temp(data, data->reg_temp[j][i],
4265 /* Restore other settings */
4266 nct6775_write_value(data, data->REG_VBAT, data->vbat);
4267 if (data->kind == nct6775) {
4268 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4269 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4273 /* Force re-reading all values */
4274 data->valid = false;
4275 mutex_unlock(&data->update_lock);
4280 static SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops, nct6775_suspend, nct6775_resume);
4282 static struct platform_driver nct6775_driver = {
4284 .owner = THIS_MODULE,
4286 .pm = &nct6775_dev_pm_ops,
4288 .probe = nct6775_probe,
4289 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4290 .remove = nct6775_remove,
4294 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4295 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4301 err = superio_enter(sioaddr);
4305 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8) |
4306 superio_inb(sioaddr, SIO_REG_DEVID + 1);
4307 if (force_id && val != 0xffff)
4310 switch (val & SIO_ID_MASK) {
4311 case SIO_NCT6106_ID:
4312 sio_data->kind = nct6106;
4314 case SIO_NCT6775_ID:
4315 sio_data->kind = nct6775;
4317 case SIO_NCT6776_ID:
4318 sio_data->kind = nct6776;
4320 case SIO_NCT6779_ID:
4321 sio_data->kind = nct6779;
4323 case SIO_NCT6791_ID:
4324 sio_data->kind = nct6791;
4326 case SIO_NCT6792_ID:
4327 sio_data->kind = nct6792;
4329 case SIO_NCT6793_ID:
4330 sio_data->kind = nct6793;
4332 case SIO_NCT6795_ID:
4333 sio_data->kind = nct6795;
4337 pr_debug("unsupported chip ID: 0x%04x\n", val);
4338 superio_exit(sioaddr);
4342 /* We have a known chip, find the HWM I/O address */
4343 superio_select(sioaddr, NCT6775_LD_HWM);
4344 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4345 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4346 addr = val & IOREGION_ALIGNMENT;
4348 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4349 superio_exit(sioaddr);
4353 /* Activate logical device if needed */
4354 val = superio_inb(sioaddr, SIO_REG_ENABLE);
4355 if (!(val & 0x01)) {
4356 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4357 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4360 if (sio_data->kind == nct6791 || sio_data->kind == nct6792 ||
4361 sio_data->kind == nct6793 || sio_data->kind == nct6795)
4362 nct6791_enable_io_mapping(sioaddr);
4364 superio_exit(sioaddr);
4365 pr_info("Found %s or compatible chip at %#x:%#x\n",
4366 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4367 sio_data->sioreg = sioaddr;
4373 * when Super-I/O functions move to a separate file, the Super-I/O
4374 * bus will manage the lifetime of the device and this module will only keep
4375 * track of the nct6775 driver. But since we use platform_device_alloc(), we
4376 * must keep track of the device
4378 static struct platform_device *pdev[2];
4380 static int __init sensors_nct6775_init(void)
4385 struct resource res;
4386 struct nct6775_sio_data sio_data;
4387 int sioaddr[2] = { 0x2e, 0x4e };
4389 err = platform_driver_register(&nct6775_driver);
4394 * initialize sio_data->kind and sio_data->sioreg.
4396 * when Super-I/O functions move to a separate file, the Super-I/O
4397 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4398 * nct6775 hardware monitor, and call probe()
4400 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4401 address = nct6775_find(sioaddr[i], &sio_data);
4407 pdev[i] = platform_device_alloc(DRVNAME, address);
4410 goto exit_device_unregister;
4413 err = platform_device_add_data(pdev[i], &sio_data,
4414 sizeof(struct nct6775_sio_data));
4416 goto exit_device_put;
4418 memset(&res, 0, sizeof(res));
4420 res.start = address + IOREGION_OFFSET;
4421 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4422 res.flags = IORESOURCE_IO;
4424 err = acpi_check_resource_conflict(&res);
4426 platform_device_put(pdev[i]);
4431 err = platform_device_add_resources(pdev[i], &res, 1);
4433 goto exit_device_put;
4435 /* platform_device_add calls probe() */
4436 err = platform_device_add(pdev[i]);
4438 goto exit_device_put;
4442 goto exit_unregister;
4448 platform_device_put(pdev[i]);
4449 exit_device_unregister:
4452 platform_device_unregister(pdev[i]);
4455 platform_driver_unregister(&nct6775_driver);
4459 static void __exit sensors_nct6775_exit(void)
4463 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4465 platform_device_unregister(pdev[i]);
4467 platform_driver_unregister(&nct6775_driver);
4470 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4471 MODULE_DESCRIPTION("Driver for NCT6775F and compatible chips");
4472 MODULE_LICENSE("GPL");
4474 module_init(sensors_nct6775_init);
4475 module_exit(sensors_nct6775_exit);