2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2012 Jean Delvare <jdelvare@suse.de>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 * Supports the following chips:
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3
37 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
38 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
39 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
40 * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3
41 * nct6792d 15 6 6 2+6 0xc911 0xc1 0x5ca3
42 * nct6793d 15 6 6 2+6 0xd120 0xc1 0x5ca3
44 * #temp lists the number of monitored temperature sources (first value) plus
45 * the number of directly connectable temperature sensors (second value).
48 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
50 #include <linux/module.h>
51 #include <linux/init.h>
52 #include <linux/slab.h>
53 #include <linux/jiffies.h>
54 #include <linux/platform_device.h>
55 #include <linux/hwmon.h>
56 #include <linux/hwmon-sysfs.h>
57 #include <linux/hwmon-vid.h>
58 #include <linux/err.h>
59 #include <linux/mutex.h>
60 #include <linux/acpi.h>
61 #include <linux/dmi.h>
68 enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792, nct6793 };
70 /* used to set data->name = nct6775_device_names[data->sio_kind] */
71 static const char * const nct6775_device_names[] = {
81 static unsigned short force_id;
82 module_param(force_id, ushort, 0);
83 MODULE_PARM_DESC(force_id, "Override the detected device ID");
85 static unsigned short fan_debounce;
86 module_param(fan_debounce, ushort, 0);
87 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
89 #define DRVNAME "nct6775"
92 * Super-I/O constants and functions
95 #define NCT6775_LD_ACPI 0x0a
96 #define NCT6775_LD_HWM 0x0b
97 #define NCT6775_LD_VID 0x0d
99 #define SIO_REG_LDSEL 0x07 /* Logical device select */
100 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
101 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
102 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
104 #define SIO_NCT6106_ID 0xc450
105 #define SIO_NCT6775_ID 0xb470
106 #define SIO_NCT6776_ID 0xc330
107 #define SIO_NCT6779_ID 0xc560
108 #define SIO_NCT6791_ID 0xc800
109 #define SIO_NCT6792_ID 0xc910
110 #define SIO_NCT6793_ID 0xd120
111 #define SIO_ID_MASK 0xFFF0
113 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
116 superio_outb(int ioreg, int reg, int val)
119 outb(val, ioreg + 1);
123 superio_inb(int ioreg, int reg)
126 return inb(ioreg + 1);
130 superio_select(int ioreg, int ld)
132 outb(SIO_REG_LDSEL, ioreg);
137 superio_enter(int ioreg)
140 * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
142 if (!request_muxed_region(ioreg, 2, DRVNAME))
152 superio_exit(int ioreg)
156 outb(0x02, ioreg + 1);
157 release_region(ioreg, 2);
164 #define IOREGION_ALIGNMENT (~7)
165 #define IOREGION_OFFSET 5
166 #define IOREGION_LENGTH 2
167 #define ADDR_REG_OFFSET 0
168 #define DATA_REG_OFFSET 1
170 #define NCT6775_REG_BANK 0x4E
171 #define NCT6775_REG_CONFIG 0x40
174 * Not currently used:
175 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
176 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
177 * REG_MAN_ID is at port 0x4f
178 * REG_CHIP_ID is at port 0x58
181 #define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
182 #define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
184 #define NUM_REG_ALARM 7 /* Max number of alarm registers */
185 #define NUM_REG_BEEP 5 /* Max number of beep registers */
189 /* Common and NCT6775 specific data */
191 /* Voltage min/max registers for nr=7..14 are in bank 5 */
193 static const u16 NCT6775_REG_IN_MAX[] = {
194 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
195 0x55c, 0x55e, 0x560, 0x562 };
196 static const u16 NCT6775_REG_IN_MIN[] = {
197 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
198 0x55d, 0x55f, 0x561, 0x563 };
199 static const u16 NCT6775_REG_IN[] = {
200 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
203 #define NCT6775_REG_VBAT 0x5D
204 #define NCT6775_REG_DIODE 0x5E
205 #define NCT6775_DIODE_MASK 0x02
207 #define NCT6775_REG_FANDIV1 0x506
208 #define NCT6775_REG_FANDIV2 0x507
210 #define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
212 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
214 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
216 static const s8 NCT6775_ALARM_BITS[] = {
217 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
218 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
220 6, 7, 11, -1, -1, /* fan1..fan5 */
221 -1, -1, -1, /* unused */
222 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
223 12, -1 }; /* intrusion0, intrusion1 */
225 #define FAN_ALARM_BASE 16
226 #define TEMP_ALARM_BASE 24
227 #define INTRUSION_ALARM_BASE 30
229 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
232 * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
235 static const s8 NCT6775_BEEP_BITS[] = {
236 0, 1, 2, 3, 8, 9, 10, 16, /* in0.. in7 */
237 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
238 21, /* global beep enable */
239 6, 7, 11, 28, -1, /* fan1..fan5 */
240 -1, -1, -1, /* unused */
241 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
242 12, -1 }; /* intrusion0, intrusion1 */
244 #define BEEP_ENABLE_BASE 15
246 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
247 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
249 /* DC or PWM output fan configuration */
250 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
251 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
253 /* Advanced Fan control, some values are common for all fans */
255 static const u16 NCT6775_REG_TARGET[] = {
256 0x101, 0x201, 0x301, 0x801, 0x901, 0xa01 };
257 static const u16 NCT6775_REG_FAN_MODE[] = {
258 0x102, 0x202, 0x302, 0x802, 0x902, 0xa02 };
259 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
260 0x103, 0x203, 0x303, 0x803, 0x903, 0xa03 };
261 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
262 0x104, 0x204, 0x304, 0x804, 0x904, 0xa04 };
263 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
264 0x105, 0x205, 0x305, 0x805, 0x905, 0xa05 };
265 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
266 0x106, 0x206, 0x306, 0x806, 0x906, 0xa06 };
267 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
268 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
270 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
271 0x107, 0x207, 0x307, 0x807, 0x907, 0xa07 };
272 static const u16 NCT6775_REG_PWM[] = {
273 0x109, 0x209, 0x309, 0x809, 0x909, 0xa09 };
274 static const u16 NCT6775_REG_PWM_READ[] = {
275 0x01, 0x03, 0x11, 0x13, 0x15, 0xa09 };
277 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
278 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
279 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
280 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };
282 static const u16 NCT6775_REG_TEMP[] = {
283 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
285 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
287 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
288 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
289 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
290 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
291 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
292 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
294 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
295 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
297 static const u16 NCT6775_REG_TEMP_SEL[] = {
298 0x100, 0x200, 0x300, 0x800, 0x900, 0xa00 };
300 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
301 0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
302 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
303 0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
304 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
305 0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
306 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
307 0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
308 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
309 0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
311 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
313 static const u16 NCT6775_REG_AUTO_TEMP[] = {
314 0x121, 0x221, 0x321, 0x821, 0x921, 0xa21 };
315 static const u16 NCT6775_REG_AUTO_PWM[] = {
316 0x127, 0x227, 0x327, 0x827, 0x927, 0xa27 };
318 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
319 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
321 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
323 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
324 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35 };
325 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
326 0x138, 0x238, 0x338, 0x838, 0x938, 0xa38 };
328 static const char *const nct6775_temp_label[] = {
342 "PCH_CHIP_CPU_MAX_TEMP",
352 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
353 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
355 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
356 = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
359 /* NCT6776 specific data */
361 static const s8 NCT6776_ALARM_BITS[] = {
362 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
363 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
365 6, 7, 11, 10, 23, /* fan1..fan5 */
366 -1, -1, -1, /* unused */
367 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
368 12, 9 }; /* intrusion0, intrusion1 */
370 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
372 static const s8 NCT6776_BEEP_BITS[] = {
373 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
374 8, -1, -1, -1, -1, -1, -1, /* in8..in14 */
375 24, /* global beep enable */
376 25, 26, 27, 28, 29, /* fan1..fan5 */
377 -1, -1, -1, /* unused */
378 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
379 30, 31 }; /* intrusion0, intrusion1 */
381 static const u16 NCT6776_REG_TOLERANCE_H[] = {
382 0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c };
384 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
385 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
387 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
388 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
390 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
391 0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
393 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
394 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
396 static const char *const nct6776_temp_label[] = {
411 "PCH_CHIP_CPU_MAX_TEMP",
422 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
423 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
425 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
426 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
428 /* NCT6779 specific data */
430 static const u16 NCT6779_REG_IN[] = {
431 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
432 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
434 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
435 0x459, 0x45A, 0x45B, 0x568 };
437 static const s8 NCT6779_ALARM_BITS[] = {
438 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
439 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
441 6, 7, 11, 10, 23, /* fan1..fan5 */
442 -1, -1, -1, /* unused */
443 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
444 12, 9 }; /* intrusion0, intrusion1 */
446 static const s8 NCT6779_BEEP_BITS[] = {
447 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
448 8, 9, 10, 11, 12, 13, 14, /* in8..in14 */
449 24, /* global beep enable */
450 25, 26, 27, 28, 29, /* fan1..fan5 */
451 -1, -1, -1, /* unused */
452 16, 17, -1, -1, -1, -1, /* temp1..temp6 */
453 30, 31 }; /* intrusion0, intrusion1 */
455 static const u16 NCT6779_REG_FAN[] = {
456 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba };
457 static const u16 NCT6779_REG_FAN_PULSES[] = {
458 0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
460 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
461 0x136, 0x236, 0x336, 0x836, 0x936, 0xa36 };
462 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01
463 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
464 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37 };
466 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
467 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
468 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
470 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
472 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
475 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
476 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
478 static const char *const nct6779_temp_label[] = {
497 "PCH_CHIP_CPU_MAX_TEMP",
513 #define NCT6779_NUM_LABELS (ARRAY_SIZE(nct6779_temp_label) - 5)
514 #define NCT6791_NUM_LABELS ARRAY_SIZE(nct6779_temp_label)
516 static const u16 NCT6779_REG_TEMP_ALTERNATE[NCT6791_NUM_LABELS - 1]
517 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
518 0, 0, 0, 0, 0, 0, 0, 0,
519 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
522 static const u16 NCT6779_REG_TEMP_CRIT[NCT6791_NUM_LABELS - 1]
523 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
525 /* NCT6791 specific data */
527 #define NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE 0x28
529 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[6] = { 0, 0x239 };
530 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[6] = { 0, 0x23a };
531 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[6] = { 0, 0x23b };
532 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[6] = { 0, 0x23c };
533 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[6] = { 0, 0x23d };
534 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[6] = { 0, 0x23e };
536 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
537 0x459, 0x45A, 0x45B, 0x568, 0x45D };
539 static const s8 NCT6791_ALARM_BITS[] = {
540 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
541 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
543 6, 7, 11, 10, 23, 33, /* fan1..fan6 */
545 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
546 12, 9 }; /* intrusion0, intrusion1 */
548 /* NCT6792/NCT6793 specific data */
550 static const u16 NCT6792_REG_TEMP_MON[] = {
551 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
552 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
553 0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
555 /* NCT6102D/NCT6106D specific data */
557 #define NCT6106_REG_VBAT 0x318
558 #define NCT6106_REG_DIODE 0x319
559 #define NCT6106_DIODE_MASK 0x01
561 static const u16 NCT6106_REG_IN_MAX[] = {
562 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
563 static const u16 NCT6106_REG_IN_MIN[] = {
564 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
565 static const u16 NCT6106_REG_IN[] = {
566 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
568 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
569 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
570 static const u16 NCT6106_REG_TEMP_HYST[] = {
571 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
572 static const u16 NCT6106_REG_TEMP_OVER[] = {
573 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
574 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
575 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
576 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
577 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
578 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
579 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
580 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
582 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
583 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
584 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
585 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
587 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
588 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
589 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
590 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
591 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
592 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
593 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
594 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
596 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
597 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
598 0x11b, 0x12b, 0x13b };
600 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
601 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10
602 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
604 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
605 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
606 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
607 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
608 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
609 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
611 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
613 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
614 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
615 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
616 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
617 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
618 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
620 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
621 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
623 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
624 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
626 static const s8 NCT6106_ALARM_BITS[] = {
627 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
628 9, -1, -1, -1, -1, -1, -1, /* in8..in14 */
630 32, 33, 34, -1, -1, /* fan1..fan5 */
631 -1, -1, -1, /* unused */
632 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
633 48, -1 /* intrusion0, intrusion1 */
636 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
637 0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
639 static const s8 NCT6106_BEEP_BITS[] = {
640 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
641 9, 10, 11, 12, -1, -1, -1, /* in8..in14 */
642 32, /* global beep enable */
643 24, 25, 26, 27, 28, /* fan1..fan5 */
644 -1, -1, -1, /* unused */
645 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
646 34, -1 /* intrusion0, intrusion1 */
649 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
650 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
652 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
653 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
655 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
657 if (mode == 0 && pwm == 255)
662 static int pwm_enable_to_reg(enum pwm_enable mode)
673 /* 1 is DC mode, output in ms */
674 static unsigned int step_time_from_reg(u8 reg, u8 mode)
676 return mode ? 400 * reg : 100 * reg;
679 static u8 step_time_to_reg(unsigned int msec, u8 mode)
681 return clamp_val((mode ? (msec + 200) / 400 :
682 (msec + 50) / 100), 1, 255);
685 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
687 if (reg == 0 || reg == 255)
689 return 1350000U / (reg << divreg);
692 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
694 if ((reg & 0xff1f) == 0xff1f)
697 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
702 return 1350000U / reg;
705 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
707 if (reg == 0 || reg == 0xffff)
711 * Even though the registers are 16 bit wide, the fan divisor
714 return 1350000U / (reg << divreg);
717 static u16 fan_to_reg(u32 fan, unsigned int divreg)
722 return (1350000U / fan) >> divreg;
725 static inline unsigned int
732 * Some of the voltage inputs have internal scaling, the tables below
733 * contain 8 (the ADC LSB in mV) * scaling factor * 100
735 static const u16 scale_in[15] = {
736 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
740 static inline long in_from_reg(u8 reg, u8 nr)
742 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
745 static inline u8 in_to_reg(u32 val, u8 nr)
747 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
751 * Data structures and manipulation thereof
754 struct nct6775_data {
755 int addr; /* IO base of hw monitor block */
756 int sioreg; /* SIO register address */
760 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
761 struct device *hwmon_dev;
764 const struct attribute_group *groups[6];
766 u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
767 * 3=temp_crit, 4=temp_lcrit
769 u8 temp_src[NUM_TEMP];
770 u16 reg_temp_config[NUM_TEMP];
771 const char * const *temp_label;
779 const s8 *ALARM_BITS;
783 const u16 *REG_IN_MINMAX[2];
785 const u16 *REG_TARGET;
787 const u16 *REG_FAN_MODE;
788 const u16 *REG_FAN_MIN;
789 const u16 *REG_FAN_PULSES;
790 const u16 *FAN_PULSE_SHIFT;
791 const u16 *REG_FAN_TIME[3];
793 const u16 *REG_TOLERANCE_H;
795 const u8 *REG_PWM_MODE;
796 const u8 *PWM_MODE_MASK;
798 const u16 *REG_PWM[7]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
799 * [3]=pwm_max, [4]=pwm_step,
800 * [5]=weight_duty_step, [6]=weight_duty_base
802 const u16 *REG_PWM_READ;
804 const u16 *REG_CRITICAL_PWM_ENABLE;
805 u8 CRITICAL_PWM_ENABLE_MASK;
806 const u16 *REG_CRITICAL_PWM;
808 const u16 *REG_AUTO_TEMP;
809 const u16 *REG_AUTO_PWM;
811 const u16 *REG_CRITICAL_TEMP;
812 const u16 *REG_CRITICAL_TEMP_TOLERANCE;
814 const u16 *REG_TEMP_SOURCE; /* temp register sources */
815 const u16 *REG_TEMP_SEL;
816 const u16 *REG_WEIGHT_TEMP_SEL;
817 const u16 *REG_WEIGHT_TEMP[3]; /* 0=base, 1=tolerance, 2=step */
819 const u16 *REG_TEMP_OFFSET;
821 const u16 *REG_ALARM;
824 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
825 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
827 struct mutex update_lock;
828 bool valid; /* true if following fields are valid */
829 unsigned long last_updated; /* In jiffies */
831 /* Register values */
832 u8 bank; /* current register bank */
833 u8 in_num; /* number of in inputs we have */
834 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
835 unsigned int rpm[NUM_FAN];
836 u16 fan_min[NUM_FAN];
837 u8 fan_pulses[NUM_FAN];
840 u8 has_fan; /* some fan inputs can be disabled */
841 u8 has_fan_min; /* some fans don't have min register */
844 u8 num_temp_alarms; /* 2, 3, or 6 */
845 u8 num_temp_beeps; /* 2, 3, or 6 */
846 u8 temp_fixed_num; /* 3 or 6 */
847 u8 temp_type[NUM_TEMP_FIXED];
848 s8 temp_offset[NUM_TEMP_FIXED];
849 s16 temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
850 * 3=temp_crit, 4=temp_lcrit */
854 u8 pwm_num; /* number of pwm */
855 u8 pwm_mode[NUM_FAN]; /* 1->DC variable voltage,
856 * 0->PWM variable duty cycle
858 enum pwm_enable pwm_enable[NUM_FAN];
861 * 2->thermal cruise mode (also called SmartFan I)
862 * 3->fan speed cruise mode
864 * 5->enhanced variable thermal cruise (SmartFan IV)
866 u8 pwm[7][NUM_FAN]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
867 * [3]=pwm_max, [4]=pwm_step,
868 * [5]=weight_duty_step, [6]=weight_duty_base
871 u8 target_temp[NUM_FAN];
873 u32 target_speed[NUM_FAN];
874 u32 target_speed_tolerance[NUM_FAN];
875 u8 speed_tolerance_limit;
877 u8 temp_tolerance[2][NUM_FAN];
880 u8 fan_time[3][NUM_FAN]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
882 /* Automatic fan speed control registers */
884 u8 auto_pwm[NUM_FAN][7];
885 u8 auto_temp[NUM_FAN][7];
886 u8 pwm_temp_sel[NUM_FAN];
887 u8 pwm_weight_temp_sel[NUM_FAN];
888 u8 weight_temp[3][NUM_FAN]; /* 0->temp_step, 1->temp_step_tol,
901 /* Remember extra register values over suspend/resume */
908 struct nct6775_sio_data {
913 struct sensor_device_template {
914 struct device_attribute dev_attr;
922 bool s2; /* true if both index and nr are used */
925 struct sensor_device_attr_u {
927 struct sensor_device_attribute a1;
928 struct sensor_device_attribute_2 a2;
933 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \
934 .attr = {.name = _template, .mode = _mode }, \
939 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
940 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
944 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
946 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
947 .u.s.index = _index, \
951 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
952 static struct sensor_device_template sensor_dev_template_##_name \
953 = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \
956 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \
958 static struct sensor_device_template sensor_dev_template_##_name \
959 = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
962 struct sensor_template_group {
963 struct sensor_device_template **templates;
964 umode_t (*is_visible)(struct kobject *, struct attribute *, int);
968 static struct attribute_group *
969 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
972 struct attribute_group *group;
973 struct sensor_device_attr_u *su;
974 struct sensor_device_attribute *a;
975 struct sensor_device_attribute_2 *a2;
976 struct attribute **attrs;
977 struct sensor_device_template **t;
981 return ERR_PTR(-EINVAL);
984 for (count = 0; *t; t++, count++)
988 return ERR_PTR(-EINVAL);
990 group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
992 return ERR_PTR(-ENOMEM);
994 attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
997 return ERR_PTR(-ENOMEM);
999 su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
1002 return ERR_PTR(-ENOMEM);
1004 group->attrs = attrs;
1005 group->is_visible = tg->is_visible;
1007 for (i = 0; i < repeat; i++) {
1009 while (*t != NULL) {
1010 snprintf(su->name, sizeof(su->name),
1011 (*t)->dev_attr.attr.name, tg->base + i);
1014 a2->dev_attr.attr.name = su->name;
1015 a2->nr = (*t)->u.s.nr + i;
1016 a2->index = (*t)->u.s.index;
1017 a2->dev_attr.attr.mode =
1018 (*t)->dev_attr.attr.mode;
1019 a2->dev_attr.show = (*t)->dev_attr.show;
1020 a2->dev_attr.store = (*t)->dev_attr.store;
1021 *attrs = &a2->dev_attr.attr;
1024 a->dev_attr.attr.name = su->name;
1025 a->index = (*t)->u.index + i;
1026 a->dev_attr.attr.mode =
1027 (*t)->dev_attr.attr.mode;
1028 a->dev_attr.show = (*t)->dev_attr.show;
1029 a->dev_attr.store = (*t)->dev_attr.store;
1030 *attrs = &a->dev_attr.attr;
1041 static bool is_word_sized(struct nct6775_data *data, u16 reg)
1043 switch (data->kind) {
1045 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1046 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1047 reg == 0x111 || reg == 0x121 || reg == 0x131;
1049 return (((reg & 0xff00) == 0x100 ||
1050 (reg & 0xff00) == 0x200) &&
1051 ((reg & 0x00ff) == 0x50 ||
1052 (reg & 0x00ff) == 0x53 ||
1053 (reg & 0x00ff) == 0x55)) ||
1054 (reg & 0xfff0) == 0x630 ||
1055 reg == 0x640 || reg == 0x642 ||
1057 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1058 reg == 0x73 || reg == 0x75 || reg == 0x77;
1060 return (((reg & 0xff00) == 0x100 ||
1061 (reg & 0xff00) == 0x200) &&
1062 ((reg & 0x00ff) == 0x50 ||
1063 (reg & 0x00ff) == 0x53 ||
1064 (reg & 0x00ff) == 0x55)) ||
1065 (reg & 0xfff0) == 0x630 ||
1067 reg == 0x640 || reg == 0x642 ||
1068 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1069 reg == 0x73 || reg == 0x75 || reg == 0x77;
1074 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1075 ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) ||
1077 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1078 reg == 0x640 || reg == 0x642 ||
1079 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1080 reg == 0x7b || reg == 0x7d;
1086 * On older chips, only registers 0x50-0x5f are banked.
1087 * On more recent chips, all registers are banked.
1088 * Assume that is the case and set the bank number for each access.
1089 * Cache the bank number so it only needs to be set if it changes.
1091 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
1095 if (data->bank != bank) {
1096 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
1097 outb_p(bank, data->addr + DATA_REG_OFFSET);
1102 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
1104 int res, word_sized = is_word_sized(data, reg);
1106 nct6775_set_bank(data, reg);
1107 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1108 res = inb_p(data->addr + DATA_REG_OFFSET);
1110 outb_p((reg & 0xff) + 1,
1111 data->addr + ADDR_REG_OFFSET);
1112 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
1117 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1119 int word_sized = is_word_sized(data, reg);
1121 nct6775_set_bank(data, reg);
1122 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1124 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1125 outb_p((reg & 0xff) + 1,
1126 data->addr + ADDR_REG_OFFSET);
1128 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1132 /* We left-align 8-bit temperature values to make the code simpler */
1133 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1137 res = nct6775_read_value(data, reg);
1138 if (!is_word_sized(data, reg))
1144 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1146 if (!is_word_sized(data, reg))
1148 return nct6775_write_value(data, reg, value);
1151 /* This function assumes that the caller holds data->update_lock */
1152 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1158 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1159 | (data->fan_div[0] & 0x7);
1160 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1163 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1164 | ((data->fan_div[1] << 4) & 0x70);
1165 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1168 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1169 | (data->fan_div[2] & 0x7);
1170 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1173 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1174 | ((data->fan_div[3] << 4) & 0x70);
1175 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1180 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1182 if (data->kind == nct6775)
1183 nct6775_write_fan_div(data, nr);
1186 static void nct6775_update_fan_div(struct nct6775_data *data)
1190 i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1191 data->fan_div[0] = i & 0x7;
1192 data->fan_div[1] = (i & 0x70) >> 4;
1193 i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1194 data->fan_div[2] = i & 0x7;
1195 if (data->has_fan & (1 << 3))
1196 data->fan_div[3] = (i & 0x70) >> 4;
1199 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1201 if (data->kind == nct6775)
1202 nct6775_update_fan_div(data);
1205 static void nct6775_init_fan_div(struct nct6775_data *data)
1209 nct6775_update_fan_div_common(data);
1211 * For all fans, start with highest divider value if the divider
1212 * register is not initialized. This ensures that we get a
1213 * reading from the fan count register, even if it is not optimal.
1214 * We'll compute a better divider later on.
1216 for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1217 if (!(data->has_fan & (1 << i)))
1219 if (data->fan_div[i] == 0) {
1220 data->fan_div[i] = 7;
1221 nct6775_write_fan_div_common(data, i);
1226 static void nct6775_init_fan_common(struct device *dev,
1227 struct nct6775_data *data)
1232 if (data->has_fan_div)
1233 nct6775_init_fan_div(data);
1236 * If fan_min is not set (0), set it to 0xff to disable it. This
1237 * prevents the unnecessary warning when fanX_min is reported as 0.
1239 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1240 if (data->has_fan_min & (1 << i)) {
1241 reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1243 nct6775_write_value(data, data->REG_FAN_MIN[i],
1244 data->has_fan_div ? 0xff
1250 static void nct6775_select_fan_div(struct device *dev,
1251 struct nct6775_data *data, int nr, u16 reg)
1253 u8 fan_div = data->fan_div[nr];
1256 if (!data->has_fan_div)
1260 * If we failed to measure the fan speed, or the reported value is not
1261 * in the optimal range, and the clock divider can be modified,
1262 * let's try that for next time.
1264 if (reg == 0x00 && fan_div < 0x07)
1266 else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1269 if (fan_div != data->fan_div[nr]) {
1270 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1271 nr + 1, div_from_reg(data->fan_div[nr]),
1272 div_from_reg(fan_div));
1274 /* Preserve min limit if possible */
1275 if (data->has_fan_min & (1 << nr)) {
1276 fan_min = data->fan_min[nr];
1277 if (fan_div > data->fan_div[nr]) {
1278 if (fan_min != 255 && fan_min > 1)
1281 if (fan_min != 255) {
1287 if (fan_min != data->fan_min[nr]) {
1288 data->fan_min[nr] = fan_min;
1289 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1293 data->fan_div[nr] = fan_div;
1294 nct6775_write_fan_div_common(data, nr);
1298 static void nct6775_update_pwm(struct device *dev)
1300 struct nct6775_data *data = dev_get_drvdata(dev);
1302 int fanmodecfg, reg;
1305 for (i = 0; i < data->pwm_num; i++) {
1306 if (!(data->has_pwm & (1 << i)))
1309 duty_is_dc = data->REG_PWM_MODE[i] &&
1310 (nct6775_read_value(data, data->REG_PWM_MODE[i])
1311 & data->PWM_MODE_MASK[i]);
1312 data->pwm_mode[i] = duty_is_dc;
1314 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1315 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1316 if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1318 = nct6775_read_value(data,
1319 data->REG_PWM[j][i]);
1323 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1324 (fanmodecfg >> 4) & 7);
1326 if (!data->temp_tolerance[0][i] ||
1327 data->pwm_enable[i] != speed_cruise)
1328 data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1329 if (!data->target_speed_tolerance[i] ||
1330 data->pwm_enable[i] == speed_cruise) {
1331 u8 t = fanmodecfg & 0x0f;
1333 if (data->REG_TOLERANCE_H) {
1334 t |= (nct6775_read_value(data,
1335 data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1337 data->target_speed_tolerance[i] = t;
1340 data->temp_tolerance[1][i] =
1341 nct6775_read_value(data,
1342 data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1344 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1345 data->pwm_temp_sel[i] = reg & 0x1f;
1346 /* If fan can stop, report floor as 0 */
1348 data->pwm[2][i] = 0;
1350 if (!data->REG_WEIGHT_TEMP_SEL[i])
1353 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1354 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1355 /* If weight is disabled, report weight source as 0 */
1356 if (j == 1 && !(reg & 0x80))
1357 data->pwm_weight_temp_sel[i] = 0;
1359 /* Weight temp data */
1360 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1361 data->weight_temp[j][i]
1362 = nct6775_read_value(data,
1363 data->REG_WEIGHT_TEMP[j][i]);
1368 static void nct6775_update_pwm_limits(struct device *dev)
1370 struct nct6775_data *data = dev_get_drvdata(dev);
1375 for (i = 0; i < data->pwm_num; i++) {
1376 if (!(data->has_pwm & (1 << i)))
1379 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1380 data->fan_time[j][i] =
1381 nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1384 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1385 /* Update only in matching mode or if never updated */
1386 if (!data->target_temp[i] ||
1387 data->pwm_enable[i] == thermal_cruise)
1388 data->target_temp[i] = reg_t & data->target_temp_mask;
1389 if (!data->target_speed[i] ||
1390 data->pwm_enable[i] == speed_cruise) {
1391 if (data->REG_TOLERANCE_H) {
1392 reg_t |= (nct6775_read_value(data,
1393 data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1395 data->target_speed[i] = reg_t;
1398 for (j = 0; j < data->auto_pwm_num; j++) {
1399 data->auto_pwm[i][j] =
1400 nct6775_read_value(data,
1401 NCT6775_AUTO_PWM(data, i, j));
1402 data->auto_temp[i][j] =
1403 nct6775_read_value(data,
1404 NCT6775_AUTO_TEMP(data, i, j));
1407 /* critical auto_pwm temperature data */
1408 data->auto_temp[i][data->auto_pwm_num] =
1409 nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1411 switch (data->kind) {
1413 reg = nct6775_read_value(data,
1414 NCT6775_REG_CRITICAL_ENAB[i]);
1415 data->auto_pwm[i][data->auto_pwm_num] =
1416 (reg & 0x02) ? 0xff : 0x00;
1419 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1426 reg = nct6775_read_value(data,
1427 data->REG_CRITICAL_PWM_ENABLE[i]);
1428 if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1429 reg = nct6775_read_value(data,
1430 data->REG_CRITICAL_PWM[i]);
1433 data->auto_pwm[i][data->auto_pwm_num] = reg;
1439 static struct nct6775_data *nct6775_update_device(struct device *dev)
1441 struct nct6775_data *data = dev_get_drvdata(dev);
1444 mutex_lock(&data->update_lock);
1446 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1448 /* Fan clock dividers */
1449 nct6775_update_fan_div_common(data);
1451 /* Measured voltages and limits */
1452 for (i = 0; i < data->in_num; i++) {
1453 if (!(data->have_in & (1 << i)))
1456 data->in[i][0] = nct6775_read_value(data,
1458 data->in[i][1] = nct6775_read_value(data,
1459 data->REG_IN_MINMAX[0][i]);
1460 data->in[i][2] = nct6775_read_value(data,
1461 data->REG_IN_MINMAX[1][i]);
1464 /* Measured fan speeds and limits */
1465 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1468 if (!(data->has_fan & (1 << i)))
1471 reg = nct6775_read_value(data, data->REG_FAN[i]);
1472 data->rpm[i] = data->fan_from_reg(reg,
1475 if (data->has_fan_min & (1 << i))
1476 data->fan_min[i] = nct6775_read_value(data,
1477 data->REG_FAN_MIN[i]);
1478 data->fan_pulses[i] =
1479 (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1480 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1482 nct6775_select_fan_div(dev, data, i, reg);
1485 nct6775_update_pwm(dev);
1486 nct6775_update_pwm_limits(dev);
1488 /* Measured temperatures and limits */
1489 for (i = 0; i < NUM_TEMP; i++) {
1490 if (!(data->have_temp & (1 << i)))
1492 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1493 if (data->reg_temp[j][i])
1495 = nct6775_read_temp(data,
1496 data->reg_temp[j][i]);
1498 if (i >= NUM_TEMP_FIXED ||
1499 !(data->have_temp_fixed & (1 << i)))
1501 data->temp_offset[i]
1502 = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1506 for (i = 0; i < NUM_REG_ALARM; i++) {
1509 if (!data->REG_ALARM[i])
1511 alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1512 data->alarms |= ((u64)alarm) << (i << 3);
1516 for (i = 0; i < NUM_REG_BEEP; i++) {
1519 if (!data->REG_BEEP[i])
1521 beep = nct6775_read_value(data, data->REG_BEEP[i]);
1522 data->beeps |= ((u64)beep) << (i << 3);
1525 data->last_updated = jiffies;
1529 mutex_unlock(&data->update_lock);
1534 * Sysfs callback functions
1537 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1539 struct nct6775_data *data = nct6775_update_device(dev);
1540 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1541 int index = sattr->index;
1544 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1548 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1551 struct nct6775_data *data = dev_get_drvdata(dev);
1552 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1553 int index = sattr->index;
1558 err = kstrtoul(buf, 10, &val);
1561 mutex_lock(&data->update_lock);
1562 data->in[nr][index] = in_to_reg(val, nr);
1563 nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1564 data->in[nr][index]);
1565 mutex_unlock(&data->update_lock);
1570 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1572 struct nct6775_data *data = nct6775_update_device(dev);
1573 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1574 int nr = data->ALARM_BITS[sattr->index];
1576 return sprintf(buf, "%u\n",
1577 (unsigned int)((data->alarms >> nr) & 0x01));
1580 static int find_temp_source(struct nct6775_data *data, int index, int count)
1582 int source = data->temp_src[index];
1585 for (nr = 0; nr < count; nr++) {
1588 src = nct6775_read_value(data,
1589 data->REG_TEMP_SOURCE[nr]) & 0x1f;
1597 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1599 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1600 struct nct6775_data *data = nct6775_update_device(dev);
1601 unsigned int alarm = 0;
1605 * For temperatures, there is no fixed mapping from registers to alarm
1606 * bits. Alarm bits are determined by the temperature source mapping.
1608 nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1610 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1612 alarm = (data->alarms >> bit) & 0x01;
1614 return sprintf(buf, "%u\n", alarm);
1618 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1620 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1621 struct nct6775_data *data = nct6775_update_device(dev);
1622 int nr = data->BEEP_BITS[sattr->index];
1624 return sprintf(buf, "%u\n",
1625 (unsigned int)((data->beeps >> nr) & 0x01));
1629 store_beep(struct device *dev, struct device_attribute *attr, const char *buf,
1632 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1633 struct nct6775_data *data = dev_get_drvdata(dev);
1634 int nr = data->BEEP_BITS[sattr->index];
1635 int regindex = nr >> 3;
1639 err = kstrtoul(buf, 10, &val);
1645 mutex_lock(&data->update_lock);
1647 data->beeps |= (1ULL << nr);
1649 data->beeps &= ~(1ULL << nr);
1650 nct6775_write_value(data, data->REG_BEEP[regindex],
1651 (data->beeps >> (regindex << 3)) & 0xff);
1652 mutex_unlock(&data->update_lock);
1657 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1659 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1660 struct nct6775_data *data = nct6775_update_device(dev);
1661 unsigned int beep = 0;
1665 * For temperatures, there is no fixed mapping from registers to beep
1666 * enable bits. Beep enable bits are determined by the temperature
1669 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1671 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1673 beep = (data->beeps >> bit) & 0x01;
1675 return sprintf(buf, "%u\n", beep);
1679 store_temp_beep(struct device *dev, struct device_attribute *attr,
1680 const char *buf, size_t count)
1682 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1683 struct nct6775_data *data = dev_get_drvdata(dev);
1684 int nr, bit, regindex;
1688 err = kstrtoul(buf, 10, &val);
1694 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1698 bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1699 regindex = bit >> 3;
1701 mutex_lock(&data->update_lock);
1703 data->beeps |= (1ULL << bit);
1705 data->beeps &= ~(1ULL << bit);
1706 nct6775_write_value(data, data->REG_BEEP[regindex],
1707 (data->beeps >> (regindex << 3)) & 0xff);
1708 mutex_unlock(&data->update_lock);
1713 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1714 struct attribute *attr, int index)
1716 struct device *dev = container_of(kobj, struct device, kobj);
1717 struct nct6775_data *data = dev_get_drvdata(dev);
1718 int in = index / 5; /* voltage index */
1720 if (!(data->have_in & (1 << in)))
1726 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1727 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1728 SENSOR_TEMPLATE(in_beep, "in%d_beep", S_IWUSR | S_IRUGO, show_beep, store_beep,
1730 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1731 store_in_reg, 0, 1);
1732 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1733 store_in_reg, 0, 2);
1736 * nct6775_in_is_visible uses the index into the following array
1737 * to determine if attributes should be created or not.
1738 * Any change in order or content must be matched.
1740 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1741 &sensor_dev_template_in_input,
1742 &sensor_dev_template_in_alarm,
1743 &sensor_dev_template_in_beep,
1744 &sensor_dev_template_in_min,
1745 &sensor_dev_template_in_max,
1749 static struct sensor_template_group nct6775_in_template_group = {
1750 .templates = nct6775_attributes_in_template,
1751 .is_visible = nct6775_in_is_visible,
1755 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1757 struct nct6775_data *data = nct6775_update_device(dev);
1758 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1759 int nr = sattr->index;
1761 return sprintf(buf, "%d\n", data->rpm[nr]);
1765 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1767 struct nct6775_data *data = nct6775_update_device(dev);
1768 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1769 int nr = sattr->index;
1771 return sprintf(buf, "%d\n",
1772 data->fan_from_reg_min(data->fan_min[nr],
1773 data->fan_div[nr]));
1777 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1779 struct nct6775_data *data = nct6775_update_device(dev);
1780 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1781 int nr = sattr->index;
1783 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1787 store_fan_min(struct device *dev, struct device_attribute *attr,
1788 const char *buf, size_t count)
1790 struct nct6775_data *data = dev_get_drvdata(dev);
1791 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1792 int nr = sattr->index;
1798 err = kstrtoul(buf, 10, &val);
1802 mutex_lock(&data->update_lock);
1803 if (!data->has_fan_div) {
1804 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1810 val = 1350000U / val;
1811 val = (val & 0x1f) | ((val << 3) & 0xff00);
1813 data->fan_min[nr] = val;
1814 goto write_min; /* Leave fan divider alone */
1817 /* No min limit, alarm disabled */
1818 data->fan_min[nr] = 255;
1819 new_div = data->fan_div[nr]; /* No change */
1820 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1823 reg = 1350000U / val;
1824 if (reg >= 128 * 255) {
1826 * Speed below this value cannot possibly be represented,
1827 * even with the highest divider (128)
1829 data->fan_min[nr] = 254;
1830 new_div = 7; /* 128 == (1 << 7) */
1832 "fan%u low limit %lu below minimum %u, set to minimum\n",
1833 nr + 1, val, data->fan_from_reg_min(254, 7));
1836 * Speed above this value cannot possibly be represented,
1837 * even with the lowest divider (1)
1839 data->fan_min[nr] = 1;
1840 new_div = 0; /* 1 == (1 << 0) */
1842 "fan%u low limit %lu above maximum %u, set to maximum\n",
1843 nr + 1, val, data->fan_from_reg_min(1, 0));
1846 * Automatically pick the best divider, i.e. the one such
1847 * that the min limit will correspond to a register value
1848 * in the 96..192 range
1851 while (reg > 192 && new_div < 7) {
1855 data->fan_min[nr] = reg;
1860 * Write both the fan clock divider (if it changed) and the new
1861 * fan min (unconditionally)
1863 if (new_div != data->fan_div[nr]) {
1864 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1865 nr + 1, div_from_reg(data->fan_div[nr]),
1866 div_from_reg(new_div));
1867 data->fan_div[nr] = new_div;
1868 nct6775_write_fan_div_common(data, nr);
1869 /* Give the chip time to sample a new speed value */
1870 data->last_updated = jiffies;
1874 nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1875 mutex_unlock(&data->update_lock);
1881 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1883 struct nct6775_data *data = nct6775_update_device(dev);
1884 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1885 int p = data->fan_pulses[sattr->index];
1887 return sprintf(buf, "%d\n", p ? : 4);
1891 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1892 const char *buf, size_t count)
1894 struct nct6775_data *data = dev_get_drvdata(dev);
1895 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1896 int nr = sattr->index;
1901 err = kstrtoul(buf, 10, &val);
1908 mutex_lock(&data->update_lock);
1909 data->fan_pulses[nr] = val & 3;
1910 reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1911 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1912 reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1913 nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1914 mutex_unlock(&data->update_lock);
1919 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1920 struct attribute *attr, int index)
1922 struct device *dev = container_of(kobj, struct device, kobj);
1923 struct nct6775_data *data = dev_get_drvdata(dev);
1924 int fan = index / 6; /* fan index */
1925 int nr = index % 6; /* attribute index */
1927 if (!(data->has_fan & (1 << fan)))
1930 if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
1932 if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
1934 if (nr == 4 && !(data->has_fan_min & (1 << fan)))
1936 if (nr == 5 && data->kind != nct6775)
1942 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
1943 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
1945 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", S_IWUSR | S_IRUGO, show_beep,
1946 store_beep, FAN_ALARM_BASE);
1947 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
1948 store_fan_pulses, 0);
1949 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
1951 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
1954 * nct6775_fan_is_visible uses the index into the following array
1955 * to determine if attributes should be created or not.
1956 * Any change in order or content must be matched.
1958 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1959 &sensor_dev_template_fan_input,
1960 &sensor_dev_template_fan_alarm, /* 1 */
1961 &sensor_dev_template_fan_beep, /* 2 */
1962 &sensor_dev_template_fan_pulses,
1963 &sensor_dev_template_fan_min, /* 4 */
1964 &sensor_dev_template_fan_div, /* 5 */
1968 static struct sensor_template_group nct6775_fan_template_group = {
1969 .templates = nct6775_attributes_fan_template,
1970 .is_visible = nct6775_fan_is_visible,
1975 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1977 struct nct6775_data *data = nct6775_update_device(dev);
1978 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1979 int nr = sattr->index;
1981 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1985 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1987 struct nct6775_data *data = nct6775_update_device(dev);
1988 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1990 int index = sattr->index;
1992 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1996 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1999 struct nct6775_data *data = dev_get_drvdata(dev);
2000 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2002 int index = sattr->index;
2006 err = kstrtol(buf, 10, &val);
2010 mutex_lock(&data->update_lock);
2011 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
2012 nct6775_write_temp(data, data->reg_temp[index][nr],
2013 data->temp[index][nr]);
2014 mutex_unlock(&data->update_lock);
2019 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2021 struct nct6775_data *data = nct6775_update_device(dev);
2022 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2024 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2028 store_temp_offset(struct device *dev, struct device_attribute *attr,
2029 const char *buf, size_t count)
2031 struct nct6775_data *data = dev_get_drvdata(dev);
2032 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2033 int nr = sattr->index;
2037 err = kstrtol(buf, 10, &val);
2041 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2043 mutex_lock(&data->update_lock);
2044 data->temp_offset[nr] = val;
2045 nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2046 mutex_unlock(&data->update_lock);
2052 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2054 struct nct6775_data *data = nct6775_update_device(dev);
2055 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2056 int nr = sattr->index;
2058 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2062 store_temp_type(struct device *dev, struct device_attribute *attr,
2063 const char *buf, size_t count)
2065 struct nct6775_data *data = nct6775_update_device(dev);
2066 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2067 int nr = sattr->index;
2070 u8 vbat, diode, vbit, dbit;
2072 err = kstrtoul(buf, 10, &val);
2076 if (val != 1 && val != 3 && val != 4)
2079 mutex_lock(&data->update_lock);
2081 data->temp_type[nr] = val;
2083 dbit = data->DIODE_MASK << nr;
2084 vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
2085 diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
2087 case 1: /* CPU diode (diode, current mode) */
2091 case 3: /* diode, voltage mode */
2094 case 4: /* thermistor */
2097 nct6775_write_value(data, data->REG_VBAT, vbat);
2098 nct6775_write_value(data, data->REG_DIODE, diode);
2100 mutex_unlock(&data->update_lock);
2104 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2105 struct attribute *attr, int index)
2107 struct device *dev = container_of(kobj, struct device, kobj);
2108 struct nct6775_data *data = dev_get_drvdata(dev);
2109 int temp = index / 10; /* temp index */
2110 int nr = index % 10; /* attribute index */
2112 if (!(data->have_temp & (1 << temp)))
2115 if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2116 return 0; /* alarm */
2118 if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2119 return 0; /* beep */
2121 if (nr == 4 && !data->reg_temp[1][temp]) /* max */
2124 if (nr == 5 && !data->reg_temp[2][temp]) /* max_hyst */
2127 if (nr == 6 && !data->reg_temp[3][temp]) /* crit */
2130 if (nr == 7 && !data->reg_temp[4][temp]) /* lcrit */
2133 /* offset and type only apply to fixed sensors */
2134 if (nr > 7 && !(data->have_temp_fixed & (1 << temp)))
2140 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
2141 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
2142 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
2144 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
2145 show_temp, store_temp, 0, 2);
2146 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
2148 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
2150 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
2151 show_temp_offset, store_temp_offset, 0);
2152 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
2153 store_temp_type, 0);
2154 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
2155 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", S_IRUGO | S_IWUSR, show_temp_beep,
2156 store_temp_beep, 0);
2159 * nct6775_temp_is_visible uses the index into the following array
2160 * to determine if attributes should be created or not.
2161 * Any change in order or content must be matched.
2163 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2164 &sensor_dev_template_temp_input,
2165 &sensor_dev_template_temp_label,
2166 &sensor_dev_template_temp_alarm, /* 2 */
2167 &sensor_dev_template_temp_beep, /* 3 */
2168 &sensor_dev_template_temp_max, /* 4 */
2169 &sensor_dev_template_temp_max_hyst, /* 5 */
2170 &sensor_dev_template_temp_crit, /* 6 */
2171 &sensor_dev_template_temp_lcrit, /* 7 */
2172 &sensor_dev_template_temp_offset, /* 8 */
2173 &sensor_dev_template_temp_type, /* 9 */
2177 static struct sensor_template_group nct6775_temp_template_group = {
2178 .templates = nct6775_attributes_temp_template,
2179 .is_visible = nct6775_temp_is_visible,
2184 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2186 struct nct6775_data *data = nct6775_update_device(dev);
2187 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2189 return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
2193 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2194 const char *buf, size_t count)
2196 struct nct6775_data *data = dev_get_drvdata(dev);
2197 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2198 int nr = sattr->index;
2203 err = kstrtoul(buf, 10, &val);
2210 /* Setting DC mode is not supported for all chips/channels */
2211 if (data->REG_PWM_MODE[nr] == 0) {
2217 mutex_lock(&data->update_lock);
2218 data->pwm_mode[nr] = val;
2219 reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
2220 reg &= ~data->PWM_MODE_MASK[nr];
2222 reg |= data->PWM_MODE_MASK[nr];
2223 nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2224 mutex_unlock(&data->update_lock);
2229 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2231 struct nct6775_data *data = nct6775_update_device(dev);
2232 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2234 int index = sattr->index;
2238 * For automatic fan control modes, show current pwm readings.
2239 * Otherwise, show the configured value.
2241 if (index == 0 && data->pwm_enable[nr] > manual)
2242 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
2244 pwm = data->pwm[index][nr];
2246 return sprintf(buf, "%d\n", pwm);
2250 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2253 struct nct6775_data *data = dev_get_drvdata(dev);
2254 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2256 int index = sattr->index;
2258 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2260 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2264 err = kstrtoul(buf, 10, &val);
2267 val = clamp_val(val, minval[index], maxval[index]);
2269 mutex_lock(&data->update_lock);
2270 data->pwm[index][nr] = val;
2271 nct6775_write_value(data, data->REG_PWM[index][nr], val);
2272 if (index == 2) { /* floor: disable if val == 0 */
2273 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2277 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2279 mutex_unlock(&data->update_lock);
2283 /* Returns 0 if OK, -EINVAL otherwise */
2284 static int check_trip_points(struct nct6775_data *data, int nr)
2288 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2289 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2292 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2293 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2296 /* validate critical temperature and pwm if enabled (pwm > 0) */
2297 if (data->auto_pwm[nr][data->auto_pwm_num]) {
2298 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2299 data->auto_temp[nr][data->auto_pwm_num] ||
2300 data->auto_pwm[nr][data->auto_pwm_num - 1] >
2301 data->auto_pwm[nr][data->auto_pwm_num])
2307 static void pwm_update_registers(struct nct6775_data *data, int nr)
2311 switch (data->pwm_enable[nr]) {
2316 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2317 reg = (reg & ~data->tolerance_mask) |
2318 (data->target_speed_tolerance[nr] & data->tolerance_mask);
2319 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2320 nct6775_write_value(data, data->REG_TARGET[nr],
2321 data->target_speed[nr] & 0xff);
2322 if (data->REG_TOLERANCE_H) {
2323 reg = (data->target_speed[nr] >> 8) & 0x0f;
2324 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2325 nct6775_write_value(data,
2326 data->REG_TOLERANCE_H[nr],
2330 case thermal_cruise:
2331 nct6775_write_value(data, data->REG_TARGET[nr],
2332 data->target_temp[nr]);
2335 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2336 reg = (reg & ~data->tolerance_mask) |
2337 data->temp_tolerance[0][nr];
2338 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2344 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2346 struct nct6775_data *data = nct6775_update_device(dev);
2347 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2349 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2353 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2354 const char *buf, size_t count)
2356 struct nct6775_data *data = dev_get_drvdata(dev);
2357 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2358 int nr = sattr->index;
2363 err = kstrtoul(buf, 10, &val);
2370 if (val == sf3 && data->kind != nct6775)
2373 if (val == sf4 && check_trip_points(data, nr)) {
2374 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2375 dev_err(dev, "Adjust trip points and try again\n");
2379 mutex_lock(&data->update_lock);
2380 data->pwm_enable[nr] = val;
2383 * turn off pwm control: select manual mode, set pwm to maximum
2385 data->pwm[0][nr] = 255;
2386 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2388 pwm_update_registers(data, nr);
2389 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2391 reg |= pwm_enable_to_reg(val) << 4;
2392 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2393 mutex_unlock(&data->update_lock);
2398 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2402 for (i = 0; i < NUM_TEMP; i++) {
2403 if (!(data->have_temp & (1 << i)))
2405 if (src == data->temp_src[i]) {
2411 return sprintf(buf, "%d\n", sel);
2415 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2417 struct nct6775_data *data = nct6775_update_device(dev);
2418 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2419 int index = sattr->index;
2421 return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2425 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2426 const char *buf, size_t count)
2428 struct nct6775_data *data = nct6775_update_device(dev);
2429 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2430 int nr = sattr->index;
2434 err = kstrtoul(buf, 10, &val);
2437 if (val == 0 || val > NUM_TEMP)
2439 if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2442 mutex_lock(&data->update_lock);
2443 src = data->temp_src[val - 1];
2444 data->pwm_temp_sel[nr] = src;
2445 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2448 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2449 mutex_unlock(&data->update_lock);
2455 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2458 struct nct6775_data *data = nct6775_update_device(dev);
2459 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2460 int index = sattr->index;
2462 return show_pwm_temp_sel_common(data, buf,
2463 data->pwm_weight_temp_sel[index]);
2467 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2468 const char *buf, size_t count)
2470 struct nct6775_data *data = nct6775_update_device(dev);
2471 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2472 int nr = sattr->index;
2476 err = kstrtoul(buf, 10, &val);
2481 if (val && (!(data->have_temp & (1 << (val - 1))) ||
2482 !data->temp_src[val - 1]))
2485 mutex_lock(&data->update_lock);
2487 src = data->temp_src[val - 1];
2488 data->pwm_weight_temp_sel[nr] = src;
2489 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2491 reg |= (src | 0x80);
2492 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2494 data->pwm_weight_temp_sel[nr] = 0;
2495 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2497 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2499 mutex_unlock(&data->update_lock);
2505 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2507 struct nct6775_data *data = nct6775_update_device(dev);
2508 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2510 return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2514 store_target_temp(struct device *dev, struct device_attribute *attr,
2515 const char *buf, size_t count)
2517 struct nct6775_data *data = dev_get_drvdata(dev);
2518 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2519 int nr = sattr->index;
2523 err = kstrtoul(buf, 10, &val);
2527 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2528 data->target_temp_mask);
2530 mutex_lock(&data->update_lock);
2531 data->target_temp[nr] = val;
2532 pwm_update_registers(data, nr);
2533 mutex_unlock(&data->update_lock);
2538 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2540 struct nct6775_data *data = nct6775_update_device(dev);
2541 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2542 int nr = sattr->index;
2544 return sprintf(buf, "%d\n",
2545 fan_from_reg16(data->target_speed[nr],
2546 data->fan_div[nr]));
2550 store_target_speed(struct device *dev, struct device_attribute *attr,
2551 const char *buf, size_t count)
2553 struct nct6775_data *data = dev_get_drvdata(dev);
2554 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2555 int nr = sattr->index;
2560 err = kstrtoul(buf, 10, &val);
2564 val = clamp_val(val, 0, 1350000U);
2565 speed = fan_to_reg(val, data->fan_div[nr]);
2567 mutex_lock(&data->update_lock);
2568 data->target_speed[nr] = speed;
2569 pwm_update_registers(data, nr);
2570 mutex_unlock(&data->update_lock);
2575 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2578 struct nct6775_data *data = nct6775_update_device(dev);
2579 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2581 int index = sattr->index;
2583 return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2587 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2588 const char *buf, size_t count)
2590 struct nct6775_data *data = dev_get_drvdata(dev);
2591 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2593 int index = sattr->index;
2597 err = kstrtoul(buf, 10, &val);
2601 /* Limit tolerance as needed */
2602 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2604 mutex_lock(&data->update_lock);
2605 data->temp_tolerance[index][nr] = val;
2607 pwm_update_registers(data, nr);
2609 nct6775_write_value(data,
2610 data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2612 mutex_unlock(&data->update_lock);
2617 * Fan speed tolerance is a tricky beast, since the associated register is
2618 * a tick counter, but the value is reported and configured as rpm.
2619 * Compute resulting low and high rpm values and report the difference.
2622 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2625 struct nct6775_data *data = nct6775_update_device(dev);
2626 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2627 int nr = sattr->index;
2628 int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2629 int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2639 tolerance = (fan_from_reg16(low, data->fan_div[nr])
2640 - fan_from_reg16(high, data->fan_div[nr])) / 2;
2642 return sprintf(buf, "%d\n", tolerance);
2646 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2647 const char *buf, size_t count)
2649 struct nct6775_data *data = dev_get_drvdata(dev);
2650 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2651 int nr = sattr->index;
2656 err = kstrtoul(buf, 10, &val);
2660 high = fan_from_reg16(data->target_speed[nr],
2661 data->fan_div[nr]) + val;
2662 low = fan_from_reg16(data->target_speed[nr],
2663 data->fan_div[nr]) - val;
2669 val = (fan_to_reg(low, data->fan_div[nr]) -
2670 fan_to_reg(high, data->fan_div[nr])) / 2;
2672 /* Limit tolerance as needed */
2673 val = clamp_val(val, 0, data->speed_tolerance_limit);
2675 mutex_lock(&data->update_lock);
2676 data->target_speed_tolerance[nr] = val;
2677 pwm_update_registers(data, nr);
2678 mutex_unlock(&data->update_lock);
2682 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2683 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2685 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2686 store_pwm_enable, 0);
2687 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2688 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2689 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2690 show_target_temp, store_target_temp, 0);
2691 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2692 show_target_speed, store_target_speed, 0);
2693 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2694 show_speed_tolerance, store_speed_tolerance, 0);
2696 /* Smart Fan registers */
2699 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2701 struct nct6775_data *data = nct6775_update_device(dev);
2702 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2704 int index = sattr->index;
2706 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2710 store_weight_temp(struct device *dev, struct device_attribute *attr,
2711 const char *buf, size_t count)
2713 struct nct6775_data *data = dev_get_drvdata(dev);
2714 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2716 int index = sattr->index;
2720 err = kstrtoul(buf, 10, &val);
2724 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2726 mutex_lock(&data->update_lock);
2727 data->weight_temp[index][nr] = val;
2728 nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2729 mutex_unlock(&data->update_lock);
2733 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2734 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2735 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2736 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2737 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2738 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2739 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2740 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2741 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2742 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2743 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2744 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2747 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2749 struct nct6775_data *data = nct6775_update_device(dev);
2750 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2752 int index = sattr->index;
2754 return sprintf(buf, "%d\n",
2755 step_time_from_reg(data->fan_time[index][nr],
2756 data->pwm_mode[nr]));
2760 store_fan_time(struct device *dev, struct device_attribute *attr,
2761 const char *buf, size_t count)
2763 struct nct6775_data *data = dev_get_drvdata(dev);
2764 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2766 int index = sattr->index;
2770 err = kstrtoul(buf, 10, &val);
2774 val = step_time_to_reg(val, data->pwm_mode[nr]);
2775 mutex_lock(&data->update_lock);
2776 data->fan_time[index][nr] = val;
2777 nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2778 mutex_unlock(&data->update_lock);
2782 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
2784 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2786 struct nct6775_data *data = dev_get_drvdata(dev);
2788 return sprintf(buf, "%s\n", data->name);
2791 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2795 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2797 struct nct6775_data *data = nct6775_update_device(dev);
2798 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2800 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2804 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2805 const char *buf, size_t count)
2807 struct nct6775_data *data = dev_get_drvdata(dev);
2808 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2810 int point = sattr->index;
2815 err = kstrtoul(buf, 10, &val);
2821 if (point == data->auto_pwm_num) {
2822 if (data->kind != nct6775 && !val)
2824 if (data->kind != nct6779 && val)
2828 mutex_lock(&data->update_lock);
2829 data->auto_pwm[nr][point] = val;
2830 if (point < data->auto_pwm_num) {
2831 nct6775_write_value(data,
2832 NCT6775_AUTO_PWM(data, nr, point),
2833 data->auto_pwm[nr][point]);
2835 switch (data->kind) {
2837 /* disable if needed (pwm == 0) */
2838 reg = nct6775_read_value(data,
2839 NCT6775_REG_CRITICAL_ENAB[nr]);
2844 nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2848 break; /* always enabled, nothing to do */
2854 nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2856 reg = nct6775_read_value(data,
2857 data->REG_CRITICAL_PWM_ENABLE[nr]);
2859 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2861 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2862 nct6775_write_value(data,
2863 data->REG_CRITICAL_PWM_ENABLE[nr],
2868 mutex_unlock(&data->update_lock);
2873 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2875 struct nct6775_data *data = nct6775_update_device(dev);
2876 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2878 int point = sattr->index;
2881 * We don't know for sure if the temperature is signed or unsigned.
2882 * Assume it is unsigned.
2884 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2888 store_auto_temp(struct device *dev, struct device_attribute *attr,
2889 const char *buf, size_t count)
2891 struct nct6775_data *data = dev_get_drvdata(dev);
2892 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2894 int point = sattr->index;
2898 err = kstrtoul(buf, 10, &val);
2904 mutex_lock(&data->update_lock);
2905 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2906 if (point < data->auto_pwm_num) {
2907 nct6775_write_value(data,
2908 NCT6775_AUTO_TEMP(data, nr, point),
2909 data->auto_temp[nr][point]);
2911 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2912 data->auto_temp[nr][point]);
2914 mutex_unlock(&data->update_lock);
2918 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2919 struct attribute *attr, int index)
2921 struct device *dev = container_of(kobj, struct device, kobj);
2922 struct nct6775_data *data = dev_get_drvdata(dev);
2923 int pwm = index / 36; /* pwm index */
2924 int nr = index % 36; /* attribute index */
2926 if (!(data->has_pwm & (1 << pwm)))
2929 if ((nr >= 14 && nr <= 18) || nr == 21) /* weight */
2930 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
2932 if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2934 if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2936 if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2939 if (nr >= 22 && nr <= 35) { /* auto point */
2940 int api = (nr - 22) / 2; /* auto point index */
2942 if (api > data->auto_pwm_num)
2948 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
2949 show_fan_time, store_fan_time, 0, 0);
2950 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
2951 show_fan_time, store_fan_time, 0, 1);
2952 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
2953 show_fan_time, store_fan_time, 0, 2);
2954 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
2956 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
2958 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
2959 show_temp_tolerance, store_temp_tolerance, 0, 0);
2960 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
2961 S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2964 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2967 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
2970 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
2971 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
2972 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
2973 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2975 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
2976 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
2977 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
2978 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2980 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
2981 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
2982 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
2983 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2985 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
2986 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
2987 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
2988 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
2990 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
2991 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
2992 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
2993 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
2995 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
2996 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
2997 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
2998 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
3000 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
3001 S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
3002 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
3003 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
3006 * nct6775_pwm_is_visible uses the index into the following array
3007 * to determine if attributes should be created or not.
3008 * Any change in order or content must be matched.
3010 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
3011 &sensor_dev_template_pwm,
3012 &sensor_dev_template_pwm_mode,
3013 &sensor_dev_template_pwm_enable,
3014 &sensor_dev_template_pwm_temp_sel,
3015 &sensor_dev_template_pwm_temp_tolerance,
3016 &sensor_dev_template_pwm_crit_temp_tolerance,
3017 &sensor_dev_template_pwm_target_temp,
3018 &sensor_dev_template_fan_target,
3019 &sensor_dev_template_fan_tolerance,
3020 &sensor_dev_template_pwm_stop_time,
3021 &sensor_dev_template_pwm_step_up_time,
3022 &sensor_dev_template_pwm_step_down_time,
3023 &sensor_dev_template_pwm_start,
3024 &sensor_dev_template_pwm_floor,
3025 &sensor_dev_template_pwm_weight_temp_sel, /* 14 */
3026 &sensor_dev_template_pwm_weight_temp_step,
3027 &sensor_dev_template_pwm_weight_temp_step_tol,
3028 &sensor_dev_template_pwm_weight_temp_step_base,
3029 &sensor_dev_template_pwm_weight_duty_step, /* 18 */
3030 &sensor_dev_template_pwm_max, /* 19 */
3031 &sensor_dev_template_pwm_step, /* 20 */
3032 &sensor_dev_template_pwm_weight_duty_base, /* 21 */
3033 &sensor_dev_template_pwm_auto_point1_pwm, /* 22 */
3034 &sensor_dev_template_pwm_auto_point1_temp,
3035 &sensor_dev_template_pwm_auto_point2_pwm,
3036 &sensor_dev_template_pwm_auto_point2_temp,
3037 &sensor_dev_template_pwm_auto_point3_pwm,
3038 &sensor_dev_template_pwm_auto_point3_temp,
3039 &sensor_dev_template_pwm_auto_point4_pwm,
3040 &sensor_dev_template_pwm_auto_point4_temp,
3041 &sensor_dev_template_pwm_auto_point5_pwm,
3042 &sensor_dev_template_pwm_auto_point5_temp,
3043 &sensor_dev_template_pwm_auto_point6_pwm,
3044 &sensor_dev_template_pwm_auto_point6_temp,
3045 &sensor_dev_template_pwm_auto_point7_pwm,
3046 &sensor_dev_template_pwm_auto_point7_temp, /* 35 */
3051 static struct sensor_template_group nct6775_pwm_template_group = {
3052 .templates = nct6775_attributes_pwm_template,
3053 .is_visible = nct6775_pwm_is_visible,
3058 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3060 struct nct6775_data *data = dev_get_drvdata(dev);
3062 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3065 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3067 /* Case open detection */
3070 clear_caseopen(struct device *dev, struct device_attribute *attr,
3071 const char *buf, size_t count)
3073 struct nct6775_data *data = dev_get_drvdata(dev);
3074 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3079 if (kstrtoul(buf, 10, &val) || val != 0)
3082 mutex_lock(&data->update_lock);
3085 * Use CR registers to clear caseopen status.
3086 * The CR registers are the same for all chips, and not all chips
3087 * support clearing the caseopen status through "regular" registers.
3089 ret = superio_enter(data->sioreg);
3095 superio_select(data->sioreg, NCT6775_LD_ACPI);
3096 reg = superio_inb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3097 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3098 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3099 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3100 superio_outb(data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3101 superio_exit(data->sioreg);
3103 data->valid = false; /* Force cache refresh */
3105 mutex_unlock(&data->update_lock);
3109 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3110 clear_caseopen, INTRUSION_ALARM_BASE);
3111 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3112 clear_caseopen, INTRUSION_ALARM_BASE + 1);
3113 static SENSOR_DEVICE_ATTR(intrusion0_beep, S_IWUSR | S_IRUGO, show_beep,
3114 store_beep, INTRUSION_ALARM_BASE);
3115 static SENSOR_DEVICE_ATTR(intrusion1_beep, S_IWUSR | S_IRUGO, show_beep,
3116 store_beep, INTRUSION_ALARM_BASE + 1);
3117 static SENSOR_DEVICE_ATTR(beep_enable, S_IWUSR | S_IRUGO, show_beep,
3118 store_beep, BEEP_ENABLE_BASE);
3120 static umode_t nct6775_other_is_visible(struct kobject *kobj,
3121 struct attribute *attr, int index)
3123 struct device *dev = container_of(kobj, struct device, kobj);
3124 struct nct6775_data *data = dev_get_drvdata(dev);
3126 if (index == 0 && !data->have_vid)
3129 if (index == 1 || index == 2) {
3130 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
3134 if (index == 3 || index == 4) {
3135 if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
3143 * nct6775_other_is_visible uses the index into the following array
3144 * to determine if attributes should be created or not.
3145 * Any change in order or content must be matched.
3147 static struct attribute *nct6775_attributes_other[] = {
3148 &dev_attr_cpu0_vid.attr, /* 0 */
3149 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr, /* 1 */
3150 &sensor_dev_attr_intrusion1_alarm.dev_attr.attr, /* 2 */
3151 &sensor_dev_attr_intrusion0_beep.dev_attr.attr, /* 3 */
3152 &sensor_dev_attr_intrusion1_beep.dev_attr.attr, /* 4 */
3153 &sensor_dev_attr_beep_enable.dev_attr.attr, /* 5 */
3154 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
3155 &dev_attr_name.attr,
3160 static const struct attribute_group nct6775_group_other = {
3161 .attrs = nct6775_attributes_other,
3162 .is_visible = nct6775_other_is_visible,
3165 static inline void nct6775_init_device(struct nct6775_data *data)
3170 /* Start monitoring if needed */
3171 if (data->REG_CONFIG) {
3172 tmp = nct6775_read_value(data, data->REG_CONFIG);
3174 nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3177 /* Enable temperature sensors if needed */
3178 for (i = 0; i < NUM_TEMP; i++) {
3179 if (!(data->have_temp & (1 << i)))
3181 if (!data->reg_temp_config[i])
3183 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3185 nct6775_write_value(data, data->reg_temp_config[i],
3189 /* Enable VBAT monitoring if needed */
3190 tmp = nct6775_read_value(data, data->REG_VBAT);
3192 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3194 diode = nct6775_read_value(data, data->REG_DIODE);
3196 for (i = 0; i < data->temp_fixed_num; i++) {
3197 if (!(data->have_temp_fixed & (1 << i)))
3199 if ((tmp & (data->DIODE_MASK << i))) /* diode */
3201 = 3 - ((diode >> i) & data->DIODE_MASK);
3202 else /* thermistor */
3203 data->temp_type[i] = 4;
3208 nct6775_check_fan_inputs(struct nct6775_data *data)
3210 bool fan3pin, fan4pin, fan4min, fan5pin, fan6pin;
3211 bool pwm3pin, pwm4pin, pwm5pin, pwm6pin;
3212 int sioreg = data->sioreg;
3215 /* Store SIO_REG_ENABLE for use during resume */
3216 superio_select(sioreg, NCT6775_LD_HWM);
3217 data->sio_reg_enable = superio_inb(sioreg, SIO_REG_ENABLE);
3219 /* fan4 and fan5 share some pins with the GPIO and serial flash */
3220 if (data->kind == nct6775) {
3221 regval = superio_inb(sioreg, 0x2c);
3223 fan3pin = regval & (1 << 6);
3224 pwm3pin = regval & (1 << 7);
3226 /* On NCT6775, fan4 shares pins with the fdc interface */
3227 fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
3234 } else if (data->kind == nct6776) {
3235 bool gpok = superio_inb(sioreg, 0x27) & 0x80;
3236 const char *board_vendor, *board_name;
3238 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
3239 board_name = dmi_get_system_info(DMI_BOARD_NAME);
3241 if (board_name && board_vendor &&
3242 !strcmp(board_vendor, "ASRock")) {
3244 * Auxiliary fan monitoring is not enabled on ASRock
3245 * Z77 Pro4-M if booted in UEFI Ultra-FastBoot mode.
3246 * Observed with BIOS version 2.00.
3248 if (!strcmp(board_name, "Z77 Pro4-M")) {
3249 if ((data->sio_reg_enable & 0xe0) != 0xe0) {
3250 data->sio_reg_enable |= 0xe0;
3251 superio_outb(sioreg, SIO_REG_ENABLE,
3252 data->sio_reg_enable);
3257 if (data->sio_reg_enable & 0x80)
3260 fan3pin = !(superio_inb(sioreg, 0x24) & 0x40);
3262 if (data->sio_reg_enable & 0x40)
3265 fan4pin = superio_inb(sioreg, 0x1C) & 0x01;
3267 if (data->sio_reg_enable & 0x20)
3270 fan5pin = superio_inb(sioreg, 0x1C) & 0x02;
3278 } else if (data->kind == nct6106) {
3279 regval = superio_inb(sioreg, 0x24);
3280 fan3pin = !(regval & 0x80);
3281 pwm3pin = regval & 0x08;
3290 } else { /* NCT6779D, NCT6791D, NCT6792D, or NCT6793D */
3291 regval = superio_inb(sioreg, 0x1c);
3293 fan3pin = !(regval & (1 << 5));
3294 fan4pin = !(regval & (1 << 6));
3295 fan5pin = !(regval & (1 << 7));
3297 pwm3pin = !(regval & (1 << 0));
3298 pwm4pin = !(regval & (1 << 1));
3299 pwm5pin = !(regval & (1 << 2));
3303 if (data->kind == nct6791 || data->kind == nct6792 ||
3304 data->kind == nct6793) {
3305 regval = superio_inb(sioreg, 0x2d);
3306 fan6pin = (regval & (1 << 1));
3307 pwm6pin = (regval & (1 << 0));
3308 } else { /* NCT6779D */
3314 /* fan 1 and 2 (0x03) are always present */
3315 data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
3316 (fan5pin << 4) | (fan6pin << 5);
3317 data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
3319 data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
3320 (pwm5pin << 4) | (pwm6pin << 5);
3323 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3324 int *available, int *mask)
3329 for (i = 0; i < data->pwm_num && *available; i++) {
3334 src = nct6775_read_value(data, regp[i]);
3336 if (!src || (*mask & (1 << src)))
3338 if (src >= data->temp_label_num ||
3339 !strlen(data->temp_label[src]))
3342 index = __ffs(*available);
3343 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3344 *available &= ~(1 << index);
3349 static int nct6775_probe(struct platform_device *pdev)
3351 struct device *dev = &pdev->dev;
3352 struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
3353 struct nct6775_data *data;
3354 struct resource *res;
3356 int src, mask, available;
3357 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3358 const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3359 const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3360 int num_reg_temp, num_reg_temp_mon;
3362 struct attribute_group *group;
3363 struct device *hwmon_dev;
3364 int num_attr_groups = 0;
3366 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3367 if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3371 data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3376 data->kind = sio_data->kind;
3377 data->sioreg = sio_data->sioreg;
3378 data->addr = res->start;
3379 mutex_init(&data->update_lock);
3380 data->name = nct6775_device_names[data->kind];
3381 data->bank = 0xff; /* Force initial bank selection */
3382 platform_set_drvdata(pdev, data);
3384 switch (data->kind) {
3388 data->auto_pwm_num = 4;
3389 data->temp_fixed_num = 3;
3390 data->num_temp_alarms = 6;
3391 data->num_temp_beeps = 6;
3393 data->fan_from_reg = fan_from_reg13;
3394 data->fan_from_reg_min = fan_from_reg13;
3396 data->temp_label = nct6776_temp_label;
3397 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3399 data->REG_VBAT = NCT6106_REG_VBAT;
3400 data->REG_DIODE = NCT6106_REG_DIODE;
3401 data->DIODE_MASK = NCT6106_DIODE_MASK;
3402 data->REG_VIN = NCT6106_REG_IN;
3403 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3404 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3405 data->REG_TARGET = NCT6106_REG_TARGET;
3406 data->REG_FAN = NCT6106_REG_FAN;
3407 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3408 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3409 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3410 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3411 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3412 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3413 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3414 data->REG_PWM[0] = NCT6106_REG_PWM;
3415 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3416 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3417 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3418 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3419 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3420 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3421 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3422 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3423 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3424 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3425 data->REG_CRITICAL_TEMP_TOLERANCE
3426 = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3427 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3428 data->CRITICAL_PWM_ENABLE_MASK
3429 = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3430 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3431 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3432 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3433 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3434 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3435 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3436 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3437 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3438 data->REG_ALARM = NCT6106_REG_ALARM;
3439 data->ALARM_BITS = NCT6106_ALARM_BITS;
3440 data->REG_BEEP = NCT6106_REG_BEEP;
3441 data->BEEP_BITS = NCT6106_BEEP_BITS;
3443 reg_temp = NCT6106_REG_TEMP;
3444 reg_temp_mon = NCT6106_REG_TEMP_MON;
3445 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3446 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3447 reg_temp_over = NCT6106_REG_TEMP_OVER;
3448 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3449 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3450 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3451 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3452 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3453 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3459 data->auto_pwm_num = 6;
3460 data->has_fan_div = true;
3461 data->temp_fixed_num = 3;
3462 data->num_temp_alarms = 3;
3463 data->num_temp_beeps = 3;
3465 data->ALARM_BITS = NCT6775_ALARM_BITS;
3466 data->BEEP_BITS = NCT6775_BEEP_BITS;
3468 data->fan_from_reg = fan_from_reg16;
3469 data->fan_from_reg_min = fan_from_reg8;
3470 data->target_temp_mask = 0x7f;
3471 data->tolerance_mask = 0x0f;
3472 data->speed_tolerance_limit = 15;
3474 data->temp_label = nct6775_temp_label;
3475 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3477 data->REG_CONFIG = NCT6775_REG_CONFIG;
3478 data->REG_VBAT = NCT6775_REG_VBAT;
3479 data->REG_DIODE = NCT6775_REG_DIODE;
3480 data->DIODE_MASK = NCT6775_DIODE_MASK;
3481 data->REG_VIN = NCT6775_REG_IN;
3482 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3483 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3484 data->REG_TARGET = NCT6775_REG_TARGET;
3485 data->REG_FAN = NCT6775_REG_FAN;
3486 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3487 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3488 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3489 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3490 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3491 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3492 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3493 data->REG_PWM[0] = NCT6775_REG_PWM;
3494 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3495 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3496 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3497 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3498 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3499 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3500 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3501 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3502 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3503 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3504 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3505 data->REG_CRITICAL_TEMP_TOLERANCE
3506 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3507 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3508 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3509 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3510 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3511 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3512 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3513 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3514 data->REG_ALARM = NCT6775_REG_ALARM;
3515 data->REG_BEEP = NCT6775_REG_BEEP;
3517 reg_temp = NCT6775_REG_TEMP;
3518 reg_temp_mon = NCT6775_REG_TEMP_MON;
3519 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3520 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3521 reg_temp_over = NCT6775_REG_TEMP_OVER;
3522 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3523 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3524 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3525 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3531 data->auto_pwm_num = 4;
3532 data->has_fan_div = false;
3533 data->temp_fixed_num = 3;
3534 data->num_temp_alarms = 3;
3535 data->num_temp_beeps = 6;
3537 data->ALARM_BITS = NCT6776_ALARM_BITS;
3538 data->BEEP_BITS = NCT6776_BEEP_BITS;
3540 data->fan_from_reg = fan_from_reg13;
3541 data->fan_from_reg_min = fan_from_reg13;
3542 data->target_temp_mask = 0xff;
3543 data->tolerance_mask = 0x07;
3544 data->speed_tolerance_limit = 63;
3546 data->temp_label = nct6776_temp_label;
3547 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3549 data->REG_CONFIG = NCT6775_REG_CONFIG;
3550 data->REG_VBAT = NCT6775_REG_VBAT;
3551 data->REG_DIODE = NCT6775_REG_DIODE;
3552 data->DIODE_MASK = NCT6775_DIODE_MASK;
3553 data->REG_VIN = NCT6775_REG_IN;
3554 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3555 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3556 data->REG_TARGET = NCT6775_REG_TARGET;
3557 data->REG_FAN = NCT6775_REG_FAN;
3558 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3559 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3560 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3561 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3562 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3563 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3564 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3565 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3566 data->REG_PWM[0] = NCT6775_REG_PWM;
3567 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3568 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3569 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3570 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3571 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3572 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3573 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3574 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3575 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3576 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3577 data->REG_CRITICAL_TEMP_TOLERANCE
3578 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3579 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3580 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3581 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3582 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3583 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3584 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3585 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3586 data->REG_ALARM = NCT6775_REG_ALARM;
3587 data->REG_BEEP = NCT6776_REG_BEEP;
3589 reg_temp = NCT6775_REG_TEMP;
3590 reg_temp_mon = NCT6775_REG_TEMP_MON;
3591 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3592 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3593 reg_temp_over = NCT6775_REG_TEMP_OVER;
3594 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3595 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3596 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3597 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3603 data->auto_pwm_num = 4;
3604 data->has_fan_div = false;
3605 data->temp_fixed_num = 6;
3606 data->num_temp_alarms = 2;
3607 data->num_temp_beeps = 2;
3609 data->ALARM_BITS = NCT6779_ALARM_BITS;
3610 data->BEEP_BITS = NCT6779_BEEP_BITS;
3612 data->fan_from_reg = fan_from_reg13;
3613 data->fan_from_reg_min = fan_from_reg13;
3614 data->target_temp_mask = 0xff;
3615 data->tolerance_mask = 0x07;
3616 data->speed_tolerance_limit = 63;
3618 data->temp_label = nct6779_temp_label;
3619 data->temp_label_num = NCT6779_NUM_LABELS;
3621 data->REG_CONFIG = NCT6775_REG_CONFIG;
3622 data->REG_VBAT = NCT6775_REG_VBAT;
3623 data->REG_DIODE = NCT6775_REG_DIODE;
3624 data->DIODE_MASK = NCT6775_DIODE_MASK;
3625 data->REG_VIN = NCT6779_REG_IN;
3626 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3627 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3628 data->REG_TARGET = NCT6775_REG_TARGET;
3629 data->REG_FAN = NCT6779_REG_FAN;
3630 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3631 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3632 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3633 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3634 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3635 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3636 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3637 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3638 data->REG_PWM[0] = NCT6775_REG_PWM;
3639 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3640 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3641 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3642 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3643 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3644 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3645 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3646 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3647 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3648 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3649 data->REG_CRITICAL_TEMP_TOLERANCE
3650 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3651 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3652 data->CRITICAL_PWM_ENABLE_MASK
3653 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3654 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3655 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3656 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3657 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3658 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3659 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3660 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3661 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3662 data->REG_ALARM = NCT6779_REG_ALARM;
3663 data->REG_BEEP = NCT6776_REG_BEEP;
3665 reg_temp = NCT6779_REG_TEMP;
3666 reg_temp_mon = NCT6779_REG_TEMP_MON;
3667 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3668 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3669 reg_temp_over = NCT6779_REG_TEMP_OVER;
3670 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3671 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3672 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3673 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3681 data->auto_pwm_num = 4;
3682 data->has_fan_div = false;
3683 data->temp_fixed_num = 6;
3684 data->num_temp_alarms = 2;
3685 data->num_temp_beeps = 2;
3687 data->ALARM_BITS = NCT6791_ALARM_BITS;
3688 data->BEEP_BITS = NCT6779_BEEP_BITS;
3690 data->fan_from_reg = fan_from_reg13;
3691 data->fan_from_reg_min = fan_from_reg13;
3692 data->target_temp_mask = 0xff;
3693 data->tolerance_mask = 0x07;
3694 data->speed_tolerance_limit = 63;
3696 data->temp_label = nct6779_temp_label;
3697 data->temp_label_num = NCT6791_NUM_LABELS;
3699 data->REG_CONFIG = NCT6775_REG_CONFIG;
3700 data->REG_VBAT = NCT6775_REG_VBAT;
3701 data->REG_DIODE = NCT6775_REG_DIODE;
3702 data->DIODE_MASK = NCT6775_DIODE_MASK;
3703 data->REG_VIN = NCT6779_REG_IN;
3704 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3705 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3706 data->REG_TARGET = NCT6775_REG_TARGET;
3707 data->REG_FAN = NCT6779_REG_FAN;
3708 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3709 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3710 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3711 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3712 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3713 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3714 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3715 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3716 data->REG_PWM[0] = NCT6775_REG_PWM;
3717 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3718 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3719 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3720 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3721 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3722 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3723 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3724 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3725 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3726 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3727 data->REG_CRITICAL_TEMP_TOLERANCE
3728 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3729 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3730 data->CRITICAL_PWM_ENABLE_MASK
3731 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3732 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3733 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3734 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3735 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3736 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3737 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3738 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3739 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3740 data->REG_ALARM = NCT6791_REG_ALARM;
3741 if (data->kind == nct6791)
3742 data->REG_BEEP = NCT6776_REG_BEEP;
3744 data->REG_BEEP = NCT6792_REG_BEEP;
3746 reg_temp = NCT6779_REG_TEMP;
3747 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3748 if (data->kind == nct6791) {
3749 reg_temp_mon = NCT6779_REG_TEMP_MON;
3750 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3752 reg_temp_mon = NCT6792_REG_TEMP_MON;
3753 num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
3755 reg_temp_over = NCT6779_REG_TEMP_OVER;
3756 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3757 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3758 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3759 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3765 data->have_in = (1 << data->in_num) - 1;
3766 data->have_temp = 0;
3769 * On some boards, not all available temperature sources are monitored,
3770 * even though some of the monitoring registers are unused.
3771 * Get list of unused monitoring registers, then detect if any fan
3772 * controls are configured to use unmonitored temperature sources.
3773 * If so, assign the unmonitored temperature sources to available
3774 * monitoring registers.
3778 for (i = 0; i < num_reg_temp; i++) {
3779 if (reg_temp[i] == 0)
3782 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3783 if (!src || (mask & (1 << src)))
3784 available |= 1 << i;
3790 * Now find unmonitored temperature registers and enable monitoring
3791 * if additional monitoring registers are available.
3793 add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3794 add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3797 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
3798 for (i = 0; i < num_reg_temp; i++) {
3799 if (reg_temp[i] == 0)
3802 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3803 if (!src || (mask & (1 << src)))
3806 if (src >= data->temp_label_num ||
3807 !strlen(data->temp_label[src])) {
3809 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3810 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3816 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3817 if (src <= data->temp_fixed_num) {
3818 data->have_temp |= 1 << (src - 1);
3819 data->have_temp_fixed |= 1 << (src - 1);
3820 data->reg_temp[0][src - 1] = reg_temp[i];
3821 data->reg_temp[1][src - 1] = reg_temp_over[i];
3822 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3823 if (reg_temp_crit_h && reg_temp_crit_h[i])
3824 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3825 else if (reg_temp_crit[src - 1])
3826 data->reg_temp[3][src - 1]
3827 = reg_temp_crit[src - 1];
3828 if (reg_temp_crit_l && reg_temp_crit_l[i])
3829 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3830 data->reg_temp_config[src - 1] = reg_temp_config[i];
3831 data->temp_src[src - 1] = src;
3838 /* Use dynamic index for other sources */
3839 data->have_temp |= 1 << s;
3840 data->reg_temp[0][s] = reg_temp[i];
3841 data->reg_temp[1][s] = reg_temp_over[i];
3842 data->reg_temp[2][s] = reg_temp_hyst[i];
3843 data->reg_temp_config[s] = reg_temp_config[i];
3844 if (reg_temp_crit_h && reg_temp_crit_h[i])
3845 data->reg_temp[3][s] = reg_temp_crit_h[i];
3846 else if (reg_temp_crit[src - 1])
3847 data->reg_temp[3][s] = reg_temp_crit[src - 1];
3848 if (reg_temp_crit_l && reg_temp_crit_l[i])
3849 data->reg_temp[4][s] = reg_temp_crit_l[i];
3851 data->temp_src[s] = src;
3856 * Repeat with temperatures used for fan control.
3857 * This set of registers does not support limits.
3859 for (i = 0; i < num_reg_temp_mon; i++) {
3860 if (reg_temp_mon[i] == 0)
3863 src = nct6775_read_value(data, data->REG_TEMP_SEL[i]) & 0x1f;
3864 if (!src || (mask & (1 << src)))
3867 if (src >= data->temp_label_num ||
3868 !strlen(data->temp_label[src])) {
3870 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3871 src, i, data->REG_TEMP_SEL[i],
3878 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3879 if (src <= data->temp_fixed_num) {
3880 if (data->have_temp & (1 << (src - 1)))
3882 data->have_temp |= 1 << (src - 1);
3883 data->have_temp_fixed |= 1 << (src - 1);
3884 data->reg_temp[0][src - 1] = reg_temp_mon[i];
3885 data->temp_src[src - 1] = src;
3892 /* Use dynamic index for other sources */
3893 data->have_temp |= 1 << s;
3894 data->reg_temp[0][s] = reg_temp_mon[i];
3895 data->temp_src[s] = src;
3899 #ifdef USE_ALTERNATE
3901 * Go through the list of alternate temp registers and enable
3903 * The temperature is already monitored if the respective bit in <mask>
3906 for (i = 0; i < data->temp_label_num - 1; i++) {
3907 if (!reg_temp_alternate[i])
3909 if (mask & (1 << (i + 1)))
3911 if (i < data->temp_fixed_num) {
3912 if (data->have_temp & (1 << i))
3914 data->have_temp |= 1 << i;
3915 data->have_temp_fixed |= 1 << i;
3916 data->reg_temp[0][i] = reg_temp_alternate[i];
3917 if (i < num_reg_temp) {
3918 data->reg_temp[1][i] = reg_temp_over[i];
3919 data->reg_temp[2][i] = reg_temp_hyst[i];
3921 data->temp_src[i] = i + 1;
3925 if (s >= NUM_TEMP) /* Abort if no more space */
3928 data->have_temp |= 1 << s;
3929 data->reg_temp[0][s] = reg_temp_alternate[i];
3930 data->temp_src[s] = i + 1;
3933 #endif /* USE_ALTERNATE */
3935 /* Initialize the chip */
3936 nct6775_init_device(data);
3938 err = superio_enter(sio_data->sioreg);
3942 cr2a = superio_inb(sio_data->sioreg, 0x2a);
3943 switch (data->kind) {
3945 data->have_vid = (cr2a & 0x40);
3948 data->have_vid = (cr2a & 0x60) == 0x40;
3960 * We can get the VID input values directly at logical device D 0xe3.
3962 if (data->have_vid) {
3963 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3964 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3965 data->vrm = vid_which_vrm();
3971 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3972 tmp = superio_inb(sio_data->sioreg,
3973 NCT6775_REG_CR_FAN_DEBOUNCE);
3974 switch (data->kind) {
3991 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3993 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3997 nct6775_check_fan_inputs(data);
3999 superio_exit(sio_data->sioreg);
4001 /* Read fan clock dividers immediately */
4002 nct6775_init_fan_common(dev, data);
4004 /* Register sysfs hooks */
4005 group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
4008 return PTR_ERR(group);
4010 data->groups[num_attr_groups++] = group;
4012 group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
4013 fls(data->have_in));
4015 return PTR_ERR(group);
4017 data->groups[num_attr_groups++] = group;
4019 group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
4020 fls(data->has_fan));
4022 return PTR_ERR(group);
4024 data->groups[num_attr_groups++] = group;
4026 group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
4027 fls(data->have_temp));
4029 return PTR_ERR(group);
4031 data->groups[num_attr_groups++] = group;
4032 data->groups[num_attr_groups++] = &nct6775_group_other;
4034 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4035 err = sysfs_create_groups(&dev->kobj, data->groups);
4038 hwmon_dev = hwmon_device_register(dev);
4039 if (IS_ERR(hwmon_dev)) {
4040 sysfs_remove_groups(&dev->kobj, data->groups);
4041 return PTR_ERR(hwmon_dev);
4043 data->hwmon_dev = hwmon_dev;
4045 hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4046 data, data->groups);
4048 return PTR_ERR_OR_ZERO(hwmon_dev);
4051 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4052 static int nct6775_remove(struct platform_device *pdev)
4054 struct nct6775_data *data = platform_get_drvdata(pdev);
4056 hwmon_device_unregister(data->hwmon_dev);
4057 sysfs_remove_groups(&pdev->dev.kobj, data->groups);
4062 static void nct6791_enable_io_mapping(int sioaddr)
4066 val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
4068 pr_info("Enabling hardware monitor logical device mappings.\n");
4069 superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
4074 static int __maybe_unused nct6775_suspend(struct device *dev)
4076 struct nct6775_data *data = nct6775_update_device(dev);
4078 mutex_lock(&data->update_lock);
4079 data->vbat = nct6775_read_value(data, data->REG_VBAT);
4080 if (data->kind == nct6775) {
4081 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
4082 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
4084 mutex_unlock(&data->update_lock);
4089 static int __maybe_unused nct6775_resume(struct device *dev)
4091 struct nct6775_data *data = dev_get_drvdata(dev);
4092 int sioreg = data->sioreg;
4096 mutex_lock(&data->update_lock);
4097 data->bank = 0xff; /* Force initial bank selection */
4099 err = superio_enter(sioreg);
4103 superio_select(sioreg, NCT6775_LD_HWM);
4104 reg = superio_inb(sioreg, SIO_REG_ENABLE);
4105 if (reg != data->sio_reg_enable)
4106 superio_outb(sioreg, SIO_REG_ENABLE, data->sio_reg_enable);
4108 if (data->kind == nct6791 || data->kind == nct6792 ||
4109 data->kind == nct6793)
4110 nct6791_enable_io_mapping(sioreg);
4112 superio_exit(sioreg);
4114 /* Restore limits */
4115 for (i = 0; i < data->in_num; i++) {
4116 if (!(data->have_in & (1 << i)))
4119 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4121 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4125 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4126 if (!(data->has_fan_min & (1 << i)))
4129 nct6775_write_value(data, data->REG_FAN_MIN[i],
4133 for (i = 0; i < NUM_TEMP; i++) {
4134 if (!(data->have_temp & (1 << i)))
4137 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4138 if (data->reg_temp[j][i])
4139 nct6775_write_temp(data, data->reg_temp[j][i],
4143 /* Restore other settings */
4144 nct6775_write_value(data, data->REG_VBAT, data->vbat);
4145 if (data->kind == nct6775) {
4146 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4147 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4151 /* Force re-reading all values */
4152 data->valid = false;
4153 mutex_unlock(&data->update_lock);
4158 static SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops, nct6775_suspend, nct6775_resume);
4160 static struct platform_driver nct6775_driver = {
4162 .owner = THIS_MODULE,
4164 .pm = &nct6775_dev_pm_ops,
4166 .probe = nct6775_probe,
4167 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 13, 0)
4168 .remove = nct6775_remove,
4172 static const char * const nct6775_sio_names[] __initconst = {
4181 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4182 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
4188 err = superio_enter(sioaddr);
4195 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4196 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4197 switch (val & SIO_ID_MASK) {
4198 case SIO_NCT6106_ID:
4199 sio_data->kind = nct6106;
4201 case SIO_NCT6775_ID:
4202 sio_data->kind = nct6775;
4204 case SIO_NCT6776_ID:
4205 sio_data->kind = nct6776;
4207 case SIO_NCT6779_ID:
4208 sio_data->kind = nct6779;
4210 case SIO_NCT6791_ID:
4211 sio_data->kind = nct6791;
4213 case SIO_NCT6792_ID:
4214 sio_data->kind = nct6792;
4216 case SIO_NCT6793_ID:
4217 sio_data->kind = nct6793;
4221 pr_debug("unsupported chip ID: 0x%04x\n", val);
4222 superio_exit(sioaddr);
4226 /* We have a known chip, find the HWM I/O address */
4227 superio_select(sioaddr, NCT6775_LD_HWM);
4228 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4229 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4230 addr = val & IOREGION_ALIGNMENT;
4232 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4233 superio_exit(sioaddr);
4237 /* Activate logical device if needed */
4238 val = superio_inb(sioaddr, SIO_REG_ENABLE);
4239 if (!(val & 0x01)) {
4240 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4241 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4244 if (sio_data->kind == nct6791 || sio_data->kind == nct6792 ||
4245 sio_data->kind == nct6793)
4246 nct6791_enable_io_mapping(sioaddr);
4248 superio_exit(sioaddr);
4249 pr_info("Found %s or compatible chip at %#x:%#x\n",
4250 nct6775_sio_names[sio_data->kind], sioaddr, addr);
4251 sio_data->sioreg = sioaddr;
4257 * when Super-I/O functions move to a separate file, the Super-I/O
4258 * bus will manage the lifetime of the device and this module will only keep
4259 * track of the nct6775 driver. But since we use platform_device_alloc(), we
4260 * must keep track of the device
4262 static struct platform_device *pdev[2];
4264 static int __init sensors_nct6775_init(void)
4269 struct resource res;
4270 struct nct6775_sio_data sio_data;
4271 int sioaddr[2] = { 0x2e, 0x4e };
4273 err = platform_driver_register(&nct6775_driver);
4278 * initialize sio_data->kind and sio_data->sioreg.
4280 * when Super-I/O functions move to a separate file, the Super-I/O
4281 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4282 * nct6775 hardware monitor, and call probe()
4284 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4285 address = nct6775_find(sioaddr[i], &sio_data);
4291 pdev[i] = platform_device_alloc(DRVNAME, address);
4294 goto exit_device_unregister;
4297 err = platform_device_add_data(pdev[i], &sio_data,
4298 sizeof(struct nct6775_sio_data));
4300 goto exit_device_put;
4302 memset(&res, 0, sizeof(res));
4304 res.start = address + IOREGION_OFFSET;
4305 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4306 res.flags = IORESOURCE_IO;
4308 err = acpi_check_resource_conflict(&res);
4310 platform_device_put(pdev[i]);
4315 err = platform_device_add_resources(pdev[i], &res, 1);
4317 goto exit_device_put;
4319 /* platform_device_add calls probe() */
4320 err = platform_device_add(pdev[i]);
4322 goto exit_device_put;
4326 goto exit_unregister;
4332 platform_device_put(pdev[i]);
4333 exit_device_unregister:
4336 platform_device_unregister(pdev[i]);
4339 platform_driver_unregister(&nct6775_driver);
4343 static void __exit sensors_nct6775_exit(void)
4347 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
4349 platform_device_unregister(pdev[i]);
4351 platform_driver_unregister(&nct6775_driver);
4354 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4355 MODULE_DESCRIPTION("Driver for NCT6775F and compatible chips");
4356 MODULE_LICENSE("GPL");
4358 module_init(sensors_nct6775_init);
4359 module_exit(sensors_nct6775_exit);