2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2012 Jean Delvare <khali@linux-fr.org>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 * Supports the following chips:
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3
37 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
38 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
39 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
41 * #temp lists the number of monitored temperature sources (first value) plus
42 * the number of directly connectable temperature sensors (second value).
45 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
47 #include <linux/module.h>
48 #include <linux/init.h>
49 #include <linux/slab.h>
50 #include <linux/jiffies.h>
51 #include <linux/platform_device.h>
52 #include <linux/hwmon.h>
53 #include <linux/hwmon-sysfs.h>
54 #include <linux/hwmon-vid.h>
55 #include <linux/err.h>
56 #include <linux/mutex.h>
57 #include <linux/acpi.h>
64 enum kinds { nct6106, nct6775, nct6776, nct6779 };
66 /* used to set data->name = nct6775_device_names[data->sio_kind] */
67 static const char * const nct6775_device_names[] = {
74 static unsigned short force_id;
75 module_param(force_id, ushort, 0);
76 MODULE_PARM_DESC(force_id, "Override the detected device ID");
78 static unsigned short fan_debounce;
79 module_param(fan_debounce, ushort, 0);
80 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
82 #define DRVNAME "nct6775"
85 * Super-I/O constants and functions
88 #define NCT6775_LD_ACPI 0x0a
89 #define NCT6775_LD_HWM 0x0b
90 #define NCT6775_LD_VID 0x0d
92 #define SIO_REG_LDSEL 0x07 /* Logical device select */
93 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
94 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
95 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
97 #define SIO_NCT6106_ID 0xc450
98 #define SIO_NCT6775_ID 0xb470
99 #define SIO_NCT6776_ID 0xc330
100 #define SIO_NCT6779_ID 0xc560
101 #define SIO_ID_MASK 0xFFF0
103 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
106 superio_outb(int ioreg, int reg, int val)
109 outb(val, ioreg + 1);
113 superio_inb(int ioreg, int reg)
116 return inb(ioreg + 1);
120 superio_select(int ioreg, int ld)
122 outb(SIO_REG_LDSEL, ioreg);
127 superio_enter(int ioreg)
130 * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
132 if (!request_muxed_region(ioreg, 2, DRVNAME))
142 superio_exit(int ioreg)
146 outb(0x02, ioreg + 1);
147 release_region(ioreg, 2);
154 #define IOREGION_ALIGNMENT (~7)
155 #define IOREGION_OFFSET 5
156 #define IOREGION_LENGTH 2
157 #define ADDR_REG_OFFSET 0
158 #define DATA_REG_OFFSET 1
160 #define NCT6775_REG_BANK 0x4E
161 #define NCT6775_REG_CONFIG 0x40
164 * Not currently used:
165 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
166 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
167 * REG_MAN_ID is at port 0x4f
168 * REG_CHIP_ID is at port 0x58
171 #define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
172 #define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
174 #define NUM_REG_ALARM 7 /* Max number of alarm registers */
176 /* Common and NCT6775 specific data */
178 /* Voltage min/max registers for nr=7..14 are in bank 5 */
180 static const u16 NCT6775_REG_IN_MAX[] = {
181 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
182 0x55c, 0x55e, 0x560, 0x562 };
183 static const u16 NCT6775_REG_IN_MIN[] = {
184 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
185 0x55d, 0x55f, 0x561, 0x563 };
186 static const u16 NCT6775_REG_IN[] = {
187 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
190 #define NCT6775_REG_VBAT 0x5D
191 #define NCT6775_REG_DIODE 0x5E
192 #define NCT6775_DIODE_MASK 0x02
194 #define NCT6775_REG_FANDIV1 0x506
195 #define NCT6775_REG_FANDIV2 0x507
197 #define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
199 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
201 /* 0..15 voltages, 16..23 fans, 24..31 temperatures */
203 static const s8 NCT6775_ALARM_BITS[] = {
204 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
205 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
207 6, 7, 11, 10, 23, /* fan1..fan5 */
208 -1, -1, -1, /* unused */
209 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
210 12, -1 }; /* intrusion0, intrusion1 */
212 #define FAN_ALARM_BASE 16
213 #define TEMP_ALARM_BASE 24
214 #define INTRUSION_ALARM_BASE 30
216 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
217 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
219 /* DC or PWM output fan configuration */
220 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
221 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
223 /* Advanced Fan control, some values are common for all fans */
225 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301, 0x801, 0x901 };
226 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302, 0x802, 0x902 };
227 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
228 0x103, 0x203, 0x303, 0x803, 0x903 };
229 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
230 0x104, 0x204, 0x304, 0x804, 0x904 };
231 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
232 0x105, 0x205, 0x305, 0x805, 0x905 };
233 static const u16 NCT6775_REG_FAN_START_OUTPUT[]
234 = { 0x106, 0x206, 0x306, 0x806, 0x906 };
235 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
236 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
238 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
239 0x107, 0x207, 0x307, 0x807, 0x907 };
240 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309, 0x809, 0x909 };
241 static const u16 NCT6775_REG_PWM_READ[] = { 0x01, 0x03, 0x11, 0x13, 0x15 };
243 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
244 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
245 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
246 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0 };
248 static const u16 NCT6775_REG_TEMP[] = {
249 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
251 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
252 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
253 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
254 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
255 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
256 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
258 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
259 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
261 static const u16 NCT6775_REG_TEMP_SEL[] = {
262 0x100, 0x200, 0x300, 0x800, 0x900 };
264 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
265 0x139, 0x239, 0x339, 0x839, 0x939 };
266 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
267 0x13a, 0x23a, 0x33a, 0x83a, 0x93a };
268 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
269 0x13b, 0x23b, 0x33b, 0x83b, 0x93b };
270 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
271 0x13c, 0x23c, 0x33c, 0x83c, 0x93c };
272 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
273 0x13d, 0x23d, 0x33d, 0x83d, 0x93d };
275 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
277 static const u16 NCT6775_REG_AUTO_TEMP[] = {
278 0x121, 0x221, 0x321, 0x821, 0x921 };
279 static const u16 NCT6775_REG_AUTO_PWM[] = {
280 0x127, 0x227, 0x327, 0x827, 0x927 };
282 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
283 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
285 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
287 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
288 0x135, 0x235, 0x335, 0x835, 0x935 };
289 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
290 0x138, 0x238, 0x338, 0x838, 0x938 };
292 static const char *const nct6775_temp_label[] = {
306 "PCH_CHIP_CPU_MAX_TEMP",
316 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
317 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
319 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
320 = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
323 /* NCT6776 specific data */
325 static const s8 NCT6776_ALARM_BITS[] = {
326 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
327 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
329 6, 7, 11, 10, 23, /* fan1..fan5 */
330 -1, -1, -1, /* unused */
331 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
332 12, 9 }; /* intrusion0, intrusion1 */
334 static const u16 NCT6776_REG_TOLERANCE_H[] = {
335 0x10c, 0x20c, 0x30c, 0x80c, 0x90c };
337 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0 };
338 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0 };
340 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
341 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
343 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
344 0x13e, 0x23e, 0x33e, 0x83e, 0x93e };
346 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
347 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
349 static const char *const nct6776_temp_label[] = {
364 "PCH_CHIP_CPU_MAX_TEMP",
375 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
376 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
378 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
379 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
381 /* NCT6779 specific data */
383 static const u16 NCT6779_REG_IN[] = {
384 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
385 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
387 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
388 0x459, 0x45A, 0x45B, 0x568 };
390 static const s8 NCT6779_ALARM_BITS[] = {
391 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
392 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
394 6, 7, 11, 10, 23, /* fan1..fan5 */
395 -1, -1, -1, /* unused */
396 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
397 12, 9 }; /* intrusion0, intrusion1 */
399 static const u16 NCT6779_REG_FAN[] = { 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8 };
400 static const u16 NCT6779_REG_FAN_PULSES[] = {
401 0x644, 0x645, 0x646, 0x647, 0x648 };
403 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
404 0x136, 0x236, 0x336, 0x836, 0x936 };
405 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01
406 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
407 0x137, 0x237, 0x337, 0x837, 0x937 };
409 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
410 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
412 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
414 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
417 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
418 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
420 static const char *const nct6779_temp_label[] = {
439 "PCH_CHIP_CPU_MAX_TEMP",
450 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
451 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
452 0, 0, 0, 0, 0, 0, 0, 0,
453 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
456 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
457 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
459 /* NCT6102D/NCT6106D specific data */
461 #define NCT6106_REG_VBAT 0x318
462 #define NCT6106_REG_DIODE 0x319
463 #define NCT6106_DIODE_MASK 0x01
465 static const u16 NCT6106_REG_IN_MAX[] = {
466 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
467 static const u16 NCT6106_REG_IN_MIN[] = {
468 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
469 static const u16 NCT6106_REG_IN[] = {
470 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
472 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
473 static const u16 NCT6106_REG_TEMP_HYST[] = {
474 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
475 static const u16 NCT6106_REG_TEMP_OVER[] = {
476 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd4 };
477 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
478 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
479 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
481 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
482 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
483 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
484 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
486 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
487 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
488 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
489 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
490 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
491 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
492 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
493 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
495 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
496 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = { 0x11b, 0x12b, 0x13b };
498 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
499 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10
500 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
502 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
503 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
504 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
505 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
506 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
507 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
509 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
511 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
512 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
513 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
514 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
515 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
516 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
518 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
519 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
521 static const u16 NCT6106_REG_ALARM[7] =
522 { 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
523 static const s8 NCT6106_ALARM_BITS[]
524 = { 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
525 9, -1, -1, -1, -1, -1, -1, /* in8..in14 */
527 32, 33, 34, -1, -1, /* fan1..fan5 */
528 -1, -1, -1, /* unused */
529 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
530 48, -1 }; /* intrusion0, intrusion1 */
532 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
533 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
535 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
536 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
538 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
540 if (mode == 0 && pwm == 255)
545 static int pwm_enable_to_reg(enum pwm_enable mode)
556 /* 1 is DC mode, output in ms */
557 static unsigned int step_time_from_reg(u8 reg, u8 mode)
559 return mode ? 400 * reg : 100 * reg;
562 static u8 step_time_to_reg(unsigned int msec, u8 mode)
564 return clamp_val((mode ? (msec + 200) / 400 :
565 (msec + 50) / 100), 1, 255);
568 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
570 if (reg == 0 || reg == 255)
572 return 1350000U / (reg << divreg);
575 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
577 if ((reg & 0xff1f) == 0xff1f)
580 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
585 return 1350000U / reg;
588 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
590 if (reg == 0 || reg == 0xffff)
594 * Even though the registers are 16 bit wide, the fan divisor
597 return 1350000U / (reg << divreg);
600 static u16 fan_to_reg(u32 fan, unsigned int divreg)
605 return (1350000U / fan) >> divreg;
608 static inline unsigned int
615 * Some of the voltage inputs have internal scaling, the tables below
616 * contain 8 (the ADC LSB in mV) * scaling factor * 100
618 static const u16 scale_in[15] = {
619 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
623 static inline long in_from_reg(u8 reg, u8 nr)
625 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
628 static inline u8 in_to_reg(u32 val, u8 nr)
630 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
634 * Data structures and manipulation thereof
637 struct nct6775_data {
638 int addr; /* IO base of hw monitor block */
642 struct device *hwmon_dev;
643 struct attribute_group *group_in;
644 struct attribute_group *group_fan;
645 struct attribute_group *group_temp;
646 struct attribute_group *group_pwm;
648 u16 reg_temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
651 u8 temp_src[NUM_TEMP];
652 u16 reg_temp_config[NUM_TEMP];
653 const char * const *temp_label;
661 const s8 *ALARM_BITS;
664 const u16 *REG_IN_MINMAX[2];
666 const u16 *REG_TARGET;
668 const u16 *REG_FAN_MODE;
669 const u16 *REG_FAN_MIN;
670 const u16 *REG_FAN_PULSES;
671 const u16 *FAN_PULSE_SHIFT;
672 const u16 *REG_FAN_TIME[3];
674 const u16 *REG_TOLERANCE_H;
676 const u8 *REG_PWM_MODE;
677 const u8 *PWM_MODE_MASK;
679 const u16 *REG_PWM[7]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
680 * [3]=pwm_max, [4]=pwm_step,
681 * [5]=weight_duty_step, [6]=weight_duty_base
683 const u16 *REG_PWM_READ;
685 const u16 *REG_CRITICAL_PWM_ENABLE;
686 u8 CRITICAL_PWM_ENABLE_MASK;
687 const u16 *REG_CRITICAL_PWM;
689 const u16 *REG_AUTO_TEMP;
690 const u16 *REG_AUTO_PWM;
692 const u16 *REG_CRITICAL_TEMP;
693 const u16 *REG_CRITICAL_TEMP_TOLERANCE;
695 const u16 *REG_TEMP_SOURCE; /* temp register sources */
696 const u16 *REG_TEMP_SEL;
697 const u16 *REG_WEIGHT_TEMP_SEL;
698 const u16 *REG_WEIGHT_TEMP[3]; /* 0=base, 1=tolerance, 2=step */
700 const u16 *REG_TEMP_OFFSET;
702 const u16 *REG_ALARM;
704 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
705 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
707 struct mutex update_lock;
708 bool valid; /* true if following fields are valid */
709 unsigned long last_updated; /* In jiffies */
711 /* Register values */
712 u8 bank; /* current register bank */
713 u8 in_num; /* number of in inputs we have */
714 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
720 u8 has_fan; /* some fan inputs can be disabled */
721 u8 has_fan_min; /* some fans don't have min register */
724 u8 temp_fixed_num; /* 3 or 6 */
725 u8 temp_type[NUM_TEMP_FIXED];
726 s8 temp_offset[NUM_TEMP_FIXED];
727 s16 temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
731 u8 pwm_num; /* number of pwm */
732 u8 pwm_mode[5]; /* 1->DC variable voltage, 0->PWM variable duty cycle */
733 enum pwm_enable pwm_enable[5];
736 * 2->thermal cruise mode (also called SmartFan I)
737 * 3->fan speed cruise mode
739 * 5->enhanced variable thermal cruise (SmartFan IV)
741 u8 pwm[7][5]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
742 * [3]=pwm_max, [4]=pwm_step,
743 * [5]=weight_duty_step, [6]=weight_duty_base
749 u32 target_speed_tolerance[5];
750 u8 speed_tolerance_limit;
752 u8 temp_tolerance[2][5];
755 u8 fan_time[3][5]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
757 /* Automatic fan speed control registers */
762 u8 pwm_weight_temp_sel[5];
763 u8 weight_temp[3][5]; /* 0->temp_step, 1->temp_step_tol,
776 /* Remember extra register values over suspend/resume */
783 struct nct6775_sio_data {
788 struct sensor_device_template {
789 struct device_attribute dev_attr;
797 bool s2; /* true if both index and nr are used */
800 struct sensor_device_attr_u {
802 struct sensor_device_attribute a1;
803 struct sensor_device_attribute_2 a2;
808 #define SENSOR_DEVICE_TEMPLATE(_name, _mode, _show, _store, _index) \
809 { .dev_attr = __ATTR(_name, _mode, _show, _store), \
813 #define SENSOR_DEVICE_TEMPLATE_2(_name, _mode, _show, _store, \
815 { .dev_attr = __ATTR(_name, _mode, _show, _store), \
816 .u.s.index = _index, \
820 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
821 static struct sensor_device_template sensor_dev_template_##_name \
822 = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \
825 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \
827 static struct sensor_device_template sensor_dev_template_##_name \
828 = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
831 struct sensor_template_group {
832 struct sensor_device_template **templates;
833 umode_t (*is_visible)(struct kobject *, struct attribute *, int);
837 static struct attribute_group *
838 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
841 struct attribute_group *group;
842 struct sensor_device_attr_u *su;
843 struct sensor_device_attribute *a;
844 struct sensor_device_attribute_2 *a2;
845 struct attribute **attrs;
846 struct sensor_device_template **t;
847 int err, i, j, count;
850 return ERR_PTR(-EINVAL);
853 for (count = 0; *t; t++, count++)
857 return ERR_PTR(-EINVAL);
859 group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
861 return ERR_PTR(-ENOMEM);
863 attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
866 return ERR_PTR(-ENOMEM);
868 su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
871 return ERR_PTR(-ENOMEM);
873 group->attrs = attrs;
874 group->is_visible = tg->is_visible;
876 for (i = 0; i < repeat; i++) {
878 for (j = 0; *t != NULL; j++) {
879 snprintf(su->name, sizeof(su->name),
880 (*t)->dev_attr.attr.name, tg->base + i);
883 a2->dev_attr.attr.name = su->name;
884 a2->nr = (*t)->u.s.nr + i;
885 a2->index = (*t)->u.s.index;
886 a2->dev_attr.attr.mode =
887 (*t)->dev_attr.attr.mode;
888 a2->dev_attr.show = (*t)->dev_attr.show;
889 a2->dev_attr.store = (*t)->dev_attr.store;
890 *attrs = &a2->dev_attr.attr;
893 a->dev_attr.attr.name = su->name;
894 a->index = (*t)->u.index + i;
895 a->dev_attr.attr.mode =
896 (*t)->dev_attr.attr.mode;
897 a->dev_attr.show = (*t)->dev_attr.show;
898 a->dev_attr.store = (*t)->dev_attr.store;
899 *attrs = &a->dev_attr.attr;
907 err = sysfs_create_group(&dev->kobj, group);
909 return ERR_PTR(-ENOMEM);
914 static bool is_word_sized(struct nct6775_data *data, u16 reg)
916 switch (data->kind) {
918 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
919 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
920 reg == 0x111 || reg == 0x121 || reg == 0x131;
922 return (((reg & 0xff00) == 0x100 ||
923 (reg & 0xff00) == 0x200) &&
924 ((reg & 0x00ff) == 0x50 ||
925 (reg & 0x00ff) == 0x53 ||
926 (reg & 0x00ff) == 0x55)) ||
927 (reg & 0xfff0) == 0x630 ||
928 reg == 0x640 || reg == 0x642 ||
930 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
931 reg == 0x73 || reg == 0x75 || reg == 0x77;
933 return (((reg & 0xff00) == 0x100 ||
934 (reg & 0xff00) == 0x200) &&
935 ((reg & 0x00ff) == 0x50 ||
936 (reg & 0x00ff) == 0x53 ||
937 (reg & 0x00ff) == 0x55)) ||
938 (reg & 0xfff0) == 0x630 ||
940 reg == 0x640 || reg == 0x642 ||
941 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
942 reg == 0x73 || reg == 0x75 || reg == 0x77;
944 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
945 ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x09) ||
947 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
948 reg == 0x640 || reg == 0x642 ||
949 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
956 * On older chips, only registers 0x50-0x5f are banked.
957 * On more recent chips, all registers are banked.
958 * Assume that is the case and set the bank number for each access.
959 * Cache the bank number so it only needs to be set if it changes.
961 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
964 if (data->bank != bank) {
965 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
966 outb_p(bank, data->addr + DATA_REG_OFFSET);
971 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
973 int res, word_sized = is_word_sized(data, reg);
975 nct6775_set_bank(data, reg);
976 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
977 res = inb_p(data->addr + DATA_REG_OFFSET);
979 outb_p((reg & 0xff) + 1,
980 data->addr + ADDR_REG_OFFSET);
981 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
986 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
988 int word_sized = is_word_sized(data, reg);
990 nct6775_set_bank(data, reg);
991 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
993 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
994 outb_p((reg & 0xff) + 1,
995 data->addr + ADDR_REG_OFFSET);
997 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1001 /* We left-align 8-bit temperature values to make the code simpler */
1002 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1006 res = nct6775_read_value(data, reg);
1007 if (!is_word_sized(data, reg))
1013 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1015 if (!is_word_sized(data, reg))
1017 return nct6775_write_value(data, reg, value);
1020 /* This function assumes that the caller holds data->update_lock */
1021 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1027 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1028 | (data->fan_div[0] & 0x7);
1029 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1032 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1033 | ((data->fan_div[1] << 4) & 0x70);
1034 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1037 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1038 | (data->fan_div[2] & 0x7);
1039 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1042 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1043 | ((data->fan_div[3] << 4) & 0x70);
1044 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1049 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1051 if (data->kind == nct6775)
1052 nct6775_write_fan_div(data, nr);
1055 static void nct6775_update_fan_div(struct nct6775_data *data)
1059 i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1060 data->fan_div[0] = i & 0x7;
1061 data->fan_div[1] = (i & 0x70) >> 4;
1062 i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1063 data->fan_div[2] = i & 0x7;
1064 if (data->has_fan & (1<<3))
1065 data->fan_div[3] = (i & 0x70) >> 4;
1068 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1070 if (data->kind == nct6775)
1071 nct6775_update_fan_div(data);
1074 static void nct6775_init_fan_div(struct nct6775_data *data)
1078 nct6775_update_fan_div_common(data);
1080 * For all fans, start with highest divider value if the divider
1081 * register is not initialized. This ensures that we get a
1082 * reading from the fan count register, even if it is not optimal.
1083 * We'll compute a better divider later on.
1085 for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1086 if (!(data->has_fan & (1 << i)))
1088 if (data->fan_div[i] == 0) {
1089 data->fan_div[i] = 7;
1090 nct6775_write_fan_div_common(data, i);
1095 static void nct6775_init_fan_common(struct device *dev,
1096 struct nct6775_data *data)
1101 if (data->has_fan_div)
1102 nct6775_init_fan_div(data);
1105 * If fan_min is not set (0), set it to 0xff to disable it. This
1106 * prevents the unnecessary warning when fanX_min is reported as 0.
1108 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1109 if (data->has_fan_min & (1 << i)) {
1110 reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1112 nct6775_write_value(data, data->REG_FAN_MIN[i],
1113 data->has_fan_div ? 0xff
1119 static void nct6775_select_fan_div(struct device *dev,
1120 struct nct6775_data *data, int nr, u16 reg)
1122 u8 fan_div = data->fan_div[nr];
1125 if (!data->has_fan_div)
1129 * If we failed to measure the fan speed, or the reported value is not
1130 * in the optimal range, and the clock divider can be modified,
1131 * let's try that for next time.
1133 if (reg == 0x00 && fan_div < 0x07)
1135 else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1138 if (fan_div != data->fan_div[nr]) {
1139 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1140 nr + 1, div_from_reg(data->fan_div[nr]),
1141 div_from_reg(fan_div));
1143 /* Preserve min limit if possible */
1144 if (data->has_fan_min & (1 << nr)) {
1145 fan_min = data->fan_min[nr];
1146 if (fan_div > data->fan_div[nr]) {
1147 if (fan_min != 255 && fan_min > 1)
1150 if (fan_min != 255) {
1156 if (fan_min != data->fan_min[nr]) {
1157 data->fan_min[nr] = fan_min;
1158 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1162 data->fan_div[nr] = fan_div;
1163 nct6775_write_fan_div_common(data, nr);
1167 static void nct6775_update_pwm(struct device *dev)
1169 struct nct6775_data *data = dev_get_drvdata(dev);
1171 int fanmodecfg, reg;
1174 for (i = 0; i < data->pwm_num; i++) {
1175 if (!(data->has_pwm & (1 << i)))
1178 duty_is_dc = data->REG_PWM_MODE[i] &&
1179 (nct6775_read_value(data, data->REG_PWM_MODE[i])
1180 & data->PWM_MODE_MASK[i]);
1181 data->pwm_mode[i] = duty_is_dc;
1183 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1184 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1185 if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1187 = nct6775_read_value(data,
1188 data->REG_PWM[j][i]);
1192 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1193 (fanmodecfg >> 4) & 7);
1195 if (!data->temp_tolerance[0][i] ||
1196 data->pwm_enable[i] != speed_cruise)
1197 data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1198 if (!data->target_speed_tolerance[i] ||
1199 data->pwm_enable[i] == speed_cruise) {
1200 u8 t = fanmodecfg & 0x0f;
1201 if (data->REG_TOLERANCE_H) {
1202 t |= (nct6775_read_value(data,
1203 data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1205 data->target_speed_tolerance[i] = t;
1208 data->temp_tolerance[1][i] =
1209 nct6775_read_value(data,
1210 data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1212 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1213 data->pwm_temp_sel[i] = reg & 0x1f;
1214 /* If fan can stop, report floor as 0 */
1216 data->pwm[2][i] = 0;
1218 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1219 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1220 /* If weight is disabled, report weight source as 0 */
1221 if (j == 1 && !(reg & 0x80))
1222 data->pwm_weight_temp_sel[i] = 0;
1224 /* Weight temp data */
1225 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1226 data->weight_temp[j][i]
1227 = nct6775_read_value(data,
1228 data->REG_WEIGHT_TEMP[j][i]);
1233 static void nct6775_update_pwm_limits(struct device *dev)
1235 struct nct6775_data *data = dev_get_drvdata(dev);
1240 for (i = 0; i < data->pwm_num; i++) {
1241 if (!(data->has_pwm & (1 << i)))
1244 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1245 data->fan_time[j][i] =
1246 nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1249 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1250 /* Update only in matching mode or if never updated */
1251 if (!data->target_temp[i] ||
1252 data->pwm_enable[i] == thermal_cruise)
1253 data->target_temp[i] = reg_t & data->target_temp_mask;
1254 if (!data->target_speed[i] ||
1255 data->pwm_enable[i] == speed_cruise) {
1256 if (data->REG_TOLERANCE_H) {
1257 reg_t |= (nct6775_read_value(data,
1258 data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1260 data->target_speed[i] = reg_t;
1263 for (j = 0; j < data->auto_pwm_num; j++) {
1264 data->auto_pwm[i][j] =
1265 nct6775_read_value(data,
1266 NCT6775_AUTO_PWM(data, i, j));
1267 data->auto_temp[i][j] =
1268 nct6775_read_value(data,
1269 NCT6775_AUTO_TEMP(data, i, j));
1272 /* critical auto_pwm temperature data */
1273 data->auto_temp[i][data->auto_pwm_num] =
1274 nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1276 switch (data->kind) {
1278 reg = nct6775_read_value(data,
1279 NCT6775_REG_CRITICAL_ENAB[i]);
1280 data->auto_pwm[i][data->auto_pwm_num] =
1281 (reg & 0x02) ? 0xff : 0x00;
1284 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1288 reg = nct6775_read_value(data,
1289 data->REG_CRITICAL_PWM_ENABLE[i]);
1290 if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1291 reg = nct6775_read_value(data,
1292 data->REG_CRITICAL_PWM[i]);
1295 data->auto_pwm[i][data->auto_pwm_num] = reg;
1301 static struct nct6775_data *nct6775_update_device(struct device *dev)
1303 struct nct6775_data *data = dev_get_drvdata(dev);
1306 mutex_lock(&data->update_lock);
1308 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
1310 /* Fan clock dividers */
1311 nct6775_update_fan_div_common(data);
1313 /* Measured voltages and limits */
1314 for (i = 0; i < data->in_num; i++) {
1315 if (!(data->have_in & (1 << i)))
1318 data->in[i][0] = nct6775_read_value(data,
1320 data->in[i][1] = nct6775_read_value(data,
1321 data->REG_IN_MINMAX[0][i]);
1322 data->in[i][2] = nct6775_read_value(data,
1323 data->REG_IN_MINMAX[1][i]);
1326 /* Measured fan speeds and limits */
1327 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1330 if (!(data->has_fan & (1 << i)))
1333 reg = nct6775_read_value(data, data->REG_FAN[i]);
1334 data->rpm[i] = data->fan_from_reg(reg,
1337 if (data->has_fan_min & (1 << i))
1338 data->fan_min[i] = nct6775_read_value(data,
1339 data->REG_FAN_MIN[i]);
1340 data->fan_pulses[i] =
1341 (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1342 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1344 nct6775_select_fan_div(dev, data, i, reg);
1347 nct6775_update_pwm(dev);
1348 nct6775_update_pwm_limits(dev);
1350 /* Measured temperatures and limits */
1351 for (i = 0; i < NUM_TEMP; i++) {
1352 if (!(data->have_temp & (1 << i)))
1354 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1355 if (data->reg_temp[j][i])
1357 = nct6775_read_temp(data,
1358 data->reg_temp[j][i]);
1360 if (!(data->have_temp_fixed & (1 << i)))
1362 data->temp_offset[i]
1363 = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1367 for (i = 0; i < NUM_REG_ALARM; i++) {
1369 if (!data->REG_ALARM[i])
1371 alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1372 data->alarms |= ((u64)alarm) << (i << 3);
1375 data->last_updated = jiffies;
1379 mutex_unlock(&data->update_lock);
1384 * Sysfs callback functions
1387 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1389 struct nct6775_data *data = nct6775_update_device(dev);
1390 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1392 int index = sattr->index;
1393 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1397 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1400 struct nct6775_data *data = dev_get_drvdata(dev);
1401 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1403 int index = sattr->index;
1405 int err = kstrtoul(buf, 10, &val);
1408 mutex_lock(&data->update_lock);
1409 data->in[nr][index] = in_to_reg(val, nr);
1410 nct6775_write_value(data, data->REG_IN_MINMAX[index-1][nr],
1411 data->in[nr][index]);
1412 mutex_unlock(&data->update_lock);
1417 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1419 struct nct6775_data *data = nct6775_update_device(dev);
1420 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1421 int nr = data->ALARM_BITS[sattr->index];
1422 return sprintf(buf, "%u\n",
1423 (unsigned int)((data->alarms >> nr) & 0x01));
1426 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1427 struct attribute *attr, int index)
1429 struct device *dev = container_of(kobj, struct device, kobj);
1430 struct nct6775_data *data = dev_get_drvdata(dev);
1431 int in = index / 4; /* voltage index */
1433 if (!(data->have_in & (1 << in)))
1439 SENSOR_TEMPLATE_2(in_input, in%d_input, S_IRUGO, show_in_reg, NULL, 0, 0);
1440 SENSOR_TEMPLATE(in_alarm, in%d_alarm, S_IRUGO, show_alarm, NULL, 0);
1441 SENSOR_TEMPLATE_2(in_min, in%d_min, S_IWUSR | S_IRUGO, show_in_reg,
1442 store_in_reg, 0, 1);
1443 SENSOR_TEMPLATE_2(in_max, in%d_max, S_IWUSR | S_IRUGO, show_in_reg,
1444 store_in_reg, 0, 2);
1447 * nct6775_in_is_visible uses the index into the following array
1448 * to determine if attributes should be created or not.
1449 * Any change in order or content must be matched.
1451 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1452 &sensor_dev_template_in_input,
1453 &sensor_dev_template_in_alarm,
1454 &sensor_dev_template_in_min,
1455 &sensor_dev_template_in_max,
1459 static struct sensor_template_group nct6775_in_template_group = {
1460 .templates = nct6775_attributes_in_template,
1461 .is_visible = nct6775_in_is_visible,
1465 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1467 struct nct6775_data *data = nct6775_update_device(dev);
1468 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1469 int nr = sattr->index;
1470 return sprintf(buf, "%d\n", data->rpm[nr]);
1474 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1476 struct nct6775_data *data = nct6775_update_device(dev);
1477 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1478 int nr = sattr->index;
1479 return sprintf(buf, "%d\n",
1480 data->fan_from_reg_min(data->fan_min[nr],
1481 data->fan_div[nr]));
1485 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1487 struct nct6775_data *data = nct6775_update_device(dev);
1488 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1489 int nr = sattr->index;
1490 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1494 store_fan_min(struct device *dev, struct device_attribute *attr,
1495 const char *buf, size_t count)
1497 struct nct6775_data *data = dev_get_drvdata(dev);
1498 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1499 int nr = sattr->index;
1505 err = kstrtoul(buf, 10, &val);
1509 mutex_lock(&data->update_lock);
1510 if (!data->has_fan_div) {
1511 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1517 val = 1350000U / val;
1518 val = (val & 0x1f) | ((val << 3) & 0xff00);
1520 data->fan_min[nr] = val;
1521 goto write_min; /* Leave fan divider alone */
1524 /* No min limit, alarm disabled */
1525 data->fan_min[nr] = 255;
1526 new_div = data->fan_div[nr]; /* No change */
1527 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1530 reg = 1350000U / val;
1531 if (reg >= 128 * 255) {
1533 * Speed below this value cannot possibly be represented,
1534 * even with the highest divider (128)
1536 data->fan_min[nr] = 254;
1537 new_div = 7; /* 128 == (1 << 7) */
1539 "fan%u low limit %lu below minimum %u, set to minimum\n",
1540 nr + 1, val, data->fan_from_reg_min(254, 7));
1543 * Speed above this value cannot possibly be represented,
1544 * even with the lowest divider (1)
1546 data->fan_min[nr] = 1;
1547 new_div = 0; /* 1 == (1 << 0) */
1549 "fan%u low limit %lu above maximum %u, set to maximum\n",
1550 nr + 1, val, data->fan_from_reg_min(1, 0));
1553 * Automatically pick the best divider, i.e. the one such
1554 * that the min limit will correspond to a register value
1555 * in the 96..192 range
1558 while (reg > 192 && new_div < 7) {
1562 data->fan_min[nr] = reg;
1567 * Write both the fan clock divider (if it changed) and the new
1568 * fan min (unconditionally)
1570 if (new_div != data->fan_div[nr]) {
1571 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1572 nr + 1, div_from_reg(data->fan_div[nr]),
1573 div_from_reg(new_div));
1574 data->fan_div[nr] = new_div;
1575 nct6775_write_fan_div_common(data, nr);
1576 /* Give the chip time to sample a new speed value */
1577 data->last_updated = jiffies;
1581 nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1582 mutex_unlock(&data->update_lock);
1588 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1590 struct nct6775_data *data = nct6775_update_device(dev);
1591 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1592 int p = data->fan_pulses[sattr->index];
1594 return sprintf(buf, "%d\n", p ? : 4);
1598 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1599 const char *buf, size_t count)
1601 struct nct6775_data *data = dev_get_drvdata(dev);
1602 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1603 int nr = sattr->index;
1608 err = kstrtoul(buf, 10, &val);
1615 mutex_lock(&data->update_lock);
1616 data->fan_pulses[nr] = val & 3;
1617 reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1618 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1619 reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1620 nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1621 mutex_unlock(&data->update_lock);
1626 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1627 struct attribute *attr, int index)
1629 struct device *dev = container_of(kobj, struct device, kobj);
1630 struct nct6775_data *data = dev_get_drvdata(dev);
1631 int fan = index / 5; /* fan index */
1632 int nr = index % 5; /* attribute index */
1634 if (!(data->has_fan & (1 << fan)))
1637 if (nr == 3 && !(data->has_fan_min & (1 << fan)))
1639 if (nr == 4 && data->kind != nct6775)
1645 SENSOR_TEMPLATE(fan_input, fan%d_input, S_IRUGO, show_fan, NULL, 0);
1646 SENSOR_TEMPLATE(fan_alarm, fan%d_alarm, S_IRUGO, show_alarm, NULL,
1648 SENSOR_TEMPLATE(fan_pulses, fan%d_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1649 store_fan_pulses, 0);
1650 SENSOR_TEMPLATE(fan_min, fan%d_min, S_IWUSR | S_IRUGO, show_fan_min,
1652 SENSOR_TEMPLATE(fan_div, fan%d_div, S_IRUGO, show_fan_div, NULL, 0);
1655 * nct6775_fan_is_visible uses the index into the following array
1656 * to determine if attributes should be created or not.
1657 * Any change in order or content must be matched.
1659 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1660 &sensor_dev_template_fan_input,
1661 &sensor_dev_template_fan_alarm,
1662 &sensor_dev_template_fan_pulses,
1663 &sensor_dev_template_fan_min, /* 3 */
1664 &sensor_dev_template_fan_div, /* 4 */
1668 static struct sensor_template_group nct6775_fan_template_group = {
1669 .templates = nct6775_attributes_fan_template,
1670 .is_visible = nct6775_fan_is_visible,
1675 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1677 struct nct6775_data *data = nct6775_update_device(dev);
1678 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1679 int nr = sattr->index;
1680 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1684 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1686 struct nct6775_data *data = nct6775_update_device(dev);
1687 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1689 int index = sattr->index;
1691 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1695 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1698 struct nct6775_data *data = dev_get_drvdata(dev);
1699 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1701 int index = sattr->index;
1705 err = kstrtol(buf, 10, &val);
1709 mutex_lock(&data->update_lock);
1710 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1711 nct6775_write_temp(data, data->reg_temp[index][nr],
1712 data->temp[index][nr]);
1713 mutex_unlock(&data->update_lock);
1718 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1720 struct nct6775_data *data = nct6775_update_device(dev);
1721 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1723 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1727 store_temp_offset(struct device *dev, struct device_attribute *attr,
1728 const char *buf, size_t count)
1730 struct nct6775_data *data = dev_get_drvdata(dev);
1731 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1732 int nr = sattr->index;
1736 err = kstrtol(buf, 10, &val);
1740 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1742 mutex_lock(&data->update_lock);
1743 data->temp_offset[nr] = val;
1744 nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
1745 mutex_unlock(&data->update_lock);
1751 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1753 struct nct6775_data *data = nct6775_update_device(dev);
1754 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1755 int nr = sattr->index;
1756 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1760 store_temp_type(struct device *dev, struct device_attribute *attr,
1761 const char *buf, size_t count)
1763 struct nct6775_data *data = nct6775_update_device(dev);
1764 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1765 int nr = sattr->index;
1768 u8 vbat, diode, vbit, dbit;
1770 err = kstrtoul(buf, 10, &val);
1774 if (val != 1 && val != 3 && val != 4)
1777 mutex_lock(&data->update_lock);
1779 data->temp_type[nr] = val;
1781 dbit = data->DIODE_MASK << nr;
1782 vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
1783 diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
1785 case 1: /* CPU diode (diode, current mode) */
1789 case 3: /* diode, voltage mode */
1792 case 4: /* thermistor */
1795 nct6775_write_value(data, data->REG_VBAT, vbat);
1796 nct6775_write_value(data, data->REG_DIODE, diode);
1798 mutex_unlock(&data->update_lock);
1802 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
1803 struct attribute *attr, int index)
1805 struct device *dev = container_of(kobj, struct device, kobj);
1806 struct nct6775_data *data = dev_get_drvdata(dev);
1807 int temp = index / 8; /* temp index */
1808 int nr = index % 8; /* attribute index */
1810 if (!(data->have_temp & (1 << temp)))
1813 if (nr == 2 && !data->reg_temp[1][temp]) /* max */
1816 if (nr == 3 && !data->reg_temp[2][temp]) /* max_hyst */
1819 if (nr == 4 && !data->reg_temp[3][temp]) /* crit */
1822 if (nr > 4 && !(data->have_temp_fixed & (1 << temp)))
1825 if (nr == 7 && data->ALARM_BITS[TEMP_ALARM_BASE + temp] < 0)
1831 SENSOR_TEMPLATE_2(temp_input, temp%d_input, S_IRUGO, show_temp, NULL, 0, 0);
1832 SENSOR_TEMPLATE(temp_label, temp%d_label, S_IRUGO, show_temp_label, NULL, 0);
1833 SENSOR_TEMPLATE_2(temp_max, temp%d_max, S_IRUGO | S_IWUSR, show_temp,
1835 SENSOR_TEMPLATE_2(temp_max_hyst, temp%d_max_hyst, S_IRUGO | S_IWUSR, show_temp,
1837 SENSOR_TEMPLATE_2(temp_crit, temp%d_crit, S_IRUGO | S_IWUSR, show_temp,
1839 SENSOR_TEMPLATE(temp_offset, temp%d_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1840 store_temp_offset, 0);
1841 SENSOR_TEMPLATE(temp_type, temp%d_type, S_IRUGO | S_IWUSR, show_temp_type,
1842 store_temp_type, 0);
1843 SENSOR_TEMPLATE(temp_alarm, temp%d_alarm, S_IRUGO, show_alarm, NULL,
1847 * nct6775_temp_is_visible uses the index into the following array
1848 * to determine if attributes should be created or not.
1849 * Any change in order or content must be matched.
1851 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
1852 &sensor_dev_template_temp_input,
1853 &sensor_dev_template_temp_label,
1854 &sensor_dev_template_temp_max, /* 2 */
1855 &sensor_dev_template_temp_max_hyst, /* 3 */
1856 &sensor_dev_template_temp_crit, /* 4 */
1857 &sensor_dev_template_temp_offset, /* 5 */
1858 &sensor_dev_template_temp_type, /* 6 */
1859 &sensor_dev_template_temp_alarm, /* 7 */
1863 static struct sensor_template_group nct6775_temp_template_group = {
1864 .templates = nct6775_attributes_temp_template,
1865 .is_visible = nct6775_temp_is_visible,
1870 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
1872 struct nct6775_data *data = nct6775_update_device(dev);
1873 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1875 return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
1879 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1880 const char *buf, size_t count)
1882 struct nct6775_data *data = dev_get_drvdata(dev);
1883 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1884 int nr = sattr->index;
1889 err = kstrtoul(buf, 10, &val);
1896 /* Setting DC mode is not supported for all chips/channels */
1897 if (data->REG_PWM_MODE[nr] == 0) {
1903 mutex_lock(&data->update_lock);
1904 data->pwm_mode[nr] = val;
1905 reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
1906 reg &= ~data->PWM_MODE_MASK[nr];
1908 reg |= data->PWM_MODE_MASK[nr];
1909 nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
1910 mutex_unlock(&data->update_lock);
1915 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1917 struct nct6775_data *data = nct6775_update_device(dev);
1918 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1920 int index = sattr->index;
1924 * For automatic fan control modes, show current pwm readings.
1925 * Otherwise, show the configured value.
1927 if (index == 0 && data->pwm_enable[nr] > manual)
1928 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
1930 pwm = data->pwm[index][nr];
1932 return sprintf(buf, "%d\n", pwm);
1936 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
1939 struct nct6775_data *data = dev_get_drvdata(dev);
1940 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1942 int index = sattr->index;
1944 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
1946 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
1950 err = kstrtoul(buf, 10, &val);
1953 val = clamp_val(val, minval[index], maxval[index]);
1955 mutex_lock(&data->update_lock);
1956 data->pwm[index][nr] = val;
1957 nct6775_write_value(data, data->REG_PWM[index][nr], val);
1958 if (index == 2) { /* floor: disable if val == 0 */
1959 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
1963 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
1965 mutex_unlock(&data->update_lock);
1969 /* Returns 0 if OK, -EINVAL otherwise */
1970 static int check_trip_points(struct nct6775_data *data, int nr)
1974 for (i = 0; i < data->auto_pwm_num - 1; i++) {
1975 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1978 for (i = 0; i < data->auto_pwm_num - 1; i++) {
1979 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1982 /* validate critical temperature and pwm if enabled (pwm > 0) */
1983 if (data->auto_pwm[nr][data->auto_pwm_num]) {
1984 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
1985 data->auto_temp[nr][data->auto_pwm_num] ||
1986 data->auto_pwm[nr][data->auto_pwm_num - 1] >
1987 data->auto_pwm[nr][data->auto_pwm_num])
1993 static void pwm_update_registers(struct nct6775_data *data, int nr)
1997 switch (data->pwm_enable[nr]) {
2002 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2003 reg = (reg & ~data->tolerance_mask) |
2004 (data->target_speed_tolerance[nr] & data->tolerance_mask);
2005 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2006 nct6775_write_value(data, data->REG_TARGET[nr],
2007 data->target_speed[nr] & 0xff);
2008 if (data->REG_TOLERANCE_H) {
2009 reg = (data->target_speed[nr] >> 8) & 0x0f;
2010 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2011 nct6775_write_value(data,
2012 data->REG_TOLERANCE_H[nr],
2016 case thermal_cruise:
2017 nct6775_write_value(data, data->REG_TARGET[nr],
2018 data->target_temp[nr]);
2021 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2022 reg = (reg & ~data->tolerance_mask) |
2023 data->temp_tolerance[0][nr];
2024 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2030 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2032 struct nct6775_data *data = nct6775_update_device(dev);
2033 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2035 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2039 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2040 const char *buf, size_t count)
2042 struct nct6775_data *data = dev_get_drvdata(dev);
2043 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2044 int nr = sattr->index;
2049 err = kstrtoul(buf, 10, &val);
2056 if (val == sf3 && data->kind != nct6775)
2059 if (val == sf4 && check_trip_points(data, nr)) {
2060 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2061 dev_err(dev, "Adjust trip points and try again\n");
2065 mutex_lock(&data->update_lock);
2066 data->pwm_enable[nr] = val;
2069 * turn off pwm control: select manual mode, set pwm to maximum
2071 data->pwm[0][nr] = 255;
2072 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2074 pwm_update_registers(data, nr);
2075 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2077 reg |= pwm_enable_to_reg(val) << 4;
2078 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2079 mutex_unlock(&data->update_lock);
2084 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2088 for (i = 0; i < NUM_TEMP; i++) {
2089 if (!(data->have_temp & (1 << i)))
2091 if (src == data->temp_src[i]) {
2097 return sprintf(buf, "%d\n", sel);
2101 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2103 struct nct6775_data *data = nct6775_update_device(dev);
2104 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2105 int index = sattr->index;
2107 return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2111 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2112 const char *buf, size_t count)
2114 struct nct6775_data *data = nct6775_update_device(dev);
2115 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2116 int nr = sattr->index;
2120 err = kstrtoul(buf, 10, &val);
2123 if (val == 0 || val > NUM_TEMP)
2125 if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2128 mutex_lock(&data->update_lock);
2129 src = data->temp_src[val - 1];
2130 data->pwm_temp_sel[nr] = src;
2131 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2134 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2135 mutex_unlock(&data->update_lock);
2141 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2144 struct nct6775_data *data = nct6775_update_device(dev);
2145 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2146 int index = sattr->index;
2148 return show_pwm_temp_sel_common(data, buf,
2149 data->pwm_weight_temp_sel[index]);
2153 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2154 const char *buf, size_t count)
2156 struct nct6775_data *data = nct6775_update_device(dev);
2157 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2158 int nr = sattr->index;
2162 err = kstrtoul(buf, 10, &val);
2167 if (val && (!(data->have_temp & (1 << (val - 1))) ||
2168 !data->temp_src[val - 1]))
2171 mutex_lock(&data->update_lock);
2173 src = data->temp_src[val - 1];
2174 data->pwm_weight_temp_sel[nr] = src;
2175 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2177 reg |= (src | 0x80);
2178 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2180 data->pwm_weight_temp_sel[nr] = 0;
2181 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2183 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2185 mutex_unlock(&data->update_lock);
2191 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2193 struct nct6775_data *data = nct6775_update_device(dev);
2194 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2196 return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2200 store_target_temp(struct device *dev, struct device_attribute *attr,
2201 const char *buf, size_t count)
2203 struct nct6775_data *data = dev_get_drvdata(dev);
2204 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2205 int nr = sattr->index;
2209 err = kstrtoul(buf, 10, &val);
2213 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2214 data->target_temp_mask);
2216 mutex_lock(&data->update_lock);
2217 data->target_temp[nr] = val;
2218 pwm_update_registers(data, nr);
2219 mutex_unlock(&data->update_lock);
2224 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2226 struct nct6775_data *data = nct6775_update_device(dev);
2227 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2228 int nr = sattr->index;
2230 return sprintf(buf, "%d\n",
2231 fan_from_reg16(data->target_speed[nr],
2232 data->fan_div[nr]));
2236 store_target_speed(struct device *dev, struct device_attribute *attr,
2237 const char *buf, size_t count)
2239 struct nct6775_data *data = dev_get_drvdata(dev);
2240 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2241 int nr = sattr->index;
2246 err = kstrtoul(buf, 10, &val);
2250 val = clamp_val(val, 0, 1350000U);
2251 speed = fan_to_reg(val, data->fan_div[nr]);
2253 mutex_lock(&data->update_lock);
2254 data->target_speed[nr] = speed;
2255 pwm_update_registers(data, nr);
2256 mutex_unlock(&data->update_lock);
2261 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2264 struct nct6775_data *data = nct6775_update_device(dev);
2265 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2267 int index = sattr->index;
2269 return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2273 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2274 const char *buf, size_t count)
2276 struct nct6775_data *data = dev_get_drvdata(dev);
2277 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2279 int index = sattr->index;
2283 err = kstrtoul(buf, 10, &val);
2287 /* Limit tolerance as needed */
2288 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2290 mutex_lock(&data->update_lock);
2291 data->temp_tolerance[index][nr] = val;
2293 pwm_update_registers(data, nr);
2295 nct6775_write_value(data,
2296 data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2298 mutex_unlock(&data->update_lock);
2303 * Fan speed tolerance is a tricky beast, since the associated register is
2304 * a tick counter, but the value is reported and configured as rpm.
2305 * Compute resulting low and high rpm values and report the difference.
2308 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2311 struct nct6775_data *data = nct6775_update_device(dev);
2312 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2313 int nr = sattr->index;
2314 int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2315 int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2325 tolerance = (fan_from_reg16(low, data->fan_div[nr])
2326 - fan_from_reg16(high, data->fan_div[nr])) / 2;
2328 return sprintf(buf, "%d\n", tolerance);
2332 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2333 const char *buf, size_t count)
2335 struct nct6775_data *data = dev_get_drvdata(dev);
2336 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2337 int nr = sattr->index;
2342 err = kstrtoul(buf, 10, &val);
2346 high = fan_from_reg16(data->target_speed[nr],
2347 data->fan_div[nr]) + val;
2348 low = fan_from_reg16(data->target_speed[nr],
2349 data->fan_div[nr]) - val;
2355 val = (fan_to_reg(low, data->fan_div[nr]) -
2356 fan_to_reg(high, data->fan_div[nr])) / 2;
2358 /* Limit tolerance as needed */
2359 val = clamp_val(val, 0, data->speed_tolerance_limit);
2361 mutex_lock(&data->update_lock);
2362 data->target_speed_tolerance[nr] = val;
2363 pwm_update_registers(data, nr);
2364 mutex_unlock(&data->update_lock);
2368 SENSOR_TEMPLATE_2(pwm, pwm%d, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2369 SENSOR_TEMPLATE(pwm_mode, pwm%d_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2371 SENSOR_TEMPLATE(pwm_enable, pwm%d_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2372 store_pwm_enable, 0);
2373 SENSOR_TEMPLATE(pwm_temp_sel, pwm%d_temp_sel, S_IWUSR | S_IRUGO,
2374 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2375 SENSOR_TEMPLATE(pwm_target_temp, pwm%d_target_temp, S_IWUSR | S_IRUGO,
2376 show_target_temp, store_target_temp, 0);
2377 SENSOR_TEMPLATE(fan_target, fan%d_target, S_IWUSR | S_IRUGO, show_target_speed,
2378 store_target_speed, 0);
2379 SENSOR_TEMPLATE(fan_tolerance, fan%d_tolerance, S_IWUSR | S_IRUGO,
2380 show_speed_tolerance, store_speed_tolerance, 0);
2382 /* Smart Fan registers */
2385 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2387 struct nct6775_data *data = nct6775_update_device(dev);
2388 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2390 int index = sattr->index;
2392 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2396 store_weight_temp(struct device *dev, struct device_attribute *attr,
2397 const char *buf, size_t count)
2399 struct nct6775_data *data = dev_get_drvdata(dev);
2400 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2402 int index = sattr->index;
2406 err = kstrtoul(buf, 10, &val);
2410 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2412 mutex_lock(&data->update_lock);
2413 data->weight_temp[index][nr] = val;
2414 nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2415 mutex_unlock(&data->update_lock);
2419 SENSOR_TEMPLATE(pwm_weight_temp_sel, pwm%d_weight_temp_sel, S_IWUSR | S_IRUGO,
2420 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2421 SENSOR_TEMPLATE_2(pwm_weight_temp_step, pwm%d_weight_temp_step,
2422 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2423 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, pwm%d_weight_temp_step_tol,
2424 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2425 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, pwm%d_weight_temp_step_base,
2426 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2427 SENSOR_TEMPLATE_2(pwm_weight_duty_step, pwm%d_weight_duty_step,
2428 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2429 SENSOR_TEMPLATE_2(pwm_weight_duty_base, pwm%d_weight_duty_base,
2430 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2433 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2435 struct nct6775_data *data = nct6775_update_device(dev);
2436 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2438 int index = sattr->index;
2440 return sprintf(buf, "%d\n",
2441 step_time_from_reg(data->fan_time[index][nr],
2442 data->pwm_mode[nr]));
2446 store_fan_time(struct device *dev, struct device_attribute *attr,
2447 const char *buf, size_t count)
2449 struct nct6775_data *data = dev_get_drvdata(dev);
2450 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2452 int index = sattr->index;
2456 err = kstrtoul(buf, 10, &val);
2460 val = step_time_to_reg(val, data->pwm_mode[nr]);
2461 mutex_lock(&data->update_lock);
2462 data->fan_time[index][nr] = val;
2463 nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2464 mutex_unlock(&data->update_lock);
2469 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2471 struct nct6775_data *data = dev_get_drvdata(dev);
2473 return sprintf(buf, "%s\n", data->name);
2476 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2479 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2481 struct nct6775_data *data = nct6775_update_device(dev);
2482 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2484 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2488 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2489 const char *buf, size_t count)
2491 struct nct6775_data *data = dev_get_drvdata(dev);
2492 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2494 int point = sattr->index;
2499 err = kstrtoul(buf, 10, &val);
2505 if (point == data->auto_pwm_num) {
2506 if (data->kind != nct6775 && !val)
2508 if (data->kind != nct6779 && val)
2512 mutex_lock(&data->update_lock);
2513 data->auto_pwm[nr][point] = val;
2514 if (point < data->auto_pwm_num) {
2515 nct6775_write_value(data,
2516 NCT6775_AUTO_PWM(data, nr, point),
2517 data->auto_pwm[nr][point]);
2519 switch (data->kind) {
2521 /* disable if needed (pwm == 0) */
2522 reg = nct6775_read_value(data,
2523 NCT6775_REG_CRITICAL_ENAB[nr]);
2528 nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2532 break; /* always enabled, nothing to do */
2535 nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2537 reg = nct6775_read_value(data,
2538 data->REG_CRITICAL_PWM_ENABLE[nr]);
2540 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2542 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2543 nct6775_write_value(data,
2544 data->REG_CRITICAL_PWM_ENABLE[nr],
2549 mutex_unlock(&data->update_lock);
2554 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2556 struct nct6775_data *data = nct6775_update_device(dev);
2557 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2559 int point = sattr->index;
2562 * We don't know for sure if the temperature is signed or unsigned.
2563 * Assume it is unsigned.
2565 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2569 store_auto_temp(struct device *dev, struct device_attribute *attr,
2570 const char *buf, size_t count)
2572 struct nct6775_data *data = dev_get_drvdata(dev);
2573 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2575 int point = sattr->index;
2579 err = kstrtoul(buf, 10, &val);
2585 mutex_lock(&data->update_lock);
2586 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2587 if (point < data->auto_pwm_num) {
2588 nct6775_write_value(data,
2589 NCT6775_AUTO_TEMP(data, nr, point),
2590 data->auto_temp[nr][point]);
2592 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2593 data->auto_temp[nr][point]);
2595 mutex_unlock(&data->update_lock);
2599 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2600 struct attribute *attr, int index)
2602 struct device *dev = container_of(kobj, struct device, kobj);
2603 struct nct6775_data *data = dev_get_drvdata(dev);
2604 int pwm = index / 36; /* pwm index */
2605 int nr = index % 36; /* attribute index */
2607 if (!(data->has_pwm & (1 << pwm)))
2610 if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2612 if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2614 if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2617 if (nr >= 22 && nr <= 35) { /* auto point */
2618 int api = (nr - 22) / 2; /* auto point index */
2620 if (api > data->auto_pwm_num)
2626 SENSOR_TEMPLATE_2(pwm_stop_time, pwm%d_stop_time, S_IWUSR | S_IRUGO,
2627 show_fan_time, store_fan_time, 0, 0);
2628 SENSOR_TEMPLATE_2(pwm_step_up_time, pwm%d_step_up_time, S_IWUSR | S_IRUGO,
2629 show_fan_time, store_fan_time, 0, 1);
2630 SENSOR_TEMPLATE_2(pwm_step_down_time, pwm%d_step_down_time, S_IWUSR | S_IRUGO,
2631 show_fan_time, store_fan_time, 0, 2);
2632 SENSOR_TEMPLATE_2(pwm_start, pwm%d_start, S_IWUSR | S_IRUGO, show_pwm,
2634 SENSOR_TEMPLATE_2(pwm_floor, pwm%d_floor, S_IWUSR | S_IRUGO, show_pwm,
2636 SENSOR_TEMPLATE_2(pwm_temp_tolerance, pwm%d_temp_tolerance, S_IWUSR | S_IRUGO,
2637 show_temp_tolerance, store_temp_tolerance, 0, 0);
2638 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, pwm%d_crit_temp_tolerance,
2639 S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2642 SENSOR_TEMPLATE_2(pwm_max, pwm%d_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2645 SENSOR_TEMPLATE_2(pwm_step, pwm%d_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2648 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, pwm%d_auto_point1_pwm, S_IWUSR | S_IRUGO,
2649 show_auto_pwm, store_auto_pwm, 0, 0);
2650 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, pwm%d_auto_point1_temp,
2651 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2653 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, pwm%d_auto_point2_pwm, S_IWUSR | S_IRUGO,
2654 show_auto_pwm, store_auto_pwm, 0, 1);
2655 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, pwm%d_auto_point2_temp,
2656 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2658 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, pwm%d_auto_point3_pwm, S_IWUSR | S_IRUGO,
2659 show_auto_pwm, store_auto_pwm, 0, 2);
2660 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, pwm%d_auto_point3_temp,
2661 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2663 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, pwm%d_auto_point4_pwm, S_IWUSR | S_IRUGO,
2664 show_auto_pwm, store_auto_pwm, 0, 3);
2665 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, pwm%d_auto_point4_temp,
2666 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
2668 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, pwm%d_auto_point5_pwm, S_IWUSR | S_IRUGO,
2669 show_auto_pwm, store_auto_pwm, 0, 4);
2670 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, pwm%d_auto_point5_temp,
2671 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
2673 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, pwm%d_auto_point6_pwm, S_IWUSR | S_IRUGO,
2674 show_auto_pwm, store_auto_pwm, 0, 5);
2675 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, pwm%d_auto_point6_temp,
2676 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
2678 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, pwm%d_auto_point7_pwm, S_IWUSR | S_IRUGO,
2679 show_auto_pwm, store_auto_pwm, 0, 6);
2680 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, pwm%d_auto_point7_temp,
2681 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
2684 * nct6775_pwm_is_visible uses the index into the following array
2685 * to determine if attributes should be created or not.
2686 * Any change in order or content must be matched.
2688 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
2689 &sensor_dev_template_pwm,
2690 &sensor_dev_template_pwm_mode,
2691 &sensor_dev_template_pwm_enable,
2692 &sensor_dev_template_pwm_temp_sel,
2693 &sensor_dev_template_pwm_temp_tolerance,
2694 &sensor_dev_template_pwm_crit_temp_tolerance,
2695 &sensor_dev_template_pwm_target_temp,
2696 &sensor_dev_template_fan_target,
2697 &sensor_dev_template_fan_tolerance,
2698 &sensor_dev_template_pwm_stop_time,
2699 &sensor_dev_template_pwm_step_up_time,
2700 &sensor_dev_template_pwm_step_down_time,
2701 &sensor_dev_template_pwm_start,
2702 &sensor_dev_template_pwm_floor,
2703 &sensor_dev_template_pwm_weight_temp_sel,
2704 &sensor_dev_template_pwm_weight_temp_step,
2705 &sensor_dev_template_pwm_weight_temp_step_tol,
2706 &sensor_dev_template_pwm_weight_temp_step_base,
2707 &sensor_dev_template_pwm_weight_duty_step,
2708 &sensor_dev_template_pwm_max, /* 19 */
2709 &sensor_dev_template_pwm_step, /* 20 */
2710 &sensor_dev_template_pwm_weight_duty_base, /* 21 */
2711 &sensor_dev_template_pwm_auto_point1_pwm, /* 22 */
2712 &sensor_dev_template_pwm_auto_point1_temp,
2713 &sensor_dev_template_pwm_auto_point2_pwm,
2714 &sensor_dev_template_pwm_auto_point2_temp,
2715 &sensor_dev_template_pwm_auto_point3_pwm,
2716 &sensor_dev_template_pwm_auto_point3_temp,
2717 &sensor_dev_template_pwm_auto_point4_pwm,
2718 &sensor_dev_template_pwm_auto_point4_temp,
2719 &sensor_dev_template_pwm_auto_point5_pwm,
2720 &sensor_dev_template_pwm_auto_point5_temp,
2721 &sensor_dev_template_pwm_auto_point6_pwm,
2722 &sensor_dev_template_pwm_auto_point6_temp,
2723 &sensor_dev_template_pwm_auto_point7_pwm,
2724 &sensor_dev_template_pwm_auto_point7_temp, /* 35 */
2729 static struct sensor_template_group nct6775_pwm_template_group = {
2730 .templates = nct6775_attributes_pwm_template,
2731 .is_visible = nct6775_pwm_is_visible,
2736 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
2738 struct nct6775_data *data = dev_get_drvdata(dev);
2739 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
2742 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
2744 /* Case open detection */
2747 clear_caseopen(struct device *dev, struct device_attribute *attr,
2748 const char *buf, size_t count)
2750 struct nct6775_data *data = dev_get_drvdata(dev);
2751 struct nct6775_sio_data *sio_data = dev->platform_data;
2752 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
2757 if (kstrtoul(buf, 10, &val) || val != 0)
2760 mutex_lock(&data->update_lock);
2763 * Use CR registers to clear caseopen status.
2764 * The CR registers are the same for all chips, and not all chips
2765 * support clearing the caseopen status through "regular" registers.
2767 ret = superio_enter(sio_data->sioreg);
2773 superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
2774 reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
2775 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
2776 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
2777 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
2778 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
2779 superio_exit(sio_data->sioreg);
2781 data->valid = false; /* Force cache refresh */
2783 mutex_unlock(&data->update_lock);
2787 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
2788 clear_caseopen, INTRUSION_ALARM_BASE);
2789 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
2790 clear_caseopen, INTRUSION_ALARM_BASE + 1);
2792 static umode_t nct6775_other_is_visible(struct kobject *kobj,
2793 struct attribute *attr, int index)
2795 struct device *dev = container_of(kobj, struct device, kobj);
2796 struct nct6775_data *data = dev_get_drvdata(dev);
2798 if (index == 1 && !data->have_vid)
2801 if (index == 2 || index == 3) {
2802 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 2] < 0)
2810 * nct6775_other_is_visible uses the index into the following array
2811 * to determine if attributes should be created or not.
2812 * Any change in order or content must be matched.
2814 static struct attribute *nct6775_attributes_other[] = {
2815 &dev_attr_name.attr,
2816 &dev_attr_cpu0_vid.attr, /* 1 */
2817 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr, /* 2 */
2818 &sensor_dev_attr_intrusion1_alarm.dev_attr.attr, /* 3 */
2823 static const struct attribute_group nct6775_group_other = {
2824 .attrs = nct6775_attributes_other,
2825 .is_visible = nct6775_other_is_visible,
2829 * Driver and device management
2832 static void nct6775_device_remove_files(struct device *dev)
2834 struct nct6775_data *data = dev_get_drvdata(dev);
2836 if (data->group_pwm)
2837 sysfs_remove_group(&dev->kobj, data->group_pwm);
2839 sysfs_remove_group(&dev->kobj, data->group_in);
2840 if (data->group_fan)
2841 sysfs_remove_group(&dev->kobj, data->group_fan);
2842 if (data->group_temp)
2843 sysfs_remove_group(&dev->kobj, data->group_temp);
2845 sysfs_remove_group(&dev->kobj, &nct6775_group_other);
2848 /* Get the monitoring functions started */
2849 static inline void nct6775_init_device(struct nct6775_data *data)
2854 /* Start monitoring if needed */
2855 if (data->REG_CONFIG) {
2856 tmp = nct6775_read_value(data, data->REG_CONFIG);
2858 nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
2861 /* Enable temperature sensors if needed */
2862 for (i = 0; i < NUM_TEMP; i++) {
2863 if (!(data->have_temp & (1 << i)))
2865 if (!data->reg_temp_config[i])
2867 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
2869 nct6775_write_value(data, data->reg_temp_config[i],
2873 /* Enable VBAT monitoring if needed */
2874 tmp = nct6775_read_value(data, data->REG_VBAT);
2876 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
2878 diode = nct6775_read_value(data, data->REG_DIODE);
2880 for (i = 0; i < data->temp_fixed_num; i++) {
2881 if (!(data->have_temp_fixed & (1 << i)))
2883 if ((tmp & (data->DIODE_MASK << i))) /* diode */
2885 = 3 - ((diode >> i) & data->DIODE_MASK);
2886 else /* thermistor */
2887 data->temp_type[i] = 4;
2892 nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
2893 struct nct6775_data *data)
2896 bool fan3pin, fan3min, fan4pin, fan4min, fan5pin;
2897 bool pwm3pin, pwm4pin, pwm5pin;
2899 /* fan4 and fan5 share some pins with the GPIO and serial flash */
2900 if (data->kind == nct6775) {
2901 regval = superio_inb(sio_data->sioreg, 0x2c);
2903 fan3pin = regval & (1 << 6);
2905 pwm3pin = regval & (1 << 7);
2907 /* On NCT6775, fan4 shares pins with the fdc interface */
2908 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
2913 } else if (data->kind == nct6776) {
2914 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
2916 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
2917 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
2922 fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
2927 fan4pin = superio_inb(sio_data->sioreg, 0x1C) & 0x01;
2932 fan5pin = superio_inb(sio_data->sioreg, 0x1C) & 0x02;
2939 } else if (data->kind == nct6106) {
2940 regval = superio_inb(sio_data->sioreg, 0x24);
2941 fan3pin = !(regval & 0x80);
2942 pwm3pin = regval & 0x08;
2950 } else { /* NCT6779D */
2951 regval = superio_inb(sio_data->sioreg, 0x1c);
2953 fan3pin = !(regval & (1 << 5));
2954 fan4pin = !(regval & (1 << 6));
2955 fan5pin = !(regval & (1 << 7));
2957 pwm3pin = !(regval & (1 << 0));
2958 pwm4pin = !(regval & (1 << 1));
2959 pwm5pin = !(regval & (1 << 2));
2965 data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
2966 data->has_fan |= fan3pin << 2;
2967 data->has_fan_min |= fan3min << 2;
2969 data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
2970 data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
2972 data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) | (pwm5pin << 4);
2975 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
2976 int *available, int *mask)
2981 for (i = 0; i < data->pwm_num && *available; i++) {
2986 src = nct6775_read_value(data, regp[i]);
2988 if (!src || (*mask & (1 << src)))
2990 if (src >= data->temp_label_num ||
2991 !strlen(data->temp_label[src]))
2994 index = __ffs(*available);
2995 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
2996 *available &= ~(1 << index);
3001 static int nct6775_probe(struct platform_device *pdev)
3003 struct device *dev = &pdev->dev;
3004 struct nct6775_sio_data *sio_data = dev->platform_data;
3005 struct nct6775_data *data;
3006 struct resource *res;
3008 int src, mask, available;
3009 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3010 const u16 *reg_temp_alternate, *reg_temp_crit;
3013 struct attribute_group *group;
3015 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3016 if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3020 data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3025 data->kind = sio_data->kind;
3026 data->addr = res->start;
3027 mutex_init(&data->update_lock);
3028 data->name = nct6775_device_names[data->kind];
3029 data->bank = 0xff; /* Force initial bank selection */
3030 platform_set_drvdata(pdev, data);
3032 switch (data->kind) {
3036 data->auto_pwm_num = 4;
3037 data->temp_fixed_num = 3;
3039 data->fan_from_reg = fan_from_reg13;
3040 data->fan_from_reg_min = fan_from_reg13;
3042 data->temp_label = nct6776_temp_label;
3043 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3045 data->REG_VBAT = NCT6106_REG_VBAT;
3046 data->REG_DIODE = NCT6106_REG_DIODE;
3047 data->DIODE_MASK = NCT6106_DIODE_MASK;
3048 data->REG_VIN = NCT6106_REG_IN;
3049 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3050 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3051 data->REG_TARGET = NCT6106_REG_TARGET;
3052 data->REG_FAN = NCT6106_REG_FAN;
3053 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3054 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3055 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3056 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3057 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3058 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3059 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3060 data->REG_PWM[0] = NCT6106_REG_PWM;
3061 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3062 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3063 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3064 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3065 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3066 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3067 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3068 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3069 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3070 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3071 data->REG_CRITICAL_TEMP_TOLERANCE
3072 = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3073 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3074 data->CRITICAL_PWM_ENABLE_MASK
3075 = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3076 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3077 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3078 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3079 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3080 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3081 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3082 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3083 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3084 data->REG_ALARM = NCT6106_REG_ALARM;
3085 data->ALARM_BITS = NCT6106_ALARM_BITS;
3087 reg_temp = NCT6106_REG_TEMP;
3088 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3089 reg_temp_over = NCT6106_REG_TEMP_OVER;
3090 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3091 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3092 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3093 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3099 data->auto_pwm_num = 6;
3100 data->has_fan_div = true;
3101 data->temp_fixed_num = 3;
3103 data->ALARM_BITS = NCT6775_ALARM_BITS;
3105 data->fan_from_reg = fan_from_reg16;
3106 data->fan_from_reg_min = fan_from_reg8;
3107 data->target_temp_mask = 0x7f;
3108 data->tolerance_mask = 0x0f;
3109 data->speed_tolerance_limit = 15;
3111 data->temp_label = nct6775_temp_label;
3112 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3114 data->REG_CONFIG = NCT6775_REG_CONFIG;
3115 data->REG_VBAT = NCT6775_REG_VBAT;
3116 data->REG_DIODE = NCT6775_REG_DIODE;
3117 data->DIODE_MASK = NCT6775_DIODE_MASK;
3118 data->REG_VIN = NCT6775_REG_IN;
3119 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3120 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3121 data->REG_TARGET = NCT6775_REG_TARGET;
3122 data->REG_FAN = NCT6775_REG_FAN;
3123 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3124 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3125 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3126 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3127 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3128 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3129 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3130 data->REG_PWM[0] = NCT6775_REG_PWM;
3131 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3132 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3133 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3134 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3135 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3136 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3137 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3138 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3139 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3140 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3141 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3142 data->REG_CRITICAL_TEMP_TOLERANCE
3143 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3144 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3145 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3146 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3147 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3148 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3149 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3150 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3151 data->REG_ALARM = NCT6775_REG_ALARM;
3153 reg_temp = NCT6775_REG_TEMP;
3154 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3155 reg_temp_over = NCT6775_REG_TEMP_OVER;
3156 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3157 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3158 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3159 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3165 data->auto_pwm_num = 4;
3166 data->has_fan_div = false;
3167 data->temp_fixed_num = 3;
3169 data->ALARM_BITS = NCT6776_ALARM_BITS;
3171 data->fan_from_reg = fan_from_reg13;
3172 data->fan_from_reg_min = fan_from_reg13;
3173 data->target_temp_mask = 0xff;
3174 data->tolerance_mask = 0x07;
3175 data->speed_tolerance_limit = 63;
3177 data->temp_label = nct6776_temp_label;
3178 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3180 data->REG_CONFIG = NCT6775_REG_CONFIG;
3181 data->REG_VBAT = NCT6775_REG_VBAT;
3182 data->REG_DIODE = NCT6775_REG_DIODE;
3183 data->DIODE_MASK = NCT6775_DIODE_MASK;
3184 data->REG_VIN = NCT6775_REG_IN;
3185 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3186 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3187 data->REG_TARGET = NCT6775_REG_TARGET;
3188 data->REG_FAN = NCT6775_REG_FAN;
3189 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3190 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3191 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3192 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3193 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3194 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3195 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3196 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3197 data->REG_PWM[0] = NCT6775_REG_PWM;
3198 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3199 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3200 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3201 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3202 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3203 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3204 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3205 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3206 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3207 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3208 data->REG_CRITICAL_TEMP_TOLERANCE
3209 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3210 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3211 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3212 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3213 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3214 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3215 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3216 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3217 data->REG_ALARM = NCT6775_REG_ALARM;
3219 reg_temp = NCT6775_REG_TEMP;
3220 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3221 reg_temp_over = NCT6775_REG_TEMP_OVER;
3222 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3223 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3224 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3225 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3231 data->auto_pwm_num = 4;
3232 data->has_fan_div = false;
3233 data->temp_fixed_num = 6;
3235 data->ALARM_BITS = NCT6779_ALARM_BITS;
3237 data->fan_from_reg = fan_from_reg13;
3238 data->fan_from_reg_min = fan_from_reg13;
3239 data->target_temp_mask = 0xff;
3240 data->tolerance_mask = 0x07;
3241 data->speed_tolerance_limit = 63;
3243 data->temp_label = nct6779_temp_label;
3244 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3246 data->REG_CONFIG = NCT6775_REG_CONFIG;
3247 data->REG_VBAT = NCT6775_REG_VBAT;
3248 data->REG_DIODE = NCT6775_REG_DIODE;
3249 data->DIODE_MASK = NCT6775_DIODE_MASK;
3250 data->REG_VIN = NCT6779_REG_IN;
3251 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3252 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3253 data->REG_TARGET = NCT6775_REG_TARGET;
3254 data->REG_FAN = NCT6779_REG_FAN;
3255 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3256 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3257 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3258 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3259 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3260 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3261 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3262 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3263 data->REG_PWM[0] = NCT6775_REG_PWM;
3264 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3265 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3266 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3267 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3268 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3269 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3270 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3271 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3272 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3273 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3274 data->REG_CRITICAL_TEMP_TOLERANCE
3275 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3276 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3277 data->CRITICAL_PWM_ENABLE_MASK
3278 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3279 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3280 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3281 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3282 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3283 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3284 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3285 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3286 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3287 data->REG_ALARM = NCT6779_REG_ALARM;
3289 reg_temp = NCT6779_REG_TEMP;
3290 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3291 reg_temp_over = NCT6779_REG_TEMP_OVER;
3292 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3293 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3294 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3295 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3301 data->have_in = (1 << data->in_num) - 1;
3302 data->have_temp = 0;
3305 * On some boards, not all available temperature sources are monitored,
3306 * even though some of the monitoring registers are unused.
3307 * Get list of unused monitoring registers, then detect if any fan
3308 * controls are configured to use unmonitored temperature sources.
3309 * If so, assign the unmonitored temperature sources to available
3310 * monitoring registers.
3314 for (i = 0; i < num_reg_temp; i++) {
3315 if (reg_temp[i] == 0)
3318 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3319 if (!src || (mask & (1 << src)))
3320 available |= 1 << i;
3326 * Now find unmonitored temperature registers and enable monitoring
3327 * if additional monitoring registers are available.
3329 add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3330 add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3333 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
3334 for (i = 0; i < num_reg_temp; i++) {
3335 if (reg_temp[i] == 0)
3338 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3339 if (!src || (mask & (1 << src)))
3342 if (src >= data->temp_label_num ||
3343 !strlen(data->temp_label[src])) {
3345 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3346 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3352 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3353 if (src <= data->temp_fixed_num) {
3354 data->have_temp |= 1 << (src - 1);
3355 data->have_temp_fixed |= 1 << (src - 1);
3356 data->reg_temp[0][src - 1] = reg_temp[i];
3357 data->reg_temp[1][src - 1] = reg_temp_over[i];
3358 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3359 data->reg_temp_config[src - 1] = reg_temp_config[i];
3360 data->temp_src[src - 1] = src;
3367 /* Use dynamic index for other sources */
3368 data->have_temp |= 1 << s;
3369 data->reg_temp[0][s] = reg_temp[i];
3370 data->reg_temp[1][s] = reg_temp_over[i];
3371 data->reg_temp[2][s] = reg_temp_hyst[i];
3372 data->reg_temp_config[s] = reg_temp_config[i];
3373 if (reg_temp_crit[src - 1])
3374 data->reg_temp[3][s] = reg_temp_crit[src - 1];
3376 data->temp_src[s] = src;
3380 #ifdef USE_ALTERNATE
3382 * Go through the list of alternate temp registers and enable
3384 * The temperature is already monitored if the respective bit in <mask>
3387 for (i = 0; i < data->temp_label_num - 1; i++) {
3388 if (!reg_temp_alternate[i])
3390 if (mask & (1 << (i + 1)))
3392 if (i < data->temp_fixed_num) {
3393 if (data->have_temp & (1 << i))
3395 data->have_temp |= 1 << i;
3396 data->have_temp_fixed |= 1 << i;
3397 data->reg_temp[0][i] = reg_temp_alternate[i];
3398 data->reg_temp[1][i] = reg_temp_over[i];
3399 data->reg_temp[2][i] = reg_temp_hyst[i];
3400 data->temp_src[i] = i + 1;
3404 if (s >= NUM_TEMP) /* Abort if no more space */
3407 data->have_temp |= 1 << s;
3408 data->reg_temp[0][s] = reg_temp_alternate[i];
3409 data->temp_src[s] = i + 1;
3412 #endif /* USE_ALTERNATE */
3414 /* Initialize the chip */
3415 nct6775_init_device(data);
3417 err = superio_enter(sio_data->sioreg);
3421 cr2a = superio_inb(sio_data->sioreg, 0x2a);
3422 switch (data->kind) {
3424 data->have_vid = (cr2a & 0x40);
3427 data->have_vid = (cr2a & 0x60) == 0x40;
3436 * We can get the VID input values directly at logical device D 0xe3.
3438 if (data->have_vid) {
3439 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3440 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3441 data->vrm = vid_which_vrm();
3447 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3448 tmp = superio_inb(sio_data->sioreg,
3449 NCT6775_REG_CR_FAN_DEBOUNCE);
3450 switch (data->kind) {
3462 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3464 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3468 nct6775_check_fan_inputs(sio_data, data);
3470 superio_exit(sio_data->sioreg);
3472 /* Read fan clock dividers immediately */
3473 nct6775_init_fan_common(dev, data);
3475 /* Register sysfs hooks */
3476 group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
3478 if (IS_ERR(group)) {
3479 err = PTR_ERR(group);
3482 data->group_pwm = group;
3484 group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
3485 fls(data->have_in));
3486 if (IS_ERR(group)) {
3487 err = PTR_ERR(group);
3490 data->group_in = group;
3492 group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
3493 fls(data->has_fan));
3494 if (IS_ERR(group)) {
3495 err = PTR_ERR(group);
3498 data->group_fan = group;
3500 group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
3501 fls(data->have_temp));
3502 if (IS_ERR(group)) {
3503 err = PTR_ERR(group);
3506 data->group_temp = group;
3508 err = sysfs_create_group(&dev->kobj, &nct6775_group_other);
3512 data->hwmon_dev = hwmon_device_register(dev);
3513 if (IS_ERR(data->hwmon_dev)) {
3514 err = PTR_ERR(data->hwmon_dev);
3521 nct6775_device_remove_files(dev);
3525 static int nct6775_remove(struct platform_device *pdev)
3527 struct nct6775_data *data = platform_get_drvdata(pdev);
3529 hwmon_device_unregister(data->hwmon_dev);
3530 nct6775_device_remove_files(&pdev->dev);
3536 static int nct6775_suspend(struct device *dev)
3538 struct nct6775_data *data = nct6775_update_device(dev);
3539 struct nct6775_sio_data *sio_data = dev->platform_data;
3541 mutex_lock(&data->update_lock);
3542 data->vbat = nct6775_read_value(data, data->REG_VBAT);
3543 if (sio_data->kind == nct6775) {
3544 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
3545 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
3547 mutex_unlock(&data->update_lock);
3552 static int nct6775_resume(struct device *dev)
3554 struct nct6775_data *data = dev_get_drvdata(dev);
3555 struct nct6775_sio_data *sio_data = dev->platform_data;
3558 mutex_lock(&data->update_lock);
3559 data->bank = 0xff; /* Force initial bank selection */
3561 /* Restore limits */
3562 for (i = 0; i < data->in_num; i++) {
3563 if (!(data->have_in & (1 << i)))
3566 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
3568 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
3572 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
3573 if (!(data->has_fan_min & (1 << i)))
3576 nct6775_write_value(data, data->REG_FAN_MIN[i],
3580 for (i = 0; i < NUM_TEMP; i++) {
3581 if (!(data->have_temp & (1 << i)))
3584 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
3585 if (data->reg_temp[j][i])
3586 nct6775_write_temp(data, data->reg_temp[j][i],
3590 /* Restore other settings */
3591 nct6775_write_value(data, data->REG_VBAT, data->vbat);
3592 if (sio_data->kind == nct6775) {
3593 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
3594 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
3597 /* Force re-reading all values */
3598 data->valid = false;
3599 mutex_unlock(&data->update_lock);
3604 static const struct dev_pm_ops nct6775_dev_pm_ops = {
3605 .suspend = nct6775_suspend,
3606 .resume = nct6775_resume,
3609 #define NCT6775_DEV_PM_OPS (&nct6775_dev_pm_ops)
3611 #define NCT6775_DEV_PM_OPS NULL
3612 #endif /* CONFIG_PM */
3614 static struct platform_driver nct6775_driver = {
3616 .owner = THIS_MODULE,
3618 .pm = NCT6775_DEV_PM_OPS,
3620 .probe = nct6775_probe,
3621 .remove = nct6775_remove,
3624 static const char *nct6775_sio_names[] __initconst = {
3631 /* nct6775_find() looks for a '627 in the Super-I/O config space */
3632 static int __init nct6775_find(int sioaddr, unsigned short *addr,
3633 struct nct6775_sio_data *sio_data)
3638 err = superio_enter(sioaddr);
3645 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
3646 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
3647 switch (val & SIO_ID_MASK) {
3648 case SIO_NCT6106_ID:
3649 sio_data->kind = nct6106;
3651 case SIO_NCT6775_ID:
3652 sio_data->kind = nct6775;
3654 case SIO_NCT6776_ID:
3655 sio_data->kind = nct6776;
3657 case SIO_NCT6779_ID:
3658 sio_data->kind = nct6779;
3662 pr_debug("unsupported chip ID: 0x%04x\n", val);
3663 superio_exit(sioaddr);
3667 /* We have a known chip, find the HWM I/O address */
3668 superio_select(sioaddr, NCT6775_LD_HWM);
3669 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
3670 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
3671 *addr = val & IOREGION_ALIGNMENT;
3673 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
3674 superio_exit(sioaddr);
3678 /* Activate logical device if needed */
3679 val = superio_inb(sioaddr, SIO_REG_ENABLE);
3680 if (!(val & 0x01)) {
3681 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
3682 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
3685 superio_exit(sioaddr);
3686 pr_info("Found %s or compatible chip at %#x:%#x\n",
3687 nct6775_sio_names[sio_data->kind], sioaddr, *addr);
3688 sio_data->sioreg = sioaddr;
3694 * when Super-I/O functions move to a separate file, the Super-I/O
3695 * bus will manage the lifetime of the device and this module will only keep
3696 * track of the nct6775 driver. But since we platform_device_alloc(), we
3697 * must keep track of the device
3699 static struct platform_device *pdev[2];
3701 static int __init sensors_nct6775_init(void)
3705 unsigned short address;
3706 struct resource res;
3707 struct nct6775_sio_data sio_data;
3708 int sioaddr[2] = { 0x2e, 0x4e };
3710 err = platform_driver_register(&nct6775_driver);
3715 * initialize sio_data->kind and sio_data->sioreg.
3717 * when Super-I/O functions move to a separate file, the Super-I/O
3718 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
3719 * nct6775 hardware monitor, and call probe()
3721 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
3722 if (nct6775_find(sioaddr[i], &address, &sio_data))
3727 pdev[i] = platform_device_alloc(DRVNAME, address);
3730 goto exit_device_put;
3733 err = platform_device_add_data(pdev[i], &sio_data,
3734 sizeof(struct nct6775_sio_data));
3736 goto exit_device_put;
3738 memset(&res, 0, sizeof(res));
3740 res.start = address + IOREGION_OFFSET;
3741 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
3742 res.flags = IORESOURCE_IO;
3744 err = acpi_check_resource_conflict(&res);
3746 platform_device_put(pdev[i]);
3751 err = platform_device_add_resources(pdev[i], &res, 1);
3753 goto exit_device_put;
3755 /* platform_device_add calls probe() */
3756 err = platform_device_add(pdev[i]);
3758 goto exit_device_put;
3762 goto exit_unregister;
3768 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
3770 platform_device_put(pdev[i]);
3773 platform_driver_unregister(&nct6775_driver);
3777 static void __exit sensors_nct6775_exit(void)
3781 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
3783 platform_device_unregister(pdev[i]);
3785 platform_driver_unregister(&nct6775_driver);
3788 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
3789 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
3790 MODULE_LICENSE("GPL");
3792 module_init(sensors_nct6775_init);
3793 module_exit(sensors_nct6775_exit);