2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2012 Jean Delvare <khali@linux-fr.org>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 * Supports the following chips:
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3
37 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
38 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
39 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
41 * #temp lists the number of monitored temperature sources (first value) plus
42 * the number of directly connectable temperature sensors (second value).
45 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
47 #include <linux/module.h>
48 #include <linux/init.h>
49 #include <linux/slab.h>
50 #include <linux/jiffies.h>
51 #include <linux/platform_device.h>
52 #include <linux/hwmon.h>
53 #include <linux/hwmon-sysfs.h>
54 #include <linux/hwmon-vid.h>
55 #include <linux/err.h>
56 #include <linux/mutex.h>
57 #include <linux/acpi.h>
64 enum kinds { nct6106, nct6775, nct6776, nct6779 };
66 /* used to set data->name = nct6775_device_names[data->sio_kind] */
67 static const char * const nct6775_device_names[] = {
74 static unsigned short force_id;
75 module_param(force_id, ushort, 0);
76 MODULE_PARM_DESC(force_id, "Override the detected device ID");
78 static unsigned short fan_debounce;
79 module_param(fan_debounce, ushort, 0);
80 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
82 #define DRVNAME "nct6775"
85 * Super-I/O constants and functions
88 #define NCT6775_LD_ACPI 0x0a
89 #define NCT6775_LD_HWM 0x0b
90 #define NCT6775_LD_VID 0x0d
92 #define SIO_REG_LDSEL 0x07 /* Logical device select */
93 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
94 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
95 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
97 #define SIO_NCT6106_ID 0xc450
98 #define SIO_NCT6775_ID 0xb470
99 #define SIO_NCT6776_ID 0xc330
100 #define SIO_NCT6779_ID 0xc560
101 #define SIO_ID_MASK 0xFFF0
103 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
106 superio_outb(int ioreg, int reg, int val)
109 outb(val, ioreg + 1);
113 superio_inb(int ioreg, int reg)
116 return inb(ioreg + 1);
120 superio_select(int ioreg, int ld)
122 outb(SIO_REG_LDSEL, ioreg);
127 superio_enter(int ioreg)
130 * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
132 if (!request_muxed_region(ioreg, 2, DRVNAME))
142 superio_exit(int ioreg)
146 outb(0x02, ioreg + 1);
147 release_region(ioreg, 2);
154 #define IOREGION_ALIGNMENT (~7)
155 #define IOREGION_OFFSET 5
156 #define IOREGION_LENGTH 2
157 #define ADDR_REG_OFFSET 0
158 #define DATA_REG_OFFSET 1
160 #define NCT6775_REG_BANK 0x4E
161 #define NCT6775_REG_CONFIG 0x40
164 * Not currently used:
165 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
166 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
167 * REG_MAN_ID is at port 0x4f
168 * REG_CHIP_ID is at port 0x58
171 #define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
172 #define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
174 #define NUM_REG_ALARM 7 /* Max number of alarm registers */
176 /* Common and NCT6775 specific data */
178 /* Voltage min/max registers for nr=7..14 are in bank 5 */
180 static const u16 NCT6775_REG_IN_MAX[] = {
181 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
182 0x55c, 0x55e, 0x560, 0x562 };
183 static const u16 NCT6775_REG_IN_MIN[] = {
184 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
185 0x55d, 0x55f, 0x561, 0x563 };
186 static const u16 NCT6775_REG_IN[] = {
187 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
190 #define NCT6775_REG_VBAT 0x5D
191 #define NCT6775_REG_DIODE 0x5E
192 #define NCT6775_DIODE_MASK 0x02
194 #define NCT6775_REG_FANDIV1 0x506
195 #define NCT6775_REG_FANDIV2 0x507
197 #define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
199 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
201 /* 0..15 voltages, 16..23 fans, 24..31 temperatures */
203 static const s8 NCT6775_ALARM_BITS[] = {
204 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
205 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
207 6, 7, 11, 10, 23, /* fan1..fan5 */
208 -1, -1, -1, /* unused */
209 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
210 12, -1 }; /* intrusion0, intrusion1 */
212 #define FAN_ALARM_BASE 16
213 #define TEMP_ALARM_BASE 24
214 #define INTRUSION_ALARM_BASE 30
216 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
217 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
219 /* DC or PWM output fan configuration */
220 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
221 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
223 /* Advanced Fan control, some values are common for all fans */
225 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301, 0x801, 0x901 };
226 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302, 0x802, 0x902 };
227 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
228 0x103, 0x203, 0x303, 0x803, 0x903 };
229 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
230 0x104, 0x204, 0x304, 0x804, 0x904 };
231 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
232 0x105, 0x205, 0x305, 0x805, 0x905 };
233 static const u16 NCT6775_REG_FAN_START_OUTPUT[]
234 = { 0x106, 0x206, 0x306, 0x806, 0x906 };
235 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
236 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
238 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
239 0x107, 0x207, 0x307, 0x807, 0x907 };
240 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309, 0x809, 0x909 };
241 static const u16 NCT6775_REG_PWM_READ[] = { 0x01, 0x03, 0x11, 0x13, 0x15 };
243 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
244 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
245 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
246 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0 };
248 static const u16 NCT6775_REG_TEMP[] = {
249 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
251 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
252 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
253 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
254 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
255 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
256 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
258 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
259 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
261 static const u16 NCT6775_REG_TEMP_SEL[] = {
262 0x100, 0x200, 0x300, 0x800, 0x900 };
264 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
265 0x139, 0x239, 0x339, 0x839, 0x939 };
266 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
267 0x13a, 0x23a, 0x33a, 0x83a, 0x93a };
268 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
269 0x13b, 0x23b, 0x33b, 0x83b, 0x93b };
270 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
271 0x13c, 0x23c, 0x33c, 0x83c, 0x93c };
272 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
273 0x13d, 0x23d, 0x33d, 0x83d, 0x93d };
275 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
277 static const u16 NCT6775_REG_AUTO_TEMP[] = {
278 0x121, 0x221, 0x321, 0x821, 0x921 };
279 static const u16 NCT6775_REG_AUTO_PWM[] = {
280 0x127, 0x227, 0x327, 0x827, 0x927 };
282 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
283 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
285 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
287 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
288 0x135, 0x235, 0x335, 0x835, 0x935 };
289 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
290 0x138, 0x238, 0x338, 0x838, 0x938 };
292 static const char *const nct6775_temp_label[] = {
306 "PCH_CHIP_CPU_MAX_TEMP",
316 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
317 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
319 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
320 = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
323 /* NCT6776 specific data */
325 static const s8 NCT6776_ALARM_BITS[] = {
326 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
327 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
329 6, 7, 11, 10, 23, /* fan1..fan5 */
330 -1, -1, -1, /* unused */
331 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
332 12, 9 }; /* intrusion0, intrusion1 */
334 static const u16 NCT6776_REG_TOLERANCE_H[] = {
335 0x10c, 0x20c, 0x30c, 0x80c, 0x90c };
337 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0 };
338 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0 };
340 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
341 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
343 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
344 0x13e, 0x23e, 0x33e, 0x83e, 0x93e };
346 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
347 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
349 static const char *const nct6776_temp_label[] = {
364 "PCH_CHIP_CPU_MAX_TEMP",
375 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
376 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
378 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
379 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
381 /* NCT6779 specific data */
383 static const u16 NCT6779_REG_IN[] = {
384 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
385 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
387 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
388 0x459, 0x45A, 0x45B, 0x568 };
390 static const s8 NCT6779_ALARM_BITS[] = {
391 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
392 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
394 6, 7, 11, 10, 23, /* fan1..fan5 */
395 -1, -1, -1, /* unused */
396 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
397 12, 9 }; /* intrusion0, intrusion1 */
399 static const u16 NCT6779_REG_FAN[] = { 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8 };
400 static const u16 NCT6779_REG_FAN_PULSES[] = {
401 0x644, 0x645, 0x646, 0x647, 0x648 };
403 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
404 0x136, 0x236, 0x336, 0x836, 0x936 };
405 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01
406 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
407 0x137, 0x237, 0x337, 0x837, 0x937 };
409 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
410 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
412 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
414 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
417 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
418 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
420 static const char *const nct6779_temp_label[] = {
439 "PCH_CHIP_CPU_MAX_TEMP",
450 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
451 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
452 0, 0, 0, 0, 0, 0, 0, 0,
453 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
456 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
457 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
459 /* NCT6102D/NCT6106D specific data */
461 #define NCT6106_REG_VBAT 0x318
462 #define NCT6106_REG_DIODE 0x319
463 #define NCT6106_DIODE_MASK 0x01
465 static const u16 NCT6106_REG_IN_MAX[] = {
466 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
467 static const u16 NCT6106_REG_IN_MIN[] = {
468 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
469 static const u16 NCT6106_REG_IN[] = {
470 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
472 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
473 static const u16 NCT6106_REG_TEMP_HYST[] = {
474 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
475 static const u16 NCT6106_REG_TEMP_OVER[] = {
476 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
477 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
478 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
479 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
480 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
481 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
482 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
483 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
485 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
486 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
487 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
488 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
490 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
491 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
492 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
493 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
494 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
495 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
496 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
497 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
499 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
500 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
501 0x11b, 0x12b, 0x13b };
503 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
504 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10
505 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
507 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
508 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
509 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
510 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
511 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
512 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
514 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
516 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
517 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
518 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
519 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
520 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
521 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
523 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
524 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
526 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
527 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
529 static const s8 NCT6106_ALARM_BITS[] = {
530 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
531 9, -1, -1, -1, -1, -1, -1, /* in8..in14 */
533 32, 33, 34, -1, -1, /* fan1..fan5 */
534 -1, -1, -1, /* unused */
535 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
536 48, -1 /* intrusion0, intrusion1 */
539 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
540 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
542 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
543 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
545 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
547 if (mode == 0 && pwm == 255)
552 static int pwm_enable_to_reg(enum pwm_enable mode)
563 /* 1 is DC mode, output in ms */
564 static unsigned int step_time_from_reg(u8 reg, u8 mode)
566 return mode ? 400 * reg : 100 * reg;
569 static u8 step_time_to_reg(unsigned int msec, u8 mode)
571 return clamp_val((mode ? (msec + 200) / 400 :
572 (msec + 50) / 100), 1, 255);
575 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
577 if (reg == 0 || reg == 255)
579 return 1350000U / (reg << divreg);
582 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
584 if ((reg & 0xff1f) == 0xff1f)
587 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
592 return 1350000U / reg;
595 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
597 if (reg == 0 || reg == 0xffff)
601 * Even though the registers are 16 bit wide, the fan divisor
604 return 1350000U / (reg << divreg);
607 static u16 fan_to_reg(u32 fan, unsigned int divreg)
612 return (1350000U / fan) >> divreg;
615 static inline unsigned int
622 * Some of the voltage inputs have internal scaling, the tables below
623 * contain 8 (the ADC LSB in mV) * scaling factor * 100
625 static const u16 scale_in[15] = {
626 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
630 static inline long in_from_reg(u8 reg, u8 nr)
632 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
635 static inline u8 in_to_reg(u32 val, u8 nr)
637 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
641 * Data structures and manipulation thereof
644 struct nct6775_data {
645 int addr; /* IO base of hw monitor block */
649 struct device *hwmon_dev;
650 struct attribute_group *group_in;
651 struct attribute_group *group_fan;
652 struct attribute_group *group_temp;
653 struct attribute_group *group_pwm;
655 u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
656 * 3=temp_crit, 4=temp_lcrit
658 u8 temp_src[NUM_TEMP];
659 u16 reg_temp_config[NUM_TEMP];
660 const char * const *temp_label;
668 const s8 *ALARM_BITS;
671 const u16 *REG_IN_MINMAX[2];
673 const u16 *REG_TARGET;
675 const u16 *REG_FAN_MODE;
676 const u16 *REG_FAN_MIN;
677 const u16 *REG_FAN_PULSES;
678 const u16 *FAN_PULSE_SHIFT;
679 const u16 *REG_FAN_TIME[3];
681 const u16 *REG_TOLERANCE_H;
683 const u8 *REG_PWM_MODE;
684 const u8 *PWM_MODE_MASK;
686 const u16 *REG_PWM[7]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
687 * [3]=pwm_max, [4]=pwm_step,
688 * [5]=weight_duty_step, [6]=weight_duty_base
690 const u16 *REG_PWM_READ;
692 const u16 *REG_CRITICAL_PWM_ENABLE;
693 u8 CRITICAL_PWM_ENABLE_MASK;
694 const u16 *REG_CRITICAL_PWM;
696 const u16 *REG_AUTO_TEMP;
697 const u16 *REG_AUTO_PWM;
699 const u16 *REG_CRITICAL_TEMP;
700 const u16 *REG_CRITICAL_TEMP_TOLERANCE;
702 const u16 *REG_TEMP_SOURCE; /* temp register sources */
703 const u16 *REG_TEMP_SEL;
704 const u16 *REG_WEIGHT_TEMP_SEL;
705 const u16 *REG_WEIGHT_TEMP[3]; /* 0=base, 1=tolerance, 2=step */
707 const u16 *REG_TEMP_OFFSET;
709 const u16 *REG_ALARM;
711 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
712 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
714 struct mutex update_lock;
715 bool valid; /* true if following fields are valid */
716 unsigned long last_updated; /* In jiffies */
718 /* Register values */
719 u8 bank; /* current register bank */
720 u8 in_num; /* number of in inputs we have */
721 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
727 u8 has_fan; /* some fan inputs can be disabled */
728 u8 has_fan_min; /* some fans don't have min register */
731 u8 temp_fixed_num; /* 3 or 6 */
732 u8 temp_type[NUM_TEMP_FIXED];
733 s8 temp_offset[NUM_TEMP_FIXED];
734 s16 temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
738 u8 pwm_num; /* number of pwm */
739 u8 pwm_mode[5]; /* 1->DC variable voltage, 0->PWM variable duty cycle */
740 enum pwm_enable pwm_enable[5];
743 * 2->thermal cruise mode (also called SmartFan I)
744 * 3->fan speed cruise mode
746 * 5->enhanced variable thermal cruise (SmartFan IV)
748 u8 pwm[7][5]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
749 * [3]=pwm_max, [4]=pwm_step,
750 * [5]=weight_duty_step, [6]=weight_duty_base
756 u32 target_speed_tolerance[5];
757 u8 speed_tolerance_limit;
759 u8 temp_tolerance[2][5];
762 u8 fan_time[3][5]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
764 /* Automatic fan speed control registers */
769 u8 pwm_weight_temp_sel[5];
770 u8 weight_temp[3][5]; /* 0->temp_step, 1->temp_step_tol,
783 /* Remember extra register values over suspend/resume */
790 struct nct6775_sio_data {
795 struct sensor_device_template {
796 struct device_attribute dev_attr;
804 bool s2; /* true if both index and nr are used */
807 struct sensor_device_attr_u {
809 struct sensor_device_attribute a1;
810 struct sensor_device_attribute_2 a2;
815 #define SENSOR_DEVICE_TEMPLATE(_name, _mode, _show, _store, _index) \
816 { .dev_attr = __ATTR(_name, _mode, _show, _store), \
820 #define SENSOR_DEVICE_TEMPLATE_2(_name, _mode, _show, _store, \
822 { .dev_attr = __ATTR(_name, _mode, _show, _store), \
823 .u.s.index = _index, \
827 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
828 static struct sensor_device_template sensor_dev_template_##_name \
829 = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \
832 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \
834 static struct sensor_device_template sensor_dev_template_##_name \
835 = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
838 struct sensor_template_group {
839 struct sensor_device_template **templates;
840 umode_t (*is_visible)(struct kobject *, struct attribute *, int);
844 static struct attribute_group *
845 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
848 struct attribute_group *group;
849 struct sensor_device_attr_u *su;
850 struct sensor_device_attribute *a;
851 struct sensor_device_attribute_2 *a2;
852 struct attribute **attrs;
853 struct sensor_device_template **t;
854 int err, i, j, count;
857 return ERR_PTR(-EINVAL);
860 for (count = 0; *t; t++, count++)
864 return ERR_PTR(-EINVAL);
866 group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
868 return ERR_PTR(-ENOMEM);
870 attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
873 return ERR_PTR(-ENOMEM);
875 su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
878 return ERR_PTR(-ENOMEM);
880 group->attrs = attrs;
881 group->is_visible = tg->is_visible;
883 for (i = 0; i < repeat; i++) {
885 for (j = 0; *t != NULL; j++) {
886 snprintf(su->name, sizeof(su->name),
887 (*t)->dev_attr.attr.name, tg->base + i);
890 a2->dev_attr.attr.name = su->name;
891 a2->nr = (*t)->u.s.nr + i;
892 a2->index = (*t)->u.s.index;
893 a2->dev_attr.attr.mode =
894 (*t)->dev_attr.attr.mode;
895 a2->dev_attr.show = (*t)->dev_attr.show;
896 a2->dev_attr.store = (*t)->dev_attr.store;
897 *attrs = &a2->dev_attr.attr;
900 a->dev_attr.attr.name = su->name;
901 a->index = (*t)->u.index + i;
902 a->dev_attr.attr.mode =
903 (*t)->dev_attr.attr.mode;
904 a->dev_attr.show = (*t)->dev_attr.show;
905 a->dev_attr.store = (*t)->dev_attr.store;
906 *attrs = &a->dev_attr.attr;
914 err = sysfs_create_group(&dev->kobj, group);
916 return ERR_PTR(-ENOMEM);
921 static bool is_word_sized(struct nct6775_data *data, u16 reg)
923 switch (data->kind) {
925 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
926 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
927 reg == 0x111 || reg == 0x121 || reg == 0x131;
929 return (((reg & 0xff00) == 0x100 ||
930 (reg & 0xff00) == 0x200) &&
931 ((reg & 0x00ff) == 0x50 ||
932 (reg & 0x00ff) == 0x53 ||
933 (reg & 0x00ff) == 0x55)) ||
934 (reg & 0xfff0) == 0x630 ||
935 reg == 0x640 || reg == 0x642 ||
937 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
938 reg == 0x73 || reg == 0x75 || reg == 0x77;
940 return (((reg & 0xff00) == 0x100 ||
941 (reg & 0xff00) == 0x200) &&
942 ((reg & 0x00ff) == 0x50 ||
943 (reg & 0x00ff) == 0x53 ||
944 (reg & 0x00ff) == 0x55)) ||
945 (reg & 0xfff0) == 0x630 ||
947 reg == 0x640 || reg == 0x642 ||
948 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
949 reg == 0x73 || reg == 0x75 || reg == 0x77;
951 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
952 ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x09) ||
954 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
955 reg == 0x640 || reg == 0x642 ||
956 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
963 * On older chips, only registers 0x50-0x5f are banked.
964 * On more recent chips, all registers are banked.
965 * Assume that is the case and set the bank number for each access.
966 * Cache the bank number so it only needs to be set if it changes.
968 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
971 if (data->bank != bank) {
972 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
973 outb_p(bank, data->addr + DATA_REG_OFFSET);
978 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
980 int res, word_sized = is_word_sized(data, reg);
982 nct6775_set_bank(data, reg);
983 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
984 res = inb_p(data->addr + DATA_REG_OFFSET);
986 outb_p((reg & 0xff) + 1,
987 data->addr + ADDR_REG_OFFSET);
988 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
993 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
995 int word_sized = is_word_sized(data, reg);
997 nct6775_set_bank(data, reg);
998 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1000 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1001 outb_p((reg & 0xff) + 1,
1002 data->addr + ADDR_REG_OFFSET);
1004 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1008 /* We left-align 8-bit temperature values to make the code simpler */
1009 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1013 res = nct6775_read_value(data, reg);
1014 if (!is_word_sized(data, reg))
1020 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1022 if (!is_word_sized(data, reg))
1024 return nct6775_write_value(data, reg, value);
1027 /* This function assumes that the caller holds data->update_lock */
1028 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1034 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1035 | (data->fan_div[0] & 0x7);
1036 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1039 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1040 | ((data->fan_div[1] << 4) & 0x70);
1041 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1044 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1045 | (data->fan_div[2] & 0x7);
1046 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1049 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1050 | ((data->fan_div[3] << 4) & 0x70);
1051 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1056 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1058 if (data->kind == nct6775)
1059 nct6775_write_fan_div(data, nr);
1062 static void nct6775_update_fan_div(struct nct6775_data *data)
1066 i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1067 data->fan_div[0] = i & 0x7;
1068 data->fan_div[1] = (i & 0x70) >> 4;
1069 i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1070 data->fan_div[2] = i & 0x7;
1071 if (data->has_fan & (1<<3))
1072 data->fan_div[3] = (i & 0x70) >> 4;
1075 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1077 if (data->kind == nct6775)
1078 nct6775_update_fan_div(data);
1081 static void nct6775_init_fan_div(struct nct6775_data *data)
1085 nct6775_update_fan_div_common(data);
1087 * For all fans, start with highest divider value if the divider
1088 * register is not initialized. This ensures that we get a
1089 * reading from the fan count register, even if it is not optimal.
1090 * We'll compute a better divider later on.
1092 for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1093 if (!(data->has_fan & (1 << i)))
1095 if (data->fan_div[i] == 0) {
1096 data->fan_div[i] = 7;
1097 nct6775_write_fan_div_common(data, i);
1102 static void nct6775_init_fan_common(struct device *dev,
1103 struct nct6775_data *data)
1108 if (data->has_fan_div)
1109 nct6775_init_fan_div(data);
1112 * If fan_min is not set (0), set it to 0xff to disable it. This
1113 * prevents the unnecessary warning when fanX_min is reported as 0.
1115 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1116 if (data->has_fan_min & (1 << i)) {
1117 reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1119 nct6775_write_value(data, data->REG_FAN_MIN[i],
1120 data->has_fan_div ? 0xff
1126 static void nct6775_select_fan_div(struct device *dev,
1127 struct nct6775_data *data, int nr, u16 reg)
1129 u8 fan_div = data->fan_div[nr];
1132 if (!data->has_fan_div)
1136 * If we failed to measure the fan speed, or the reported value is not
1137 * in the optimal range, and the clock divider can be modified,
1138 * let's try that for next time.
1140 if (reg == 0x00 && fan_div < 0x07)
1142 else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1145 if (fan_div != data->fan_div[nr]) {
1146 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1147 nr + 1, div_from_reg(data->fan_div[nr]),
1148 div_from_reg(fan_div));
1150 /* Preserve min limit if possible */
1151 if (data->has_fan_min & (1 << nr)) {
1152 fan_min = data->fan_min[nr];
1153 if (fan_div > data->fan_div[nr]) {
1154 if (fan_min != 255 && fan_min > 1)
1157 if (fan_min != 255) {
1163 if (fan_min != data->fan_min[nr]) {
1164 data->fan_min[nr] = fan_min;
1165 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1169 data->fan_div[nr] = fan_div;
1170 nct6775_write_fan_div_common(data, nr);
1174 static void nct6775_update_pwm(struct device *dev)
1176 struct nct6775_data *data = dev_get_drvdata(dev);
1178 int fanmodecfg, reg;
1181 for (i = 0; i < data->pwm_num; i++) {
1182 if (!(data->has_pwm & (1 << i)))
1185 duty_is_dc = data->REG_PWM_MODE[i] &&
1186 (nct6775_read_value(data, data->REG_PWM_MODE[i])
1187 & data->PWM_MODE_MASK[i]);
1188 data->pwm_mode[i] = duty_is_dc;
1190 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1191 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1192 if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1194 = nct6775_read_value(data,
1195 data->REG_PWM[j][i]);
1199 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1200 (fanmodecfg >> 4) & 7);
1202 if (!data->temp_tolerance[0][i] ||
1203 data->pwm_enable[i] != speed_cruise)
1204 data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1205 if (!data->target_speed_tolerance[i] ||
1206 data->pwm_enable[i] == speed_cruise) {
1207 u8 t = fanmodecfg & 0x0f;
1208 if (data->REG_TOLERANCE_H) {
1209 t |= (nct6775_read_value(data,
1210 data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1212 data->target_speed_tolerance[i] = t;
1215 data->temp_tolerance[1][i] =
1216 nct6775_read_value(data,
1217 data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1219 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1220 data->pwm_temp_sel[i] = reg & 0x1f;
1221 /* If fan can stop, report floor as 0 */
1223 data->pwm[2][i] = 0;
1225 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1226 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1227 /* If weight is disabled, report weight source as 0 */
1228 if (j == 1 && !(reg & 0x80))
1229 data->pwm_weight_temp_sel[i] = 0;
1231 /* Weight temp data */
1232 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1233 data->weight_temp[j][i]
1234 = nct6775_read_value(data,
1235 data->REG_WEIGHT_TEMP[j][i]);
1240 static void nct6775_update_pwm_limits(struct device *dev)
1242 struct nct6775_data *data = dev_get_drvdata(dev);
1247 for (i = 0; i < data->pwm_num; i++) {
1248 if (!(data->has_pwm & (1 << i)))
1251 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1252 data->fan_time[j][i] =
1253 nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1256 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1257 /* Update only in matching mode or if never updated */
1258 if (!data->target_temp[i] ||
1259 data->pwm_enable[i] == thermal_cruise)
1260 data->target_temp[i] = reg_t & data->target_temp_mask;
1261 if (!data->target_speed[i] ||
1262 data->pwm_enable[i] == speed_cruise) {
1263 if (data->REG_TOLERANCE_H) {
1264 reg_t |= (nct6775_read_value(data,
1265 data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1267 data->target_speed[i] = reg_t;
1270 for (j = 0; j < data->auto_pwm_num; j++) {
1271 data->auto_pwm[i][j] =
1272 nct6775_read_value(data,
1273 NCT6775_AUTO_PWM(data, i, j));
1274 data->auto_temp[i][j] =
1275 nct6775_read_value(data,
1276 NCT6775_AUTO_TEMP(data, i, j));
1279 /* critical auto_pwm temperature data */
1280 data->auto_temp[i][data->auto_pwm_num] =
1281 nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1283 switch (data->kind) {
1285 reg = nct6775_read_value(data,
1286 NCT6775_REG_CRITICAL_ENAB[i]);
1287 data->auto_pwm[i][data->auto_pwm_num] =
1288 (reg & 0x02) ? 0xff : 0x00;
1291 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1295 reg = nct6775_read_value(data,
1296 data->REG_CRITICAL_PWM_ENABLE[i]);
1297 if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1298 reg = nct6775_read_value(data,
1299 data->REG_CRITICAL_PWM[i]);
1302 data->auto_pwm[i][data->auto_pwm_num] = reg;
1308 static struct nct6775_data *nct6775_update_device(struct device *dev)
1310 struct nct6775_data *data = dev_get_drvdata(dev);
1313 mutex_lock(&data->update_lock);
1315 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
1317 /* Fan clock dividers */
1318 nct6775_update_fan_div_common(data);
1320 /* Measured voltages and limits */
1321 for (i = 0; i < data->in_num; i++) {
1322 if (!(data->have_in & (1 << i)))
1325 data->in[i][0] = nct6775_read_value(data,
1327 data->in[i][1] = nct6775_read_value(data,
1328 data->REG_IN_MINMAX[0][i]);
1329 data->in[i][2] = nct6775_read_value(data,
1330 data->REG_IN_MINMAX[1][i]);
1333 /* Measured fan speeds and limits */
1334 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1337 if (!(data->has_fan & (1 << i)))
1340 reg = nct6775_read_value(data, data->REG_FAN[i]);
1341 data->rpm[i] = data->fan_from_reg(reg,
1344 if (data->has_fan_min & (1 << i))
1345 data->fan_min[i] = nct6775_read_value(data,
1346 data->REG_FAN_MIN[i]);
1347 data->fan_pulses[i] =
1348 (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1349 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1351 nct6775_select_fan_div(dev, data, i, reg);
1354 nct6775_update_pwm(dev);
1355 nct6775_update_pwm_limits(dev);
1357 /* Measured temperatures and limits */
1358 for (i = 0; i < NUM_TEMP; i++) {
1359 if (!(data->have_temp & (1 << i)))
1361 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1362 if (data->reg_temp[j][i])
1364 = nct6775_read_temp(data,
1365 data->reg_temp[j][i]);
1367 if (!(data->have_temp_fixed & (1 << i)))
1369 data->temp_offset[i]
1370 = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1374 for (i = 0; i < NUM_REG_ALARM; i++) {
1376 if (!data->REG_ALARM[i])
1378 alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1379 data->alarms |= ((u64)alarm) << (i << 3);
1382 data->last_updated = jiffies;
1386 mutex_unlock(&data->update_lock);
1391 * Sysfs callback functions
1394 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1396 struct nct6775_data *data = nct6775_update_device(dev);
1397 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1399 int index = sattr->index;
1400 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1404 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1407 struct nct6775_data *data = dev_get_drvdata(dev);
1408 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1410 int index = sattr->index;
1412 int err = kstrtoul(buf, 10, &val);
1415 mutex_lock(&data->update_lock);
1416 data->in[nr][index] = in_to_reg(val, nr);
1417 nct6775_write_value(data, data->REG_IN_MINMAX[index-1][nr],
1418 data->in[nr][index]);
1419 mutex_unlock(&data->update_lock);
1424 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1426 struct nct6775_data *data = nct6775_update_device(dev);
1427 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1428 int nr = data->ALARM_BITS[sattr->index];
1429 return sprintf(buf, "%u\n",
1430 (unsigned int)((data->alarms >> nr) & 0x01));
1433 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1434 struct attribute *attr, int index)
1436 struct device *dev = container_of(kobj, struct device, kobj);
1437 struct nct6775_data *data = dev_get_drvdata(dev);
1438 int in = index / 4; /* voltage index */
1440 if (!(data->have_in & (1 << in)))
1446 SENSOR_TEMPLATE_2(in_input, in%d_input, S_IRUGO, show_in_reg, NULL, 0, 0);
1447 SENSOR_TEMPLATE(in_alarm, in%d_alarm, S_IRUGO, show_alarm, NULL, 0);
1448 SENSOR_TEMPLATE_2(in_min, in%d_min, S_IWUSR | S_IRUGO, show_in_reg,
1449 store_in_reg, 0, 1);
1450 SENSOR_TEMPLATE_2(in_max, in%d_max, S_IWUSR | S_IRUGO, show_in_reg,
1451 store_in_reg, 0, 2);
1454 * nct6775_in_is_visible uses the index into the following array
1455 * to determine if attributes should be created or not.
1456 * Any change in order or content must be matched.
1458 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1459 &sensor_dev_template_in_input,
1460 &sensor_dev_template_in_alarm,
1461 &sensor_dev_template_in_min,
1462 &sensor_dev_template_in_max,
1466 static struct sensor_template_group nct6775_in_template_group = {
1467 .templates = nct6775_attributes_in_template,
1468 .is_visible = nct6775_in_is_visible,
1472 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1474 struct nct6775_data *data = nct6775_update_device(dev);
1475 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1476 int nr = sattr->index;
1477 return sprintf(buf, "%d\n", data->rpm[nr]);
1481 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1483 struct nct6775_data *data = nct6775_update_device(dev);
1484 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1485 int nr = sattr->index;
1486 return sprintf(buf, "%d\n",
1487 data->fan_from_reg_min(data->fan_min[nr],
1488 data->fan_div[nr]));
1492 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1494 struct nct6775_data *data = nct6775_update_device(dev);
1495 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1496 int nr = sattr->index;
1497 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1501 store_fan_min(struct device *dev, struct device_attribute *attr,
1502 const char *buf, size_t count)
1504 struct nct6775_data *data = dev_get_drvdata(dev);
1505 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1506 int nr = sattr->index;
1512 err = kstrtoul(buf, 10, &val);
1516 mutex_lock(&data->update_lock);
1517 if (!data->has_fan_div) {
1518 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1524 val = 1350000U / val;
1525 val = (val & 0x1f) | ((val << 3) & 0xff00);
1527 data->fan_min[nr] = val;
1528 goto write_min; /* Leave fan divider alone */
1531 /* No min limit, alarm disabled */
1532 data->fan_min[nr] = 255;
1533 new_div = data->fan_div[nr]; /* No change */
1534 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1537 reg = 1350000U / val;
1538 if (reg >= 128 * 255) {
1540 * Speed below this value cannot possibly be represented,
1541 * even with the highest divider (128)
1543 data->fan_min[nr] = 254;
1544 new_div = 7; /* 128 == (1 << 7) */
1546 "fan%u low limit %lu below minimum %u, set to minimum\n",
1547 nr + 1, val, data->fan_from_reg_min(254, 7));
1550 * Speed above this value cannot possibly be represented,
1551 * even with the lowest divider (1)
1553 data->fan_min[nr] = 1;
1554 new_div = 0; /* 1 == (1 << 0) */
1556 "fan%u low limit %lu above maximum %u, set to maximum\n",
1557 nr + 1, val, data->fan_from_reg_min(1, 0));
1560 * Automatically pick the best divider, i.e. the one such
1561 * that the min limit will correspond to a register value
1562 * in the 96..192 range
1565 while (reg > 192 && new_div < 7) {
1569 data->fan_min[nr] = reg;
1574 * Write both the fan clock divider (if it changed) and the new
1575 * fan min (unconditionally)
1577 if (new_div != data->fan_div[nr]) {
1578 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1579 nr + 1, div_from_reg(data->fan_div[nr]),
1580 div_from_reg(new_div));
1581 data->fan_div[nr] = new_div;
1582 nct6775_write_fan_div_common(data, nr);
1583 /* Give the chip time to sample a new speed value */
1584 data->last_updated = jiffies;
1588 nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1589 mutex_unlock(&data->update_lock);
1595 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1597 struct nct6775_data *data = nct6775_update_device(dev);
1598 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1599 int p = data->fan_pulses[sattr->index];
1601 return sprintf(buf, "%d\n", p ? : 4);
1605 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1606 const char *buf, size_t count)
1608 struct nct6775_data *data = dev_get_drvdata(dev);
1609 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1610 int nr = sattr->index;
1615 err = kstrtoul(buf, 10, &val);
1622 mutex_lock(&data->update_lock);
1623 data->fan_pulses[nr] = val & 3;
1624 reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1625 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1626 reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1627 nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1628 mutex_unlock(&data->update_lock);
1633 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1634 struct attribute *attr, int index)
1636 struct device *dev = container_of(kobj, struct device, kobj);
1637 struct nct6775_data *data = dev_get_drvdata(dev);
1638 int fan = index / 5; /* fan index */
1639 int nr = index % 5; /* attribute index */
1641 if (!(data->has_fan & (1 << fan)))
1644 if (nr == 3 && !(data->has_fan_min & (1 << fan)))
1646 if (nr == 4 && data->kind != nct6775)
1652 SENSOR_TEMPLATE(fan_input, fan%d_input, S_IRUGO, show_fan, NULL, 0);
1653 SENSOR_TEMPLATE(fan_alarm, fan%d_alarm, S_IRUGO, show_alarm, NULL,
1655 SENSOR_TEMPLATE(fan_pulses, fan%d_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1656 store_fan_pulses, 0);
1657 SENSOR_TEMPLATE(fan_min, fan%d_min, S_IWUSR | S_IRUGO, show_fan_min,
1659 SENSOR_TEMPLATE(fan_div, fan%d_div, S_IRUGO, show_fan_div, NULL, 0);
1662 * nct6775_fan_is_visible uses the index into the following array
1663 * to determine if attributes should be created or not.
1664 * Any change in order or content must be matched.
1666 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1667 &sensor_dev_template_fan_input,
1668 &sensor_dev_template_fan_alarm,
1669 &sensor_dev_template_fan_pulses,
1670 &sensor_dev_template_fan_min, /* 3 */
1671 &sensor_dev_template_fan_div, /* 4 */
1675 static struct sensor_template_group nct6775_fan_template_group = {
1676 .templates = nct6775_attributes_fan_template,
1677 .is_visible = nct6775_fan_is_visible,
1682 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1684 struct nct6775_data *data = nct6775_update_device(dev);
1685 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1686 int nr = sattr->index;
1687 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1691 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1693 struct nct6775_data *data = nct6775_update_device(dev);
1694 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1696 int index = sattr->index;
1698 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1702 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1705 struct nct6775_data *data = dev_get_drvdata(dev);
1706 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1708 int index = sattr->index;
1712 err = kstrtol(buf, 10, &val);
1716 mutex_lock(&data->update_lock);
1717 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1718 nct6775_write_temp(data, data->reg_temp[index][nr],
1719 data->temp[index][nr]);
1720 mutex_unlock(&data->update_lock);
1725 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1727 struct nct6775_data *data = nct6775_update_device(dev);
1728 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1730 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1734 store_temp_offset(struct device *dev, struct device_attribute *attr,
1735 const char *buf, size_t count)
1737 struct nct6775_data *data = dev_get_drvdata(dev);
1738 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1739 int nr = sattr->index;
1743 err = kstrtol(buf, 10, &val);
1747 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1749 mutex_lock(&data->update_lock);
1750 data->temp_offset[nr] = val;
1751 nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
1752 mutex_unlock(&data->update_lock);
1758 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1760 struct nct6775_data *data = nct6775_update_device(dev);
1761 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1762 int nr = sattr->index;
1763 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1767 store_temp_type(struct device *dev, struct device_attribute *attr,
1768 const char *buf, size_t count)
1770 struct nct6775_data *data = nct6775_update_device(dev);
1771 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1772 int nr = sattr->index;
1775 u8 vbat, diode, vbit, dbit;
1777 err = kstrtoul(buf, 10, &val);
1781 if (val != 1 && val != 3 && val != 4)
1784 mutex_lock(&data->update_lock);
1786 data->temp_type[nr] = val;
1788 dbit = data->DIODE_MASK << nr;
1789 vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
1790 diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
1792 case 1: /* CPU diode (diode, current mode) */
1796 case 3: /* diode, voltage mode */
1799 case 4: /* thermistor */
1802 nct6775_write_value(data, data->REG_VBAT, vbat);
1803 nct6775_write_value(data, data->REG_DIODE, diode);
1805 mutex_unlock(&data->update_lock);
1809 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
1810 struct attribute *attr, int index)
1812 struct device *dev = container_of(kobj, struct device, kobj);
1813 struct nct6775_data *data = dev_get_drvdata(dev);
1814 int temp = index / 9; /* temp index */
1815 int nr = index % 9; /* attribute index */
1817 if (!(data->have_temp & (1 << temp)))
1820 if (nr == 2 && !data->reg_temp[1][temp]) /* max */
1823 if (nr == 3 && !data->reg_temp[2][temp]) /* max_hyst */
1826 if (nr == 4 && !data->reg_temp[3][temp]) /* crit */
1829 if (nr == 5 && !data->reg_temp[4][temp]) /* lcrit */
1832 if (nr > 5 && !(data->have_temp_fixed & (1 << temp)))
1835 if (nr == 8 && data->ALARM_BITS[TEMP_ALARM_BASE + temp] < 0)
1841 SENSOR_TEMPLATE_2(temp_input, temp%d_input, S_IRUGO, show_temp, NULL, 0, 0);
1842 SENSOR_TEMPLATE(temp_label, temp%d_label, S_IRUGO, show_temp_label, NULL, 0);
1843 SENSOR_TEMPLATE_2(temp_max, temp%d_max, S_IRUGO | S_IWUSR, show_temp,
1845 SENSOR_TEMPLATE_2(temp_max_hyst, temp%d_max_hyst, S_IRUGO | S_IWUSR, show_temp,
1847 SENSOR_TEMPLATE_2(temp_crit, temp%d_crit, S_IRUGO | S_IWUSR, show_temp,
1849 SENSOR_TEMPLATE(temp_offset, temp%d_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1850 store_temp_offset, 0);
1851 SENSOR_TEMPLATE(temp_type, temp%d_type, S_IRUGO | S_IWUSR, show_temp_type,
1852 store_temp_type, 0);
1853 SENSOR_TEMPLATE(temp_alarm, temp%d_alarm, S_IRUGO, show_alarm, NULL,
1855 SENSOR_TEMPLATE_2(temp_lcrit, temp%d_lcrit, S_IRUGO | S_IWUSR, show_temp,
1859 * nct6775_temp_is_visible uses the index into the following array
1860 * to determine if attributes should be created or not.
1861 * Any change in order or content must be matched.
1863 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
1864 &sensor_dev_template_temp_input,
1865 &sensor_dev_template_temp_label,
1866 &sensor_dev_template_temp_max, /* 2 */
1867 &sensor_dev_template_temp_max_hyst, /* 3 */
1868 &sensor_dev_template_temp_crit, /* 4 */
1869 &sensor_dev_template_temp_lcrit, /* 5 */
1870 &sensor_dev_template_temp_offset, /* 6 */
1871 &sensor_dev_template_temp_type, /* 7 */
1872 &sensor_dev_template_temp_alarm, /* 8 */
1876 static struct sensor_template_group nct6775_temp_template_group = {
1877 .templates = nct6775_attributes_temp_template,
1878 .is_visible = nct6775_temp_is_visible,
1883 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
1885 struct nct6775_data *data = nct6775_update_device(dev);
1886 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1888 return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
1892 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1893 const char *buf, size_t count)
1895 struct nct6775_data *data = dev_get_drvdata(dev);
1896 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1897 int nr = sattr->index;
1902 err = kstrtoul(buf, 10, &val);
1909 /* Setting DC mode is not supported for all chips/channels */
1910 if (data->REG_PWM_MODE[nr] == 0) {
1916 mutex_lock(&data->update_lock);
1917 data->pwm_mode[nr] = val;
1918 reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
1919 reg &= ~data->PWM_MODE_MASK[nr];
1921 reg |= data->PWM_MODE_MASK[nr];
1922 nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
1923 mutex_unlock(&data->update_lock);
1928 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1930 struct nct6775_data *data = nct6775_update_device(dev);
1931 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1933 int index = sattr->index;
1937 * For automatic fan control modes, show current pwm readings.
1938 * Otherwise, show the configured value.
1940 if (index == 0 && data->pwm_enable[nr] > manual)
1941 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
1943 pwm = data->pwm[index][nr];
1945 return sprintf(buf, "%d\n", pwm);
1949 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
1952 struct nct6775_data *data = dev_get_drvdata(dev);
1953 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1955 int index = sattr->index;
1957 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
1959 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
1963 err = kstrtoul(buf, 10, &val);
1966 val = clamp_val(val, minval[index], maxval[index]);
1968 mutex_lock(&data->update_lock);
1969 data->pwm[index][nr] = val;
1970 nct6775_write_value(data, data->REG_PWM[index][nr], val);
1971 if (index == 2) { /* floor: disable if val == 0 */
1972 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
1976 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
1978 mutex_unlock(&data->update_lock);
1982 /* Returns 0 if OK, -EINVAL otherwise */
1983 static int check_trip_points(struct nct6775_data *data, int nr)
1987 for (i = 0; i < data->auto_pwm_num - 1; i++) {
1988 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1991 for (i = 0; i < data->auto_pwm_num - 1; i++) {
1992 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1995 /* validate critical temperature and pwm if enabled (pwm > 0) */
1996 if (data->auto_pwm[nr][data->auto_pwm_num]) {
1997 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
1998 data->auto_temp[nr][data->auto_pwm_num] ||
1999 data->auto_pwm[nr][data->auto_pwm_num - 1] >
2000 data->auto_pwm[nr][data->auto_pwm_num])
2006 static void pwm_update_registers(struct nct6775_data *data, int nr)
2010 switch (data->pwm_enable[nr]) {
2015 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2016 reg = (reg & ~data->tolerance_mask) |
2017 (data->target_speed_tolerance[nr] & data->tolerance_mask);
2018 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2019 nct6775_write_value(data, data->REG_TARGET[nr],
2020 data->target_speed[nr] & 0xff);
2021 if (data->REG_TOLERANCE_H) {
2022 reg = (data->target_speed[nr] >> 8) & 0x0f;
2023 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2024 nct6775_write_value(data,
2025 data->REG_TOLERANCE_H[nr],
2029 case thermal_cruise:
2030 nct6775_write_value(data, data->REG_TARGET[nr],
2031 data->target_temp[nr]);
2034 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2035 reg = (reg & ~data->tolerance_mask) |
2036 data->temp_tolerance[0][nr];
2037 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2043 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2045 struct nct6775_data *data = nct6775_update_device(dev);
2046 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2048 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2052 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2053 const char *buf, size_t count)
2055 struct nct6775_data *data = dev_get_drvdata(dev);
2056 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2057 int nr = sattr->index;
2062 err = kstrtoul(buf, 10, &val);
2069 if (val == sf3 && data->kind != nct6775)
2072 if (val == sf4 && check_trip_points(data, nr)) {
2073 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2074 dev_err(dev, "Adjust trip points and try again\n");
2078 mutex_lock(&data->update_lock);
2079 data->pwm_enable[nr] = val;
2082 * turn off pwm control: select manual mode, set pwm to maximum
2084 data->pwm[0][nr] = 255;
2085 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2087 pwm_update_registers(data, nr);
2088 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2090 reg |= pwm_enable_to_reg(val) << 4;
2091 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2092 mutex_unlock(&data->update_lock);
2097 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2101 for (i = 0; i < NUM_TEMP; i++) {
2102 if (!(data->have_temp & (1 << i)))
2104 if (src == data->temp_src[i]) {
2110 return sprintf(buf, "%d\n", sel);
2114 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2116 struct nct6775_data *data = nct6775_update_device(dev);
2117 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2118 int index = sattr->index;
2120 return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2124 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2125 const char *buf, size_t count)
2127 struct nct6775_data *data = nct6775_update_device(dev);
2128 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2129 int nr = sattr->index;
2133 err = kstrtoul(buf, 10, &val);
2136 if (val == 0 || val > NUM_TEMP)
2138 if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2141 mutex_lock(&data->update_lock);
2142 src = data->temp_src[val - 1];
2143 data->pwm_temp_sel[nr] = src;
2144 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2147 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2148 mutex_unlock(&data->update_lock);
2154 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2157 struct nct6775_data *data = nct6775_update_device(dev);
2158 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2159 int index = sattr->index;
2161 return show_pwm_temp_sel_common(data, buf,
2162 data->pwm_weight_temp_sel[index]);
2166 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2167 const char *buf, size_t count)
2169 struct nct6775_data *data = nct6775_update_device(dev);
2170 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2171 int nr = sattr->index;
2175 err = kstrtoul(buf, 10, &val);
2180 if (val && (!(data->have_temp & (1 << (val - 1))) ||
2181 !data->temp_src[val - 1]))
2184 mutex_lock(&data->update_lock);
2186 src = data->temp_src[val - 1];
2187 data->pwm_weight_temp_sel[nr] = src;
2188 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2190 reg |= (src | 0x80);
2191 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2193 data->pwm_weight_temp_sel[nr] = 0;
2194 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2196 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2198 mutex_unlock(&data->update_lock);
2204 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2206 struct nct6775_data *data = nct6775_update_device(dev);
2207 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2209 return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2213 store_target_temp(struct device *dev, struct device_attribute *attr,
2214 const char *buf, size_t count)
2216 struct nct6775_data *data = dev_get_drvdata(dev);
2217 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2218 int nr = sattr->index;
2222 err = kstrtoul(buf, 10, &val);
2226 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2227 data->target_temp_mask);
2229 mutex_lock(&data->update_lock);
2230 data->target_temp[nr] = val;
2231 pwm_update_registers(data, nr);
2232 mutex_unlock(&data->update_lock);
2237 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2239 struct nct6775_data *data = nct6775_update_device(dev);
2240 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2241 int nr = sattr->index;
2243 return sprintf(buf, "%d\n",
2244 fan_from_reg16(data->target_speed[nr],
2245 data->fan_div[nr]));
2249 store_target_speed(struct device *dev, struct device_attribute *attr,
2250 const char *buf, size_t count)
2252 struct nct6775_data *data = dev_get_drvdata(dev);
2253 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2254 int nr = sattr->index;
2259 err = kstrtoul(buf, 10, &val);
2263 val = clamp_val(val, 0, 1350000U);
2264 speed = fan_to_reg(val, data->fan_div[nr]);
2266 mutex_lock(&data->update_lock);
2267 data->target_speed[nr] = speed;
2268 pwm_update_registers(data, nr);
2269 mutex_unlock(&data->update_lock);
2274 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2277 struct nct6775_data *data = nct6775_update_device(dev);
2278 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2280 int index = sattr->index;
2282 return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2286 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2287 const char *buf, size_t count)
2289 struct nct6775_data *data = dev_get_drvdata(dev);
2290 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2292 int index = sattr->index;
2296 err = kstrtoul(buf, 10, &val);
2300 /* Limit tolerance as needed */
2301 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2303 mutex_lock(&data->update_lock);
2304 data->temp_tolerance[index][nr] = val;
2306 pwm_update_registers(data, nr);
2308 nct6775_write_value(data,
2309 data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2311 mutex_unlock(&data->update_lock);
2316 * Fan speed tolerance is a tricky beast, since the associated register is
2317 * a tick counter, but the value is reported and configured as rpm.
2318 * Compute resulting low and high rpm values and report the difference.
2321 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2324 struct nct6775_data *data = nct6775_update_device(dev);
2325 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2326 int nr = sattr->index;
2327 int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2328 int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2338 tolerance = (fan_from_reg16(low, data->fan_div[nr])
2339 - fan_from_reg16(high, data->fan_div[nr])) / 2;
2341 return sprintf(buf, "%d\n", tolerance);
2345 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2346 const char *buf, size_t count)
2348 struct nct6775_data *data = dev_get_drvdata(dev);
2349 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2350 int nr = sattr->index;
2355 err = kstrtoul(buf, 10, &val);
2359 high = fan_from_reg16(data->target_speed[nr],
2360 data->fan_div[nr]) + val;
2361 low = fan_from_reg16(data->target_speed[nr],
2362 data->fan_div[nr]) - val;
2368 val = (fan_to_reg(low, data->fan_div[nr]) -
2369 fan_to_reg(high, data->fan_div[nr])) / 2;
2371 /* Limit tolerance as needed */
2372 val = clamp_val(val, 0, data->speed_tolerance_limit);
2374 mutex_lock(&data->update_lock);
2375 data->target_speed_tolerance[nr] = val;
2376 pwm_update_registers(data, nr);
2377 mutex_unlock(&data->update_lock);
2381 SENSOR_TEMPLATE_2(pwm, pwm%d, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2382 SENSOR_TEMPLATE(pwm_mode, pwm%d_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2384 SENSOR_TEMPLATE(pwm_enable, pwm%d_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2385 store_pwm_enable, 0);
2386 SENSOR_TEMPLATE(pwm_temp_sel, pwm%d_temp_sel, S_IWUSR | S_IRUGO,
2387 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2388 SENSOR_TEMPLATE(pwm_target_temp, pwm%d_target_temp, S_IWUSR | S_IRUGO,
2389 show_target_temp, store_target_temp, 0);
2390 SENSOR_TEMPLATE(fan_target, fan%d_target, S_IWUSR | S_IRUGO, show_target_speed,
2391 store_target_speed, 0);
2392 SENSOR_TEMPLATE(fan_tolerance, fan%d_tolerance, S_IWUSR | S_IRUGO,
2393 show_speed_tolerance, store_speed_tolerance, 0);
2395 /* Smart Fan registers */
2398 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2400 struct nct6775_data *data = nct6775_update_device(dev);
2401 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2403 int index = sattr->index;
2405 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2409 store_weight_temp(struct device *dev, struct device_attribute *attr,
2410 const char *buf, size_t count)
2412 struct nct6775_data *data = dev_get_drvdata(dev);
2413 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2415 int index = sattr->index;
2419 err = kstrtoul(buf, 10, &val);
2423 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2425 mutex_lock(&data->update_lock);
2426 data->weight_temp[index][nr] = val;
2427 nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2428 mutex_unlock(&data->update_lock);
2432 SENSOR_TEMPLATE(pwm_weight_temp_sel, pwm%d_weight_temp_sel, S_IWUSR | S_IRUGO,
2433 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2434 SENSOR_TEMPLATE_2(pwm_weight_temp_step, pwm%d_weight_temp_step,
2435 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2436 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, pwm%d_weight_temp_step_tol,
2437 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2438 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, pwm%d_weight_temp_step_base,
2439 S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2440 SENSOR_TEMPLATE_2(pwm_weight_duty_step, pwm%d_weight_duty_step,
2441 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2442 SENSOR_TEMPLATE_2(pwm_weight_duty_base, pwm%d_weight_duty_base,
2443 S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2446 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2448 struct nct6775_data *data = nct6775_update_device(dev);
2449 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2451 int index = sattr->index;
2453 return sprintf(buf, "%d\n",
2454 step_time_from_reg(data->fan_time[index][nr],
2455 data->pwm_mode[nr]));
2459 store_fan_time(struct device *dev, struct device_attribute *attr,
2460 const char *buf, size_t count)
2462 struct nct6775_data *data = dev_get_drvdata(dev);
2463 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2465 int index = sattr->index;
2469 err = kstrtoul(buf, 10, &val);
2473 val = step_time_to_reg(val, data->pwm_mode[nr]);
2474 mutex_lock(&data->update_lock);
2475 data->fan_time[index][nr] = val;
2476 nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2477 mutex_unlock(&data->update_lock);
2482 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2484 struct nct6775_data *data = dev_get_drvdata(dev);
2486 return sprintf(buf, "%s\n", data->name);
2489 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2492 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2494 struct nct6775_data *data = nct6775_update_device(dev);
2495 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2497 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2501 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2502 const char *buf, size_t count)
2504 struct nct6775_data *data = dev_get_drvdata(dev);
2505 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2507 int point = sattr->index;
2512 err = kstrtoul(buf, 10, &val);
2518 if (point == data->auto_pwm_num) {
2519 if (data->kind != nct6775 && !val)
2521 if (data->kind != nct6779 && val)
2525 mutex_lock(&data->update_lock);
2526 data->auto_pwm[nr][point] = val;
2527 if (point < data->auto_pwm_num) {
2528 nct6775_write_value(data,
2529 NCT6775_AUTO_PWM(data, nr, point),
2530 data->auto_pwm[nr][point]);
2532 switch (data->kind) {
2534 /* disable if needed (pwm == 0) */
2535 reg = nct6775_read_value(data,
2536 NCT6775_REG_CRITICAL_ENAB[nr]);
2541 nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2545 break; /* always enabled, nothing to do */
2548 nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2550 reg = nct6775_read_value(data,
2551 data->REG_CRITICAL_PWM_ENABLE[nr]);
2553 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2555 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2556 nct6775_write_value(data,
2557 data->REG_CRITICAL_PWM_ENABLE[nr],
2562 mutex_unlock(&data->update_lock);
2567 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2569 struct nct6775_data *data = nct6775_update_device(dev);
2570 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2572 int point = sattr->index;
2575 * We don't know for sure if the temperature is signed or unsigned.
2576 * Assume it is unsigned.
2578 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2582 store_auto_temp(struct device *dev, struct device_attribute *attr,
2583 const char *buf, size_t count)
2585 struct nct6775_data *data = dev_get_drvdata(dev);
2586 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2588 int point = sattr->index;
2592 err = kstrtoul(buf, 10, &val);
2598 mutex_lock(&data->update_lock);
2599 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2600 if (point < data->auto_pwm_num) {
2601 nct6775_write_value(data,
2602 NCT6775_AUTO_TEMP(data, nr, point),
2603 data->auto_temp[nr][point]);
2605 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2606 data->auto_temp[nr][point]);
2608 mutex_unlock(&data->update_lock);
2612 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2613 struct attribute *attr, int index)
2615 struct device *dev = container_of(kobj, struct device, kobj);
2616 struct nct6775_data *data = dev_get_drvdata(dev);
2617 int pwm = index / 36; /* pwm index */
2618 int nr = index % 36; /* attribute index */
2620 if (!(data->has_pwm & (1 << pwm)))
2623 if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2625 if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2627 if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2630 if (nr >= 22 && nr <= 35) { /* auto point */
2631 int api = (nr - 22) / 2; /* auto point index */
2633 if (api > data->auto_pwm_num)
2639 SENSOR_TEMPLATE_2(pwm_stop_time, pwm%d_stop_time, S_IWUSR | S_IRUGO,
2640 show_fan_time, store_fan_time, 0, 0);
2641 SENSOR_TEMPLATE_2(pwm_step_up_time, pwm%d_step_up_time, S_IWUSR | S_IRUGO,
2642 show_fan_time, store_fan_time, 0, 1);
2643 SENSOR_TEMPLATE_2(pwm_step_down_time, pwm%d_step_down_time, S_IWUSR | S_IRUGO,
2644 show_fan_time, store_fan_time, 0, 2);
2645 SENSOR_TEMPLATE_2(pwm_start, pwm%d_start, S_IWUSR | S_IRUGO, show_pwm,
2647 SENSOR_TEMPLATE_2(pwm_floor, pwm%d_floor, S_IWUSR | S_IRUGO, show_pwm,
2649 SENSOR_TEMPLATE_2(pwm_temp_tolerance, pwm%d_temp_tolerance, S_IWUSR | S_IRUGO,
2650 show_temp_tolerance, store_temp_tolerance, 0, 0);
2651 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, pwm%d_crit_temp_tolerance,
2652 S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2655 SENSOR_TEMPLATE_2(pwm_max, pwm%d_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2658 SENSOR_TEMPLATE_2(pwm_step, pwm%d_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2661 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, pwm%d_auto_point1_pwm, S_IWUSR | S_IRUGO,
2662 show_auto_pwm, store_auto_pwm, 0, 0);
2663 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, pwm%d_auto_point1_temp,
2664 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2666 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, pwm%d_auto_point2_pwm, S_IWUSR | S_IRUGO,
2667 show_auto_pwm, store_auto_pwm, 0, 1);
2668 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, pwm%d_auto_point2_temp,
2669 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2671 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, pwm%d_auto_point3_pwm, S_IWUSR | S_IRUGO,
2672 show_auto_pwm, store_auto_pwm, 0, 2);
2673 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, pwm%d_auto_point3_temp,
2674 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2676 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, pwm%d_auto_point4_pwm, S_IWUSR | S_IRUGO,
2677 show_auto_pwm, store_auto_pwm, 0, 3);
2678 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, pwm%d_auto_point4_temp,
2679 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
2681 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, pwm%d_auto_point5_pwm, S_IWUSR | S_IRUGO,
2682 show_auto_pwm, store_auto_pwm, 0, 4);
2683 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, pwm%d_auto_point5_temp,
2684 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
2686 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, pwm%d_auto_point6_pwm, S_IWUSR | S_IRUGO,
2687 show_auto_pwm, store_auto_pwm, 0, 5);
2688 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, pwm%d_auto_point6_temp,
2689 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
2691 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, pwm%d_auto_point7_pwm, S_IWUSR | S_IRUGO,
2692 show_auto_pwm, store_auto_pwm, 0, 6);
2693 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, pwm%d_auto_point7_temp,
2694 S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
2697 * nct6775_pwm_is_visible uses the index into the following array
2698 * to determine if attributes should be created or not.
2699 * Any change in order or content must be matched.
2701 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
2702 &sensor_dev_template_pwm,
2703 &sensor_dev_template_pwm_mode,
2704 &sensor_dev_template_pwm_enable,
2705 &sensor_dev_template_pwm_temp_sel,
2706 &sensor_dev_template_pwm_temp_tolerance,
2707 &sensor_dev_template_pwm_crit_temp_tolerance,
2708 &sensor_dev_template_pwm_target_temp,
2709 &sensor_dev_template_fan_target,
2710 &sensor_dev_template_fan_tolerance,
2711 &sensor_dev_template_pwm_stop_time,
2712 &sensor_dev_template_pwm_step_up_time,
2713 &sensor_dev_template_pwm_step_down_time,
2714 &sensor_dev_template_pwm_start,
2715 &sensor_dev_template_pwm_floor,
2716 &sensor_dev_template_pwm_weight_temp_sel,
2717 &sensor_dev_template_pwm_weight_temp_step,
2718 &sensor_dev_template_pwm_weight_temp_step_tol,
2719 &sensor_dev_template_pwm_weight_temp_step_base,
2720 &sensor_dev_template_pwm_weight_duty_step,
2721 &sensor_dev_template_pwm_max, /* 19 */
2722 &sensor_dev_template_pwm_step, /* 20 */
2723 &sensor_dev_template_pwm_weight_duty_base, /* 21 */
2724 &sensor_dev_template_pwm_auto_point1_pwm, /* 22 */
2725 &sensor_dev_template_pwm_auto_point1_temp,
2726 &sensor_dev_template_pwm_auto_point2_pwm,
2727 &sensor_dev_template_pwm_auto_point2_temp,
2728 &sensor_dev_template_pwm_auto_point3_pwm,
2729 &sensor_dev_template_pwm_auto_point3_temp,
2730 &sensor_dev_template_pwm_auto_point4_pwm,
2731 &sensor_dev_template_pwm_auto_point4_temp,
2732 &sensor_dev_template_pwm_auto_point5_pwm,
2733 &sensor_dev_template_pwm_auto_point5_temp,
2734 &sensor_dev_template_pwm_auto_point6_pwm,
2735 &sensor_dev_template_pwm_auto_point6_temp,
2736 &sensor_dev_template_pwm_auto_point7_pwm,
2737 &sensor_dev_template_pwm_auto_point7_temp, /* 35 */
2742 static struct sensor_template_group nct6775_pwm_template_group = {
2743 .templates = nct6775_attributes_pwm_template,
2744 .is_visible = nct6775_pwm_is_visible,
2749 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
2751 struct nct6775_data *data = dev_get_drvdata(dev);
2752 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
2755 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
2757 /* Case open detection */
2760 clear_caseopen(struct device *dev, struct device_attribute *attr,
2761 const char *buf, size_t count)
2763 struct nct6775_data *data = dev_get_drvdata(dev);
2764 struct nct6775_sio_data *sio_data = dev->platform_data;
2765 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
2770 if (kstrtoul(buf, 10, &val) || val != 0)
2773 mutex_lock(&data->update_lock);
2776 * Use CR registers to clear caseopen status.
2777 * The CR registers are the same for all chips, and not all chips
2778 * support clearing the caseopen status through "regular" registers.
2780 ret = superio_enter(sio_data->sioreg);
2786 superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
2787 reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
2788 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
2789 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
2790 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
2791 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
2792 superio_exit(sio_data->sioreg);
2794 data->valid = false; /* Force cache refresh */
2796 mutex_unlock(&data->update_lock);
2800 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
2801 clear_caseopen, INTRUSION_ALARM_BASE);
2802 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
2803 clear_caseopen, INTRUSION_ALARM_BASE + 1);
2805 static umode_t nct6775_other_is_visible(struct kobject *kobj,
2806 struct attribute *attr, int index)
2808 struct device *dev = container_of(kobj, struct device, kobj);
2809 struct nct6775_data *data = dev_get_drvdata(dev);
2811 if (index == 1 && !data->have_vid)
2814 if (index == 2 || index == 3) {
2815 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 2] < 0)
2823 * nct6775_other_is_visible uses the index into the following array
2824 * to determine if attributes should be created or not.
2825 * Any change in order or content must be matched.
2827 static struct attribute *nct6775_attributes_other[] = {
2828 &dev_attr_name.attr,
2829 &dev_attr_cpu0_vid.attr, /* 1 */
2830 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr, /* 2 */
2831 &sensor_dev_attr_intrusion1_alarm.dev_attr.attr, /* 3 */
2836 static const struct attribute_group nct6775_group_other = {
2837 .attrs = nct6775_attributes_other,
2838 .is_visible = nct6775_other_is_visible,
2842 * Driver and device management
2845 static void nct6775_device_remove_files(struct device *dev)
2847 struct nct6775_data *data = dev_get_drvdata(dev);
2849 if (data->group_pwm)
2850 sysfs_remove_group(&dev->kobj, data->group_pwm);
2852 sysfs_remove_group(&dev->kobj, data->group_in);
2853 if (data->group_fan)
2854 sysfs_remove_group(&dev->kobj, data->group_fan);
2855 if (data->group_temp)
2856 sysfs_remove_group(&dev->kobj, data->group_temp);
2858 sysfs_remove_group(&dev->kobj, &nct6775_group_other);
2861 /* Get the monitoring functions started */
2862 static inline void nct6775_init_device(struct nct6775_data *data)
2867 /* Start monitoring if needed */
2868 if (data->REG_CONFIG) {
2869 tmp = nct6775_read_value(data, data->REG_CONFIG);
2871 nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
2874 /* Enable temperature sensors if needed */
2875 for (i = 0; i < NUM_TEMP; i++) {
2876 if (!(data->have_temp & (1 << i)))
2878 if (!data->reg_temp_config[i])
2880 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
2882 nct6775_write_value(data, data->reg_temp_config[i],
2886 /* Enable VBAT monitoring if needed */
2887 tmp = nct6775_read_value(data, data->REG_VBAT);
2889 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
2891 diode = nct6775_read_value(data, data->REG_DIODE);
2893 for (i = 0; i < data->temp_fixed_num; i++) {
2894 if (!(data->have_temp_fixed & (1 << i)))
2896 if ((tmp & (data->DIODE_MASK << i))) /* diode */
2898 = 3 - ((diode >> i) & data->DIODE_MASK);
2899 else /* thermistor */
2900 data->temp_type[i] = 4;
2905 nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
2906 struct nct6775_data *data)
2909 bool fan3pin, fan3min, fan4pin, fan4min, fan5pin;
2910 bool pwm3pin, pwm4pin, pwm5pin;
2912 /* fan4 and fan5 share some pins with the GPIO and serial flash */
2913 if (data->kind == nct6775) {
2914 regval = superio_inb(sio_data->sioreg, 0x2c);
2916 fan3pin = regval & (1 << 6);
2918 pwm3pin = regval & (1 << 7);
2920 /* On NCT6775, fan4 shares pins with the fdc interface */
2921 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
2926 } else if (data->kind == nct6776) {
2927 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
2929 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
2930 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
2935 fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
2940 fan4pin = superio_inb(sio_data->sioreg, 0x1C) & 0x01;
2945 fan5pin = superio_inb(sio_data->sioreg, 0x1C) & 0x02;
2952 } else if (data->kind == nct6106) {
2953 regval = superio_inb(sio_data->sioreg, 0x24);
2954 fan3pin = !(regval & 0x80);
2955 pwm3pin = regval & 0x08;
2963 } else { /* NCT6779D */
2964 regval = superio_inb(sio_data->sioreg, 0x1c);
2966 fan3pin = !(regval & (1 << 5));
2967 fan4pin = !(regval & (1 << 6));
2968 fan5pin = !(regval & (1 << 7));
2970 pwm3pin = !(regval & (1 << 0));
2971 pwm4pin = !(regval & (1 << 1));
2972 pwm5pin = !(regval & (1 << 2));
2978 data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
2979 data->has_fan |= fan3pin << 2;
2980 data->has_fan_min |= fan3min << 2;
2982 data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
2983 data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
2985 data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) | (pwm5pin << 4);
2988 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
2989 int *available, int *mask)
2994 for (i = 0; i < data->pwm_num && *available; i++) {
2999 src = nct6775_read_value(data, regp[i]);
3001 if (!src || (*mask & (1 << src)))
3003 if (src >= data->temp_label_num ||
3004 !strlen(data->temp_label[src]))
3007 index = __ffs(*available);
3008 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3009 *available &= ~(1 << index);
3014 static int nct6775_probe(struct platform_device *pdev)
3016 struct device *dev = &pdev->dev;
3017 struct nct6775_sio_data *sio_data = dev->platform_data;
3018 struct nct6775_data *data;
3019 struct resource *res;
3021 int src, mask, available;
3022 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3023 const u16 *reg_temp_alternate, *reg_temp_crit;
3024 const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3027 struct attribute_group *group;
3029 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3030 if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3034 data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3039 data->kind = sio_data->kind;
3040 data->addr = res->start;
3041 mutex_init(&data->update_lock);
3042 data->name = nct6775_device_names[data->kind];
3043 data->bank = 0xff; /* Force initial bank selection */
3044 platform_set_drvdata(pdev, data);
3046 switch (data->kind) {
3050 data->auto_pwm_num = 4;
3051 data->temp_fixed_num = 3;
3053 data->fan_from_reg = fan_from_reg13;
3054 data->fan_from_reg_min = fan_from_reg13;
3056 data->temp_label = nct6776_temp_label;
3057 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3059 data->REG_VBAT = NCT6106_REG_VBAT;
3060 data->REG_DIODE = NCT6106_REG_DIODE;
3061 data->DIODE_MASK = NCT6106_DIODE_MASK;
3062 data->REG_VIN = NCT6106_REG_IN;
3063 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3064 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3065 data->REG_TARGET = NCT6106_REG_TARGET;
3066 data->REG_FAN = NCT6106_REG_FAN;
3067 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3068 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3069 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3070 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3071 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3072 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3073 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3074 data->REG_PWM[0] = NCT6106_REG_PWM;
3075 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3076 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3077 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3078 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3079 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3080 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3081 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3082 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3083 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3084 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3085 data->REG_CRITICAL_TEMP_TOLERANCE
3086 = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3087 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3088 data->CRITICAL_PWM_ENABLE_MASK
3089 = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3090 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3091 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3092 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3093 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3094 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3095 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3096 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3097 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3098 data->REG_ALARM = NCT6106_REG_ALARM;
3099 data->ALARM_BITS = NCT6106_ALARM_BITS;
3101 reg_temp = NCT6106_REG_TEMP;
3102 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3103 reg_temp_over = NCT6106_REG_TEMP_OVER;
3104 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3105 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3106 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3107 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3108 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3109 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3115 data->auto_pwm_num = 6;
3116 data->has_fan_div = true;
3117 data->temp_fixed_num = 3;
3119 data->ALARM_BITS = NCT6775_ALARM_BITS;
3121 data->fan_from_reg = fan_from_reg16;
3122 data->fan_from_reg_min = fan_from_reg8;
3123 data->target_temp_mask = 0x7f;
3124 data->tolerance_mask = 0x0f;
3125 data->speed_tolerance_limit = 15;
3127 data->temp_label = nct6775_temp_label;
3128 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3130 data->REG_CONFIG = NCT6775_REG_CONFIG;
3131 data->REG_VBAT = NCT6775_REG_VBAT;
3132 data->REG_DIODE = NCT6775_REG_DIODE;
3133 data->DIODE_MASK = NCT6775_DIODE_MASK;
3134 data->REG_VIN = NCT6775_REG_IN;
3135 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3136 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3137 data->REG_TARGET = NCT6775_REG_TARGET;
3138 data->REG_FAN = NCT6775_REG_FAN;
3139 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3140 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3141 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3142 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3143 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3144 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3145 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3146 data->REG_PWM[0] = NCT6775_REG_PWM;
3147 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3148 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3149 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3150 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3151 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3152 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3153 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3154 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3155 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3156 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3157 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3158 data->REG_CRITICAL_TEMP_TOLERANCE
3159 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3160 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3161 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3162 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3163 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3164 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3165 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3166 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3167 data->REG_ALARM = NCT6775_REG_ALARM;
3169 reg_temp = NCT6775_REG_TEMP;
3170 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3171 reg_temp_over = NCT6775_REG_TEMP_OVER;
3172 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3173 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3174 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3175 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3181 data->auto_pwm_num = 4;
3182 data->has_fan_div = false;
3183 data->temp_fixed_num = 3;
3185 data->ALARM_BITS = NCT6776_ALARM_BITS;
3187 data->fan_from_reg = fan_from_reg13;
3188 data->fan_from_reg_min = fan_from_reg13;
3189 data->target_temp_mask = 0xff;
3190 data->tolerance_mask = 0x07;
3191 data->speed_tolerance_limit = 63;
3193 data->temp_label = nct6776_temp_label;
3194 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3196 data->REG_CONFIG = NCT6775_REG_CONFIG;
3197 data->REG_VBAT = NCT6775_REG_VBAT;
3198 data->REG_DIODE = NCT6775_REG_DIODE;
3199 data->DIODE_MASK = NCT6775_DIODE_MASK;
3200 data->REG_VIN = NCT6775_REG_IN;
3201 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3202 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3203 data->REG_TARGET = NCT6775_REG_TARGET;
3204 data->REG_FAN = NCT6775_REG_FAN;
3205 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3206 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3207 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3208 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3209 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3210 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3211 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3212 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3213 data->REG_PWM[0] = NCT6775_REG_PWM;
3214 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3215 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3216 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3217 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3218 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3219 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3220 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3221 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3222 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3223 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3224 data->REG_CRITICAL_TEMP_TOLERANCE
3225 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3226 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3227 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3228 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3229 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3230 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3231 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3232 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3233 data->REG_ALARM = NCT6775_REG_ALARM;
3235 reg_temp = NCT6775_REG_TEMP;
3236 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3237 reg_temp_over = NCT6775_REG_TEMP_OVER;
3238 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3239 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3240 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3241 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3247 data->auto_pwm_num = 4;
3248 data->has_fan_div = false;
3249 data->temp_fixed_num = 6;
3251 data->ALARM_BITS = NCT6779_ALARM_BITS;
3253 data->fan_from_reg = fan_from_reg13;
3254 data->fan_from_reg_min = fan_from_reg13;
3255 data->target_temp_mask = 0xff;
3256 data->tolerance_mask = 0x07;
3257 data->speed_tolerance_limit = 63;
3259 data->temp_label = nct6779_temp_label;
3260 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3262 data->REG_CONFIG = NCT6775_REG_CONFIG;
3263 data->REG_VBAT = NCT6775_REG_VBAT;
3264 data->REG_DIODE = NCT6775_REG_DIODE;
3265 data->DIODE_MASK = NCT6775_DIODE_MASK;
3266 data->REG_VIN = NCT6779_REG_IN;
3267 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3268 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3269 data->REG_TARGET = NCT6775_REG_TARGET;
3270 data->REG_FAN = NCT6779_REG_FAN;
3271 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3272 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3273 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3274 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3275 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3276 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3277 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3278 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3279 data->REG_PWM[0] = NCT6775_REG_PWM;
3280 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3281 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3282 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3283 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3284 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3285 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3286 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3287 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3288 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3289 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3290 data->REG_CRITICAL_TEMP_TOLERANCE
3291 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3292 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3293 data->CRITICAL_PWM_ENABLE_MASK
3294 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3295 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3296 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3297 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3298 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3299 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3300 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3301 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3302 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3303 data->REG_ALARM = NCT6779_REG_ALARM;
3305 reg_temp = NCT6779_REG_TEMP;
3306 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3307 reg_temp_over = NCT6779_REG_TEMP_OVER;
3308 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3309 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3310 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3311 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3317 data->have_in = (1 << data->in_num) - 1;
3318 data->have_temp = 0;
3321 * On some boards, not all available temperature sources are monitored,
3322 * even though some of the monitoring registers are unused.
3323 * Get list of unused monitoring registers, then detect if any fan
3324 * controls are configured to use unmonitored temperature sources.
3325 * If so, assign the unmonitored temperature sources to available
3326 * monitoring registers.
3330 for (i = 0; i < num_reg_temp; i++) {
3331 if (reg_temp[i] == 0)
3334 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3335 if (!src || (mask & (1 << src)))
3336 available |= 1 << i;
3342 * Now find unmonitored temperature registers and enable monitoring
3343 * if additional monitoring registers are available.
3345 add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3346 add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3349 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
3350 for (i = 0; i < num_reg_temp; i++) {
3351 if (reg_temp[i] == 0)
3354 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3355 if (!src || (mask & (1 << src)))
3358 if (src >= data->temp_label_num ||
3359 !strlen(data->temp_label[src])) {
3361 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3362 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3368 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3369 if (src <= data->temp_fixed_num) {
3370 data->have_temp |= 1 << (src - 1);
3371 data->have_temp_fixed |= 1 << (src - 1);
3372 data->reg_temp[0][src - 1] = reg_temp[i];
3373 data->reg_temp[1][src - 1] = reg_temp_over[i];
3374 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3375 if (reg_temp_crit_h && reg_temp_crit_h[i])
3376 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3377 else if (reg_temp_crit[src - 1])
3378 data->reg_temp[3][src - 1]
3379 = reg_temp_crit[src - 1];
3380 if (reg_temp_crit_l && reg_temp_crit_l[i])
3381 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3382 data->reg_temp_config[src - 1] = reg_temp_config[i];
3383 data->temp_src[src - 1] = src;
3390 /* Use dynamic index for other sources */
3391 data->have_temp |= 1 << s;
3392 data->reg_temp[0][s] = reg_temp[i];
3393 data->reg_temp[1][s] = reg_temp_over[i];
3394 data->reg_temp[2][s] = reg_temp_hyst[i];
3395 data->reg_temp_config[s] = reg_temp_config[i];
3396 if (reg_temp_crit_h && reg_temp_crit_h[i])
3397 data->reg_temp[3][s] = reg_temp_crit_h[i];
3398 else if (reg_temp_crit[src - 1])
3399 data->reg_temp[3][s] = reg_temp_crit[src - 1];
3400 if (reg_temp_crit_l && reg_temp_crit_l[i])
3401 data->reg_temp[4][s] = reg_temp_crit_l[i];
3403 data->temp_src[s] = src;
3407 #ifdef USE_ALTERNATE
3409 * Go through the list of alternate temp registers and enable
3411 * The temperature is already monitored if the respective bit in <mask>
3414 for (i = 0; i < data->temp_label_num - 1; i++) {
3415 if (!reg_temp_alternate[i])
3417 if (mask & (1 << (i + 1)))
3419 if (i < data->temp_fixed_num) {
3420 if (data->have_temp & (1 << i))
3422 data->have_temp |= 1 << i;
3423 data->have_temp_fixed |= 1 << i;
3424 data->reg_temp[0][i] = reg_temp_alternate[i];
3425 data->reg_temp[1][i] = reg_temp_over[i];
3426 data->reg_temp[2][i] = reg_temp_hyst[i];
3427 data->temp_src[i] = i + 1;
3431 if (s >= NUM_TEMP) /* Abort if no more space */
3434 data->have_temp |= 1 << s;
3435 data->reg_temp[0][s] = reg_temp_alternate[i];
3436 data->temp_src[s] = i + 1;
3439 #endif /* USE_ALTERNATE */
3441 /* Initialize the chip */
3442 nct6775_init_device(data);
3444 err = superio_enter(sio_data->sioreg);
3448 cr2a = superio_inb(sio_data->sioreg, 0x2a);
3449 switch (data->kind) {
3451 data->have_vid = (cr2a & 0x40);
3454 data->have_vid = (cr2a & 0x60) == 0x40;
3463 * We can get the VID input values directly at logical device D 0xe3.
3465 if (data->have_vid) {
3466 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3467 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3468 data->vrm = vid_which_vrm();
3474 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3475 tmp = superio_inb(sio_data->sioreg,
3476 NCT6775_REG_CR_FAN_DEBOUNCE);
3477 switch (data->kind) {
3489 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3491 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3495 nct6775_check_fan_inputs(sio_data, data);
3497 superio_exit(sio_data->sioreg);
3499 /* Read fan clock dividers immediately */
3500 nct6775_init_fan_common(dev, data);
3502 /* Register sysfs hooks */
3503 group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
3505 if (IS_ERR(group)) {
3506 err = PTR_ERR(group);
3509 data->group_pwm = group;
3511 group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
3512 fls(data->have_in));
3513 if (IS_ERR(group)) {
3514 err = PTR_ERR(group);
3517 data->group_in = group;
3519 group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
3520 fls(data->has_fan));
3521 if (IS_ERR(group)) {
3522 err = PTR_ERR(group);
3525 data->group_fan = group;
3527 group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
3528 fls(data->have_temp));
3529 if (IS_ERR(group)) {
3530 err = PTR_ERR(group);
3533 data->group_temp = group;
3535 err = sysfs_create_group(&dev->kobj, &nct6775_group_other);
3539 data->hwmon_dev = hwmon_device_register(dev);
3540 if (IS_ERR(data->hwmon_dev)) {
3541 err = PTR_ERR(data->hwmon_dev);
3548 nct6775_device_remove_files(dev);
3552 static int nct6775_remove(struct platform_device *pdev)
3554 struct nct6775_data *data = platform_get_drvdata(pdev);
3556 hwmon_device_unregister(data->hwmon_dev);
3557 nct6775_device_remove_files(&pdev->dev);
3563 static int nct6775_suspend(struct device *dev)
3565 struct nct6775_data *data = nct6775_update_device(dev);
3566 struct nct6775_sio_data *sio_data = dev->platform_data;
3568 mutex_lock(&data->update_lock);
3569 data->vbat = nct6775_read_value(data, data->REG_VBAT);
3570 if (sio_data->kind == nct6775) {
3571 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
3572 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
3574 mutex_unlock(&data->update_lock);
3579 static int nct6775_resume(struct device *dev)
3581 struct nct6775_data *data = dev_get_drvdata(dev);
3582 struct nct6775_sio_data *sio_data = dev->platform_data;
3585 mutex_lock(&data->update_lock);
3586 data->bank = 0xff; /* Force initial bank selection */
3588 /* Restore limits */
3589 for (i = 0; i < data->in_num; i++) {
3590 if (!(data->have_in & (1 << i)))
3593 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
3595 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
3599 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
3600 if (!(data->has_fan_min & (1 << i)))
3603 nct6775_write_value(data, data->REG_FAN_MIN[i],
3607 for (i = 0; i < NUM_TEMP; i++) {
3608 if (!(data->have_temp & (1 << i)))
3611 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
3612 if (data->reg_temp[j][i])
3613 nct6775_write_temp(data, data->reg_temp[j][i],
3617 /* Restore other settings */
3618 nct6775_write_value(data, data->REG_VBAT, data->vbat);
3619 if (sio_data->kind == nct6775) {
3620 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
3621 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
3624 /* Force re-reading all values */
3625 data->valid = false;
3626 mutex_unlock(&data->update_lock);
3631 static const struct dev_pm_ops nct6775_dev_pm_ops = {
3632 .suspend = nct6775_suspend,
3633 .resume = nct6775_resume,
3636 #define NCT6775_DEV_PM_OPS (&nct6775_dev_pm_ops)
3638 #define NCT6775_DEV_PM_OPS NULL
3639 #endif /* CONFIG_PM */
3641 static struct platform_driver nct6775_driver = {
3643 .owner = THIS_MODULE,
3645 .pm = NCT6775_DEV_PM_OPS,
3647 .probe = nct6775_probe,
3648 .remove = nct6775_remove,
3651 static const char *nct6775_sio_names[] __initconst = {
3658 /* nct6775_find() looks for a '627 in the Super-I/O config space */
3659 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
3665 err = superio_enter(sioaddr);
3672 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
3673 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
3674 switch (val & SIO_ID_MASK) {
3675 case SIO_NCT6106_ID:
3676 sio_data->kind = nct6106;
3678 case SIO_NCT6775_ID:
3679 sio_data->kind = nct6775;
3681 case SIO_NCT6776_ID:
3682 sio_data->kind = nct6776;
3684 case SIO_NCT6779_ID:
3685 sio_data->kind = nct6779;
3689 pr_debug("unsupported chip ID: 0x%04x\n", val);
3690 superio_exit(sioaddr);
3694 /* We have a known chip, find the HWM I/O address */
3695 superio_select(sioaddr, NCT6775_LD_HWM);
3696 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
3697 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
3698 addr = val & IOREGION_ALIGNMENT;
3700 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
3701 superio_exit(sioaddr);
3705 /* Activate logical device if needed */
3706 val = superio_inb(sioaddr, SIO_REG_ENABLE);
3707 if (!(val & 0x01)) {
3708 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
3709 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
3712 superio_exit(sioaddr);
3713 pr_info("Found %s or compatible chip at %#x:%#x\n",
3714 nct6775_sio_names[sio_data->kind], sioaddr, addr);
3715 sio_data->sioreg = sioaddr;
3721 * when Super-I/O functions move to a separate file, the Super-I/O
3722 * bus will manage the lifetime of the device and this module will only keep
3723 * track of the nct6775 driver. But since we platform_device_alloc(), we
3724 * must keep track of the device
3726 static struct platform_device *pdev[2];
3728 static int __init sensors_nct6775_init(void)
3733 struct resource res;
3734 struct nct6775_sio_data sio_data;
3735 int sioaddr[2] = { 0x2e, 0x4e };
3737 err = platform_driver_register(&nct6775_driver);
3742 * initialize sio_data->kind and sio_data->sioreg.
3744 * when Super-I/O functions move to a separate file, the Super-I/O
3745 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
3746 * nct6775 hardware monitor, and call probe()
3748 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
3749 address = nct6775_find(sioaddr[i], &sio_data);
3755 pdev[i] = platform_device_alloc(DRVNAME, address);
3758 goto exit_device_put;
3761 err = platform_device_add_data(pdev[i], &sio_data,
3762 sizeof(struct nct6775_sio_data));
3764 goto exit_device_put;
3766 memset(&res, 0, sizeof(res));
3768 res.start = address + IOREGION_OFFSET;
3769 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
3770 res.flags = IORESOURCE_IO;
3772 err = acpi_check_resource_conflict(&res);
3774 platform_device_put(pdev[i]);
3779 err = platform_device_add_resources(pdev[i], &res, 1);
3781 goto exit_device_put;
3783 /* platform_device_add calls probe() */
3784 err = platform_device_add(pdev[i]);
3786 goto exit_device_put;
3790 goto exit_unregister;
3796 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
3798 platform_device_put(pdev[i]);
3801 platform_driver_unregister(&nct6775_driver);
3805 static void __exit sensors_nct6775_exit(void)
3809 for (i = 0; i < ARRAY_SIZE(pdev); i++) {
3811 platform_device_unregister(pdev[i]);
3813 platform_driver_unregister(&nct6775_driver);
3816 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
3817 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
3818 MODULE_LICENSE("GPL");
3820 module_init(sensors_nct6775_init);
3821 module_exit(sensors_nct6775_exit);