git.sur5r.net Git - groeck-nct6775/blob - nct6775.c

   1 /*
   2  * nct6775 - Driver for the hardware monitoring functionality of
   3  *             Nuvoton NCT677x Super-I/O chips
   4  *
   5  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
   6  *
   7  * Derived from w83627ehf driver
   8  * Copyright (C) 2005-2012  Jean Delvare <khali@linux-fr.org>
   9  * Copyright (C) 2006  Yuan Mu (Winbond),
  10  *                     Rudolf Marek <r.marek@assembler.cz>
  11  *                     David Hubbard <david.c.hubbard@gmail.com>
  12  *                     Daniel J Blueman <daniel.blueman@gmail.com>
  13  * Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  14  *
  15  * Shamelessly ripped from the w83627hf driver
  16  * Copyright (C) 2003  Mark Studebaker
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  *
  33  * Supports the following chips:
  34  *
  35  * Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  36  * nct6106d     9      3       3       6+3    0xc450 0xc1    0x5ca3
  37  * nct6775f     9      4       3       6+3    0xb470 0xc1    0x5ca3
  38  * nct6776f     9      5       3       6+3    0xc330 0xc1    0x5ca3
  39  * nct6779d    15      5       5       2+6    0xc560 0xc1    0x5ca3
  40  *
  41  * #temp lists the number of monitored temperature sources (first value) plus
  42  * the number of directly connectable temperature sensors (second value).
  43  */
  44
  45 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  46
  47 #include <linux/module.h>
  48 #include <linux/init.h>
  49 #include <linux/slab.h>
  50 #include <linux/jiffies.h>
  51 #include <linux/platform_device.h>
  52 #include <linux/hwmon.h>
  53 #include <linux/hwmon-sysfs.h>
  54 #include <linux/hwmon-vid.h>
  55 #include <linux/err.h>
  56 #include <linux/mutex.h>
  57 #include <linux/acpi.h>
  58 #include <linux/io.h>
  59 #include "lm75.h"
  60 #include "compat.h"
  61
  62 #define USE_ALTERNATE
  63
  64 enum kinds { nct6106, nct6775, nct6776, nct6779 };
  65
  66 /* used to set data->name = nct6775_device_names[data->sio_kind] */
  67 static const char * const nct6775_device_names[] = {
  68         "nct6106",
  69         "nct6775",
  70         "nct6776",
  71         "nct6779",
  72 };
  73
  74 static unsigned short force_id;
  75 module_param(force_id, ushort, 0);
  76 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  77
  78 static unsigned short fan_debounce;
  79 module_param(fan_debounce, ushort, 0);
  80 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
  81
  82 #define DRVNAME "nct6775"
  83
  84 /*
  85  * Super-I/O constants and functions
  86  */
  87
  88 #define NCT6775_LD_ACPI         0x0a
  89 #define NCT6775_LD_HWM          0x0b
  90 #define NCT6775_LD_VID          0x0d
  91
  92 #define SIO_REG_LDSEL           0x07    /* Logical device select */
  93 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
  94 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
  95 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
  96
  97 #define SIO_NCT6106_ID          0xc450
  98 #define SIO_NCT6775_ID          0xb470
  99 #define SIO_NCT6776_ID          0xc330
 100 #define SIO_NCT6779_ID          0xc560
 101 #define SIO_ID_MASK             0xFFF0
 102
 103 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
 104
 105 static inline void
 106 superio_outb(int ioreg, int reg, int val)
 107 {
 108         outb(reg, ioreg);
 109         outb(val, ioreg + 1);
 110 }
 111
 112 static inline int
 113 superio_inb(int ioreg, int reg)
 114 {
 115         outb(reg, ioreg);
 116         return inb(ioreg + 1);
 117 }
 118
 119 static inline void
 120 superio_select(int ioreg, int ld)
 121 {
 122         outb(SIO_REG_LDSEL, ioreg);
 123         outb(ld, ioreg + 1);
 124 }
 125
 126 static inline int
 127 superio_enter(int ioreg)
 128 {
 129         /*
 130          * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
 131          */
 132         if (!request_muxed_region(ioreg, 2, DRVNAME))
 133                 return -EBUSY;
 134
 135         outb(0x87, ioreg);
 136         outb(0x87, ioreg);
 137
 138         return 0;
 139 }
 140
 141 static inline void
 142 superio_exit(int ioreg)
 143 {
 144         outb(0xaa, ioreg);
 145         outb(0x02, ioreg);
 146         outb(0x02, ioreg + 1);
 147         release_region(ioreg, 2);
 148 }
 149
 150 /*
 151  * ISA constants
 152  */
 153
 154 #define IOREGION_ALIGNMENT      (~7)
 155 #define IOREGION_OFFSET         5
 156 #define IOREGION_LENGTH         2
 157 #define ADDR_REG_OFFSET         0
 158 #define DATA_REG_OFFSET         1
 159
 160 #define NCT6775_REG_BANK        0x4E
 161 #define NCT6775_REG_CONFIG      0x40
 162
 163 /*
 164  * Not currently used:
 165  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
 166  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
 167  * REG_MAN_ID is at port 0x4f
 168  * REG_CHIP_ID is at port 0x58
 169  */
 170
 171 #define NUM_TEMP        10      /* Max number of temp attribute sets w/ limits*/
 172 #define NUM_TEMP_FIXED  6       /* Max number of fixed temp attribute sets */
 173
 174 #define NUM_REG_ALARM   7       /* Max number of alarm registers */
 175
 176 /* Common and NCT6775 specific data */
 177
 178 /* Voltage min/max registers for nr=7..14 are in bank 5 */
 179
 180 static const u16 NCT6775_REG_IN_MAX[] = {
 181         0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
 182         0x55c, 0x55e, 0x560, 0x562 };
 183 static const u16 NCT6775_REG_IN_MIN[] = {
 184         0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
 185         0x55d, 0x55f, 0x561, 0x563 };
 186 static const u16 NCT6775_REG_IN[] = {
 187         0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
 188 };
 189
 190 #define NCT6775_REG_VBAT                0x5D
 191 #define NCT6775_REG_DIODE               0x5E
 192 #define NCT6775_DIODE_MASK              0x02
 193
 194 #define NCT6775_REG_FANDIV1             0x506
 195 #define NCT6775_REG_FANDIV2             0x507
 196
 197 #define NCT6775_REG_CR_FAN_DEBOUNCE     0xf0
 198
 199 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
 200
 201 /* 0..15 voltages, 16..23 fans, 24..31 temperatures */
 202
 203 static const s8 NCT6775_ALARM_BITS[] = {
 204         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 205         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 206         -1,                             /* unused */
 207         6, 7, 11, 10, 23,               /* fan1..fan5 */
 208         -1, -1, -1,                     /* unused */
 209         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 210         12, -1 };                       /* intrusion0, intrusion1 */
 211
 212 #define FAN_ALARM_BASE          16
 213 #define TEMP_ALARM_BASE         24
 214 #define INTRUSION_ALARM_BASE    30
 215
 216 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
 217 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
 218
 219 /* DC or PWM output fan configuration */
 220 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
 221 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
 222
 223 /* Advanced Fan control, some values are common for all fans */
 224
 225 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301, 0x801, 0x901 };
 226 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302, 0x802, 0x902 };
 227 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
 228         0x103, 0x203, 0x303, 0x803, 0x903 };
 229 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
 230         0x104, 0x204, 0x304, 0x804, 0x904 };
 231 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
 232         0x105, 0x205, 0x305, 0x805, 0x905 };
 233 static const u16 NCT6775_REG_FAN_START_OUTPUT[]
 234         = { 0x106, 0x206, 0x306, 0x806, 0x906 };
 235 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 236 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 237
 238 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
 239         0x107, 0x207, 0x307, 0x807, 0x907 };
 240 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309, 0x809, 0x909 };
 241 static const u16 NCT6775_REG_PWM_READ[] = { 0x01, 0x03, 0x11, 0x13, 0x15 };
 242
 243 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 244 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
 245 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
 246 static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0 };
 247
 248 static const u16 NCT6775_REG_TEMP[] = {
 249         0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
 250
 251 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 252         0, 0x152, 0x252, 0x628, 0x629, 0x62A };
 253 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 254         0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
 255 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 256         0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
 257
 258 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 259         0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
 260
 261 static const u16 NCT6775_REG_TEMP_SEL[] = {
 262         0x100, 0x200, 0x300, 0x800, 0x900 };
 263
 264 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
 265         0x139, 0x239, 0x339, 0x839, 0x939 };
 266 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
 267         0x13a, 0x23a, 0x33a, 0x83a, 0x93a };
 268 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
 269         0x13b, 0x23b, 0x33b, 0x83b, 0x93b };
 270 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
 271         0x13c, 0x23c, 0x33c, 0x83c, 0x93c };
 272 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
 273         0x13d, 0x23d, 0x33d, 0x83d, 0x93d };
 274
 275 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 276
 277 static const u16 NCT6775_REG_AUTO_TEMP[] = {
 278         0x121, 0x221, 0x321, 0x821, 0x921 };
 279 static const u16 NCT6775_REG_AUTO_PWM[] = {
 280         0x127, 0x227, 0x327, 0x827, 0x927 };
 281
 282 #define NCT6775_AUTO_TEMP(data, nr, p)  ((data)->REG_AUTO_TEMP[nr] + (p))
 283 #define NCT6775_AUTO_PWM(data, nr, p)   ((data)->REG_AUTO_PWM[nr] + (p))
 284
 285 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
 286
 287 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
 288         0x135, 0x235, 0x335, 0x835, 0x935 };
 289 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
 290         0x138, 0x238, 0x338, 0x838, 0x938 };
 291
 292 static const char *const nct6775_temp_label[] = {
 293         "",
 294         "SYSTIN",
 295         "CPUTIN",
 296         "AUXTIN",
 297         "AMD SB-TSI",
 298         "PECI Agent 0",
 299         "PECI Agent 1",
 300         "PECI Agent 2",
 301         "PECI Agent 3",
 302         "PECI Agent 4",
 303         "PECI Agent 5",
 304         "PECI Agent 6",
 305         "PECI Agent 7",
 306         "PCH_CHIP_CPU_MAX_TEMP",
 307         "PCH_CHIP_TEMP",
 308         "PCH_CPU_TEMP",
 309         "PCH_MCH_TEMP",
 310         "PCH_DIM0_TEMP",
 311         "PCH_DIM1_TEMP",
 312         "PCH_DIM2_TEMP",
 313         "PCH_DIM3_TEMP"
 314 };
 315
 316 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
 317         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
 318
 319 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
 320         = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
 321             0xa07 };
 322
 323 /* NCT6776 specific data */
 324
 325 static const s8 NCT6776_ALARM_BITS[] = {
 326         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 327         17, -1, -1, -1, -1, -1, -1,     /* in8..in14 */
 328         -1,                             /* unused */
 329         6, 7, 11, 10, 23,               /* fan1..fan5 */
 330         -1, -1, -1,                     /* unused */
 331         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 332         12, 9 };                        /* intrusion0, intrusion1 */
 333
 334 static const u16 NCT6776_REG_TOLERANCE_H[] = {
 335         0x10c, 0x20c, 0x30c, 0x80c, 0x90c };
 336
 337 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0 };
 338 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0 };
 339
 340 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
 341 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
 342
 343 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
 344         0x13e, 0x23e, 0x33e, 0x83e, 0x93e };
 345
 346 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
 347         0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
 348
 349 static const char *const nct6776_temp_label[] = {
 350         "",
 351         "SYSTIN",
 352         "CPUTIN",
 353         "AUXTIN",
 354         "SMBUSMASTER 0",
 355         "SMBUSMASTER 1",
 356         "SMBUSMASTER 2",
 357         "SMBUSMASTER 3",
 358         "SMBUSMASTER 4",
 359         "SMBUSMASTER 5",
 360         "SMBUSMASTER 6",
 361         "SMBUSMASTER 7",
 362         "PECI Agent 0",
 363         "PECI Agent 1",
 364         "PCH_CHIP_CPU_MAX_TEMP",
 365         "PCH_CHIP_TEMP",
 366         "PCH_CPU_TEMP",
 367         "PCH_MCH_TEMP",
 368         "PCH_DIM0_TEMP",
 369         "PCH_DIM1_TEMP",
 370         "PCH_DIM2_TEMP",
 371         "PCH_DIM3_TEMP",
 372         "BYTE_TEMP"
 373 };
 374
 375 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 376         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
 377
 378 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 379         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 380
 381 /* NCT6779 specific data */
 382
 383 static const u16 NCT6779_REG_IN[] = {
 384         0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
 385         0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
 386
 387 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
 388         0x459, 0x45A, 0x45B, 0x568 };
 389
 390 static const s8 NCT6779_ALARM_BITS[] = {
 391         0, 1, 2, 3, 8, 21, 20, 16,      /* in0.. in7 */
 392         17, 24, 25, 26, 27, 28, 29,     /* in8..in14 */
 393         -1,                             /* unused */
 394         6, 7, 11, 10, 23,               /* fan1..fan5 */
 395         -1, -1, -1,                     /* unused */
 396         4, 5, 13, -1, -1, -1,           /* temp1..temp6 */
 397         12, 9 };                        /* intrusion0, intrusion1 */
 398
 399 static const u16 NCT6779_REG_FAN[] = { 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8 };
 400 static const u16 NCT6779_REG_FAN_PULSES[] = {
 401         0x644, 0x645, 0x646, 0x647, 0x648 };
 402
 403 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
 404         0x136, 0x236, 0x336, 0x836, 0x936 };
 405 #define NCT6779_CRITICAL_PWM_ENABLE_MASK        0x01
 406 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
 407         0x137, 0x237, 0x337, 0x837, 0x937 };
 408
 409 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
 410 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 411         0x18, 0x152 };
 412 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 413         0x3a, 0x153 };
 414 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
 415         0x39, 0x155 };
 416
 417 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
 418         0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
 419
 420 static const char *const nct6779_temp_label[] = {
 421         "",
 422         "SYSTIN",
 423         "CPUTIN",
 424         "AUXTIN0",
 425         "AUXTIN1",
 426         "AUXTIN2",
 427         "AUXTIN3",
 428         "",
 429         "SMBUSMASTER 0",
 430         "SMBUSMASTER 1",
 431         "SMBUSMASTER 2",
 432         "SMBUSMASTER 3",
 433         "SMBUSMASTER 4",
 434         "SMBUSMASTER 5",
 435         "SMBUSMASTER 6",
 436         "SMBUSMASTER 7",
 437         "PECI Agent 0",
 438         "PECI Agent 1",
 439         "PCH_CHIP_CPU_MAX_TEMP",
 440         "PCH_CHIP_TEMP",
 441         "PCH_CPU_TEMP",
 442         "PCH_MCH_TEMP",
 443         "PCH_DIM0_TEMP",
 444         "PCH_DIM1_TEMP",
 445         "PCH_DIM2_TEMP",
 446         "PCH_DIM3_TEMP",
 447         "BYTE_TEMP"
 448 };
 449
 450 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
 451         = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
 452             0, 0, 0, 0, 0, 0, 0, 0,
 453             0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
 454             0x408, 0 };
 455
 456 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
 457         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
 458
 459 /* NCT6102D/NCT6106D specific data */
 460
 461 #define NCT6106_REG_VBAT        0x318
 462 #define NCT6106_REG_DIODE       0x319
 463 #define NCT6106_DIODE_MASK      0x01
 464
 465 static const u16 NCT6106_REG_IN_MAX[] = {
 466         0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
 467 static const u16 NCT6106_REG_IN_MIN[] = {
 468         0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
 469 static const u16 NCT6106_REG_IN[] = {
 470         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
 471
 472 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
 473 static const u16 NCT6106_REG_TEMP_HYST[] = {
 474         0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
 475 static const u16 NCT6106_REG_TEMP_OVER[] = {
 476         0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
 477 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
 478         0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
 479 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
 480         0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
 481 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
 482 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
 483         0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
 484
 485 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
 486 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
 487 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };
 488 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };
 489
 490 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
 491 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
 492 static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
 493 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
 494 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
 495 static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
 496 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
 497         0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
 498
 499 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
 500 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
 501         0x11b, 0x12b, 0x13b };
 502
 503 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
 504 #define NCT6106_CRITICAL_PWM_ENABLE_MASK        0x10
 505 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
 506
 507 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
 508 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
 509 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
 510 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
 511 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
 512 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
 513
 514 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
 515
 516 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
 517 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
 518 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
 519 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x17c };
 520 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
 521 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
 522
 523 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
 524 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
 525
 526 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
 527         0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
 528
 529 static const s8 NCT6106_ALARM_BITS[] = {
 530         0, 1, 2, 3, 4, 5, 7, 8,         /* in0.. in7 */
 531         9, -1, -1, -1, -1, -1, -1,      /* in8..in14 */
 532         -1,                             /* unused */
 533         32, 33, 34, -1, -1,             /* fan1..fan5 */
 534         -1, -1, -1,                     /* unused */
 535         16, 17, 18, 19, 20, 21,         /* temp1..temp6 */
 536         48, -1                          /* intrusion0, intrusion1 */
 537 };
 538
 539 static const u16 NCT6106_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
 540         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x51, 0x52, 0x54 };
 541
 542 static const u16 NCT6106_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
 543         = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x204, 0x205 };
 544
 545 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
 546 {
 547         if (mode == 0 && pwm == 255)
 548                 return off;
 549         return mode + 1;
 550 }
 551
 552 static int pwm_enable_to_reg(enum pwm_enable mode)
 553 {
 554         if (mode == off)
 555                 return 0;
 556         return mode - 1;
 557 }
 558
 559 /*
 560  * Conversions
 561  */
 562
 563 /* 1 is DC mode, output in ms */
 564 static unsigned int step_time_from_reg(u8 reg, u8 mode)
 565 {
 566         return mode ? 400 * reg : 100 * reg;
 567 }
 568
 569 static u8 step_time_to_reg(unsigned int msec, u8 mode)
 570 {
 571         return clamp_val((mode ? (msec + 200) / 400 :
 572                                         (msec + 50) / 100), 1, 255);
 573 }
 574
 575 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 576 {
 577         if (reg == 0 || reg == 255)
 578                 return 0;
 579         return 1350000U / (reg << divreg);
 580 }
 581
 582 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 583 {
 584         if ((reg & 0xff1f) == 0xff1f)
 585                 return 0;
 586
 587         reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 588
 589         if (reg == 0)
 590                 return 0;
 591
 592         return 1350000U / reg;
 593 }
 594
 595 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 596 {
 597         if (reg == 0 || reg == 0xffff)
 598                 return 0;
 599
 600         /*
 601          * Even though the registers are 16 bit wide, the fan divisor
 602          * still applies.
 603          */
 604         return 1350000U / (reg << divreg);
 605 }
 606
 607 static u16 fan_to_reg(u32 fan, unsigned int divreg)
 608 {
 609         if (!fan)
 610                 return 0;
 611
 612         return (1350000U / fan) >> divreg;
 613 }
 614
 615 static inline unsigned int
 616 div_from_reg(u8 reg)
 617 {
 618         return 1 << reg;
 619 }
 620
 621 /*
 622  * Some of the voltage inputs have internal scaling, the tables below
 623  * contain 8 (the ADC LSB in mV) * scaling factor * 100
 624  */
 625 static const u16 scale_in[15] = {
 626         800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
 627         800, 800
 628 };
 629
 630 static inline long in_from_reg(u8 reg, u8 nr)
 631 {
 632         return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 633 }
 634
 635 static inline u8 in_to_reg(u32 val, u8 nr)
 636 {
 637         return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 638 }
 639
 640 /*
 641  * Data structures and manipulation thereof
 642  */
 643
 644 struct nct6775_data {
 645         int addr;       /* IO base of hw monitor block */
 646         enum kinds kind;
 647         const char *name;
 648
 649         struct device *hwmon_dev;
 650         struct attribute_group *group_in;
 651         struct attribute_group *group_fan;
 652         struct attribute_group *group_temp;
 653         struct attribute_group *group_pwm;
 654
 655         u16 reg_temp[5][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 656                                     * 3=temp_crit, 4=temp_lcrit
 657                                     */
 658         u8 temp_src[NUM_TEMP];
 659         u16 reg_temp_config[NUM_TEMP];
 660         const char * const *temp_label;
 661         int temp_label_num;
 662
 663         u16 REG_CONFIG;
 664         u16 REG_VBAT;
 665         u16 REG_DIODE;
 666         u8 DIODE_MASK;
 667
 668         const s8 *ALARM_BITS;
 669
 670         const u16 *REG_VIN;
 671         const u16 *REG_IN_MINMAX[2];
 672
 673         const u16 *REG_TARGET;
 674         const u16 *REG_FAN;
 675         const u16 *REG_FAN_MODE;
 676         const u16 *REG_FAN_MIN;
 677         const u16 *REG_FAN_PULSES;
 678         const u16 *FAN_PULSE_SHIFT;
 679         const u16 *REG_FAN_TIME[3];
 680
 681         const u16 *REG_TOLERANCE_H;
 682
 683         const u8 *REG_PWM_MODE;
 684         const u8 *PWM_MODE_MASK;
 685
 686         const u16 *REG_PWM[7];  /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 687                                  * [3]=pwm_max, [4]=pwm_step,
 688                                  * [5]=weight_duty_step, [6]=weight_duty_base
 689                                  */
 690         const u16 *REG_PWM_READ;
 691
 692         const u16 *REG_CRITICAL_PWM_ENABLE;
 693         u8 CRITICAL_PWM_ENABLE_MASK;
 694         const u16 *REG_CRITICAL_PWM;
 695
 696         const u16 *REG_AUTO_TEMP;
 697         const u16 *REG_AUTO_PWM;
 698
 699         const u16 *REG_CRITICAL_TEMP;
 700         const u16 *REG_CRITICAL_TEMP_TOLERANCE;
 701
 702         const u16 *REG_TEMP_SOURCE;     /* temp register sources */
 703         const u16 *REG_TEMP_SEL;
 704         const u16 *REG_WEIGHT_TEMP_SEL;
 705         const u16 *REG_WEIGHT_TEMP[3];  /* 0=base, 1=tolerance, 2=step */
 706
 707         const u16 *REG_TEMP_OFFSET;
 708
 709         const u16 *REG_ALARM;
 710
 711         unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 712         unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 713
 714         struct mutex update_lock;
 715         bool valid;             /* true if following fields are valid */
 716         unsigned long last_updated;     /* In jiffies */
 717
 718         /* Register values */
 719         u8 bank;                /* current register bank */
 720         u8 in_num;              /* number of in inputs we have */
 721         u8 in[15][3];           /* [0]=in, [1]=in_max, [2]=in_min */
 722         unsigned int rpm[5];
 723         u16 fan_min[5];
 724         u8 fan_pulses[5];
 725         u8 fan_div[5];
 726         u8 has_pwm;
 727         u8 has_fan;             /* some fan inputs can be disabled */
 728         u8 has_fan_min;         /* some fans don't have min register */
 729         bool has_fan_div;
 730
 731         u8 num_temp_alarms;     /* 3 or 6 */
 732         u8 temp_fixed_num;      /* 3 or 6 */
 733         u8 temp_type[NUM_TEMP_FIXED];
 734         s8 temp_offset[NUM_TEMP_FIXED];
 735         s16 temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
 736                                 * 3=temp_crit */
 737         u64 alarms;
 738
 739         u8 pwm_num;     /* number of pwm */
 740         u8 pwm_mode[5]; /* 1->DC variable voltage, 0->PWM variable duty cycle */
 741         enum pwm_enable pwm_enable[5];
 742                         /* 0->off
 743                          * 1->manual
 744                          * 2->thermal cruise mode (also called SmartFan I)
 745                          * 3->fan speed cruise mode
 746                          * 4->SmartFan III
 747                          * 5->enhanced variable thermal cruise (SmartFan IV)
 748                          */
 749         u8 pwm[7][5];   /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
 750                          * [3]=pwm_max, [4]=pwm_step,
 751                          * [5]=weight_duty_step, [6]=weight_duty_base
 752                          */
 753
 754         u8 target_temp[5];
 755         u8 target_temp_mask;
 756         u32 target_speed[5];
 757         u32 target_speed_tolerance[5];
 758         u8 speed_tolerance_limit;
 759
 760         u8 temp_tolerance[2][5];
 761         u8 tolerance_mask;
 762
 763         u8 fan_time[3][5]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
 764
 765         /* Automatic fan speed control registers */
 766         int auto_pwm_num;
 767         u8 auto_pwm[5][7];
 768         u8 auto_temp[5][7];
 769         u8 pwm_temp_sel[5];
 770         u8 pwm_weight_temp_sel[5];
 771         u8 weight_temp[3][5];   /* 0->temp_step, 1->temp_step_tol,
 772                                  * 2->temp_base
 773                                  */
 774
 775         u8 vid;
 776         u8 vrm;
 777
 778         bool have_vid;
 779
 780         u16 have_temp;
 781         u16 have_temp_fixed;
 782         u16 have_in;
 783 #ifdef CONFIG_PM
 784         /* Remember extra register values over suspend/resume */
 785         u8 vbat;
 786         u8 fandiv1;
 787         u8 fandiv2;
 788 #endif
 789 };
 790
 791 struct nct6775_sio_data {
 792         int sioreg;
 793         enum kinds kind;
 794 };
 795
 796 struct sensor_device_template {
 797         struct device_attribute dev_attr;
 798         union {
 799                 struct {
 800                         u8 nr;
 801                         u8 index;
 802                 } s;
 803                 int index;
 804         } u;
 805         bool s2;        /* true if both index and nr are used */
 806 };
 807
 808 struct sensor_device_attr_u {
 809         union {
 810                 struct sensor_device_attribute a1;
 811                 struct sensor_device_attribute_2 a2;
 812         } u;
 813         char name[32];
 814 };
 815
 816 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) {      \
 817         .attr = {.name = _template, .mode = _mode },            \
 818         .show   = _show,                                        \
 819         .store  = _store,                                       \
 820 }
 821
 822 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
 823         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 824           .u.index = _index,                                            \
 825           .s2 = false }
 826
 827 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,       \
 828                                  _nr, _index)                           \
 829         { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
 830           .u.s.index = _index,                                          \
 831           .u.s.nr = _nr,                                                \
 832           .s2 = true }
 833
 834 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
 835 static struct sensor_device_template sensor_dev_template_##_name        \
 836         = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store,       \
 837                                  _index)
 838
 839 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store,       \
 840                           _nr, _index)                                  \
 841 static struct sensor_device_template sensor_dev_template_##_name        \
 842         = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store,     \
 843                                  _nr, _index)
 844
 845 struct sensor_template_group {
 846         struct sensor_device_template **templates;
 847         umode_t (*is_visible)(struct kobject *, struct attribute *, int);
 848         int base;
 849 };
 850
 851 static struct attribute_group *
 852 nct6775_create_attr_group(struct device *dev, struct sensor_template_group *tg,
 853                           int repeat)
 854 {
 855         struct attribute_group *group;
 856         struct sensor_device_attr_u *su;
 857         struct sensor_device_attribute *a;
 858         struct sensor_device_attribute_2 *a2;
 859         struct attribute **attrs;
 860         struct sensor_device_template **t;
 861         int err, i, j, count;
 862
 863         if (repeat <= 0)
 864                 return ERR_PTR(-EINVAL);
 865
 866         t = tg->templates;
 867         for (count = 0; *t; t++, count++)
 868                 ;
 869
 870         if (count == 0)
 871                 return ERR_PTR(-EINVAL);
 872
 873         group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
 874         if (group == NULL)
 875                 return ERR_PTR(-ENOMEM);
 876
 877         attrs = devm_kzalloc(dev, sizeof(*attrs) * (repeat * count + 1),
 878                              GFP_KERNEL);
 879         if (attrs == NULL)
 880                 return ERR_PTR(-ENOMEM);
 881
 882         su = devm_kzalloc(dev, sizeof(*su) * repeat * count,
 883                                GFP_KERNEL);
 884         if (su == NULL)
 885                 return ERR_PTR(-ENOMEM);
 886
 887         group->attrs = attrs;
 888         group->is_visible = tg->is_visible;
 889
 890         for (i = 0; i < repeat; i++) {
 891                 t = tg->templates;
 892                 for (j = 0; *t != NULL; j++) {
 893                         snprintf(su->name, sizeof(su->name),
 894                                  (*t)->dev_attr.attr.name, tg->base + i);
 895                         if ((*t)->s2) {
 896                                 a2 = &su->u.a2;
 897                                 a2->dev_attr.attr.name = su->name;
 898                                 a2->nr = (*t)->u.s.nr + i;
 899                                 a2->index = (*t)->u.s.index;
 900                                 a2->dev_attr.attr.mode =
 901                                   (*t)->dev_attr.attr.mode;
 902                                 a2->dev_attr.show = (*t)->dev_attr.show;
 903                                 a2->dev_attr.store = (*t)->dev_attr.store;
 904                                 *attrs = &a2->dev_attr.attr;
 905                         } else {
 906                                 a = &su->u.a1;
 907                                 a->dev_attr.attr.name = su->name;
 908                                 a->index = (*t)->u.index + i;
 909                                 a->dev_attr.attr.mode =
 910                                   (*t)->dev_attr.attr.mode;
 911                                 a->dev_attr.show = (*t)->dev_attr.show;
 912                                 a->dev_attr.store = (*t)->dev_attr.store;
 913                                 *attrs = &a->dev_attr.attr;
 914                         }
 915                         attrs++;
 916                         su++;
 917                         t++;
 918                 }
 919         }
 920
 921         err = sysfs_create_group(&dev->kobj, group);
 922         if (err)
 923                 return ERR_PTR(-ENOMEM);
 924
 925         return group;
 926 }
 927
 928 static bool is_word_sized(struct nct6775_data *data, u16 reg)
 929 {
 930         switch (data->kind) {
 931         case nct6106:
 932                 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
 933                   reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
 934                   reg == 0x111 || reg == 0x121 || reg == 0x131;
 935         case nct6775:
 936                 return (((reg & 0xff00) == 0x100 ||
 937                     (reg & 0xff00) == 0x200) &&
 938                    ((reg & 0x00ff) == 0x50 ||
 939                     (reg & 0x00ff) == 0x53 ||
 940                     (reg & 0x00ff) == 0x55)) ||
 941                   (reg & 0xfff0) == 0x630 ||
 942                   reg == 0x640 || reg == 0x642 ||
 943                   reg == 0x662 ||
 944                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
 945                   reg == 0x73 || reg == 0x75 || reg == 0x77;
 946         case nct6776:
 947                 return (((reg & 0xff00) == 0x100 ||
 948                     (reg & 0xff00) == 0x200) &&
 949                    ((reg & 0x00ff) == 0x50 ||
 950                     (reg & 0x00ff) == 0x53 ||
 951                     (reg & 0x00ff) == 0x55)) ||
 952                   (reg & 0xfff0) == 0x630 ||
 953                   reg == 0x402 ||
 954                   reg == 0x640 || reg == 0x642 ||
 955                   ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
 956                   reg == 0x73 || reg == 0x75 || reg == 0x77;
 957         case nct6779:
 958                 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
 959                   ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x09) ||
 960                   reg == 0x402 ||
 961                   reg == 0x63a || reg == 0x63c || reg == 0x63e ||
 962                   reg == 0x640 || reg == 0x642 ||
 963                   reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
 964                   reg == 0x7b;
 965         }
 966         return false;
 967 }
 968
 969 /*
 970  * On older chips, only registers 0x50-0x5f are banked.
 971  * On more recent chips, all registers are banked.
 972  * Assume that is the case and set the bank number for each access.
 973  * Cache the bank number so it only needs to be set if it changes.
 974  */
 975 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
 976 {
 977         u8 bank = reg >> 8;
 978         if (data->bank != bank) {
 979                 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
 980                 outb_p(bank, data->addr + DATA_REG_OFFSET);
 981                 data->bank = bank;
 982         }
 983 }
 984
 985 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
 986 {
 987         int res, word_sized = is_word_sized(data, reg);
 988
 989         nct6775_set_bank(data, reg);
 990         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
 991         res = inb_p(data->addr + DATA_REG_OFFSET);
 992         if (word_sized) {
 993                 outb_p((reg & 0xff) + 1,
 994                        data->addr + ADDR_REG_OFFSET);
 995                 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
 996         }
 997         return res;
 998 }
 999
1000 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
1001 {
1002         int word_sized = is_word_sized(data, reg);
1003
1004         nct6775_set_bank(data, reg);
1005         outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
1006         if (word_sized) {
1007                 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
1008                 outb_p((reg & 0xff) + 1,
1009                        data->addr + ADDR_REG_OFFSET);
1010         }
1011         outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
1012         return 0;
1013 }
1014
1015 /* We left-align 8-bit temperature values to make the code simpler */
1016 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
1017 {
1018         u16 res;
1019
1020         res = nct6775_read_value(data, reg);
1021         if (!is_word_sized(data, reg))
1022                 res <<= 8;
1023
1024         return res;
1025 }
1026
1027 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
1028 {
1029         if (!is_word_sized(data, reg))
1030                 value >>= 8;
1031         return nct6775_write_value(data, reg, value);
1032 }
1033
1034 /* This function assumes that the caller holds data->update_lock */
1035 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
1036 {
1037         u8 reg;
1038
1039         switch (nr) {
1040         case 0:
1041                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
1042                     | (data->fan_div[0] & 0x7);
1043                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1044                 break;
1045         case 1:
1046                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
1047                     | ((data->fan_div[1] << 4) & 0x70);
1048                 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
1049                 break;
1050         case 2:
1051                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
1052                     | (data->fan_div[2] & 0x7);
1053                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1054                 break;
1055         case 3:
1056                 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
1057                     | ((data->fan_div[3] << 4) & 0x70);
1058                 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
1059                 break;
1060         }
1061 }
1062
1063 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1064 {
1065         if (data->kind == nct6775)
1066                 nct6775_write_fan_div(data, nr);
1067 }
1068
1069 static void nct6775_update_fan_div(struct nct6775_data *data)
1070 {
1071         u8 i;
1072
1073         i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
1074         data->fan_div[0] = i & 0x7;
1075         data->fan_div[1] = (i & 0x70) >> 4;
1076         i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
1077         data->fan_div[2] = i & 0x7;
1078         if (data->has_fan & (1 << 3))
1079                 data->fan_div[3] = (i & 0x70) >> 4;
1080 }
1081
1082 static void nct6775_update_fan_div_common(struct nct6775_data *data)
1083 {
1084         if (data->kind == nct6775)
1085                 nct6775_update_fan_div(data);
1086 }
1087
1088 static void nct6775_init_fan_div(struct nct6775_data *data)
1089 {
1090         int i;
1091
1092         nct6775_update_fan_div_common(data);
1093         /*
1094          * For all fans, start with highest divider value if the divider
1095          * register is not initialized. This ensures that we get a
1096          * reading from the fan count register, even if it is not optimal.
1097          * We'll compute a better divider later on.
1098          */
1099         for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1100                 if (!(data->has_fan & (1 << i)))
1101                         continue;
1102                 if (data->fan_div[i] == 0) {
1103                         data->fan_div[i] = 7;
1104                         nct6775_write_fan_div_common(data, i);
1105                 }
1106         }
1107 }
1108
1109 static void nct6775_init_fan_common(struct device *dev,
1110                                     struct nct6775_data *data)
1111 {
1112         int i;
1113         u8 reg;
1114
1115         if (data->has_fan_div)
1116                 nct6775_init_fan_div(data);
1117
1118         /*
1119          * If fan_min is not set (0), set it to 0xff to disable it. This
1120          * prevents the unnecessary warning when fanX_min is reported as 0.
1121          */
1122         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1123                 if (data->has_fan_min & (1 << i)) {
1124                         reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
1125                         if (!reg)
1126                                 nct6775_write_value(data, data->REG_FAN_MIN[i],
1127                                                     data->has_fan_div ? 0xff
1128                                                                       : 0xff1f);
1129                 }
1130         }
1131 }
1132
1133 static void nct6775_select_fan_div(struct device *dev,
1134                                    struct nct6775_data *data, int nr, u16 reg)
1135 {
1136         u8 fan_div = data->fan_div[nr];
1137         u16 fan_min;
1138
1139         if (!data->has_fan_div)
1140                 return;
1141
1142         /*
1143          * If we failed to measure the fan speed, or the reported value is not
1144          * in the optimal range, and the clock divider can be modified,
1145          * let's try that for next time.
1146          */
1147         if (reg == 0x00 && fan_div < 0x07)
1148                 fan_div++;
1149         else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1150                 fan_div--;
1151
1152         if (fan_div != data->fan_div[nr]) {
1153                 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1154                         nr + 1, div_from_reg(data->fan_div[nr]),
1155                         div_from_reg(fan_div));
1156
1157                 /* Preserve min limit if possible */
1158                 if (data->has_fan_min & (1 << nr)) {
1159                         fan_min = data->fan_min[nr];
1160                         if (fan_div > data->fan_div[nr]) {
1161                                 if (fan_min != 255 && fan_min > 1)
1162                                         fan_min >>= 1;
1163                         } else {
1164                                 if (fan_min != 255) {
1165                                         fan_min <<= 1;
1166                                         if (fan_min > 254)
1167                                                 fan_min = 254;
1168                                 }
1169                         }
1170                         if (fan_min != data->fan_min[nr]) {
1171                                 data->fan_min[nr] = fan_min;
1172                                 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1173                                                     fan_min);
1174                         }
1175                 }
1176                 data->fan_div[nr] = fan_div;
1177                 nct6775_write_fan_div_common(data, nr);
1178         }
1179 }
1180
1181 static void nct6775_update_pwm(struct device *dev)
1182 {
1183         struct nct6775_data *data = dev_get_drvdata(dev);
1184         int i, j;
1185         int fanmodecfg, reg;
1186         bool duty_is_dc;
1187
1188         for (i = 0; i < data->pwm_num; i++) {
1189                 if (!(data->has_pwm & (1 << i)))
1190                         continue;
1191
1192                 duty_is_dc = data->REG_PWM_MODE[i] &&
1193                   (nct6775_read_value(data, data->REG_PWM_MODE[i])
1194                    & data->PWM_MODE_MASK[i]);
1195                 data->pwm_mode[i] = duty_is_dc;
1196
1197                 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
1198                 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1199                         if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1200                                 data->pwm[j][i]
1201                                   = nct6775_read_value(data,
1202                                                        data->REG_PWM[j][i]);
1203                         }
1204                 }
1205
1206                 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1207                                                         (fanmodecfg >> 4) & 7);
1208
1209                 if (!data->temp_tolerance[0][i] ||
1210                     data->pwm_enable[i] != speed_cruise)
1211                         data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1212                 if (!data->target_speed_tolerance[i] ||
1213                     data->pwm_enable[i] == speed_cruise) {
1214                         u8 t = fanmodecfg & 0x0f;
1215                         if (data->REG_TOLERANCE_H) {
1216                                 t |= (nct6775_read_value(data,
1217                                       data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
1218                         }
1219                         data->target_speed_tolerance[i] = t;
1220                 }
1221
1222                 data->temp_tolerance[1][i] =
1223                         nct6775_read_value(data,
1224                                         data->REG_CRITICAL_TEMP_TOLERANCE[i]);
1225
1226                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
1227                 data->pwm_temp_sel[i] = reg & 0x1f;
1228                 /* If fan can stop, report floor as 0 */
1229                 if (reg & 0x80)
1230                         data->pwm[2][i] = 0;
1231
1232                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1233                 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1234                 /* If weight is disabled, report weight source as 0 */
1235                 if (j == 1 && !(reg & 0x80))
1236                         data->pwm_weight_temp_sel[i] = 0;
1237
1238                 /* Weight temp data */
1239                 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1240                         data->weight_temp[j][i]
1241                           = nct6775_read_value(data,
1242                                                data->REG_WEIGHT_TEMP[j][i]);
1243                 }
1244         }
1245 }
1246
1247 static void nct6775_update_pwm_limits(struct device *dev)
1248 {
1249         struct nct6775_data *data = dev_get_drvdata(dev);
1250         int i, j;
1251         u8 reg;
1252         u16 reg_t;
1253
1254         for (i = 0; i < data->pwm_num; i++) {
1255                 if (!(data->has_pwm & (1 << i)))
1256                         continue;
1257
1258                 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1259                         data->fan_time[j][i] =
1260                           nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1261                 }
1262
1263                 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1264                 /* Update only in matching mode or if never updated */
1265                 if (!data->target_temp[i] ||
1266                     data->pwm_enable[i] == thermal_cruise)
1267                         data->target_temp[i] = reg_t & data->target_temp_mask;
1268                 if (!data->target_speed[i] ||
1269                     data->pwm_enable[i] == speed_cruise) {
1270                         if (data->REG_TOLERANCE_H) {
1271                                 reg_t |= (nct6775_read_value(data,
1272                                         data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1273                         }
1274                         data->target_speed[i] = reg_t;
1275                 }
1276
1277                 for (j = 0; j < data->auto_pwm_num; j++) {
1278                         data->auto_pwm[i][j] =
1279                           nct6775_read_value(data,
1280                                              NCT6775_AUTO_PWM(data, i, j));
1281                         data->auto_temp[i][j] =
1282                           nct6775_read_value(data,
1283                                              NCT6775_AUTO_TEMP(data, i, j));
1284                 }
1285
1286                 /* critical auto_pwm temperature data */
1287                 data->auto_temp[i][data->auto_pwm_num] =
1288                         nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1289
1290                 switch (data->kind) {
1291                 case nct6775:
1292                         reg = nct6775_read_value(data,
1293                                                  NCT6775_REG_CRITICAL_ENAB[i]);
1294                         data->auto_pwm[i][data->auto_pwm_num] =
1295                                                 (reg & 0x02) ? 0xff : 0x00;
1296                         break;
1297                 case nct6776:
1298                         data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1299                         break;
1300                 case nct6106:
1301                 case nct6779:
1302                         reg = nct6775_read_value(data,
1303                                         data->REG_CRITICAL_PWM_ENABLE[i]);
1304                         if (reg & data->CRITICAL_PWM_ENABLE_MASK)
1305                                 reg = nct6775_read_value(data,
1306                                         data->REG_CRITICAL_PWM[i]);
1307                         else
1308                                 reg = 0xff;
1309                         data->auto_pwm[i][data->auto_pwm_num] = reg;
1310                         break;
1311                 }
1312         }
1313 }
1314
1315 static struct nct6775_data *nct6775_update_device(struct device *dev)
1316 {
1317         struct nct6775_data *data = dev_get_drvdata(dev);
1318         int i, j;
1319
1320         mutex_lock(&data->update_lock);
1321
1322         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1323             || !data->valid) {
1324                 /* Fan clock dividers */
1325                 nct6775_update_fan_div_common(data);
1326
1327                 /* Measured voltages and limits */
1328                 for (i = 0; i < data->in_num; i++) {
1329                         if (!(data->have_in & (1 << i)))
1330                                 continue;
1331
1332                         data->in[i][0] = nct6775_read_value(data,
1333                                                             data->REG_VIN[i]);
1334                         data->in[i][1] = nct6775_read_value(data,
1335                                           data->REG_IN_MINMAX[0][i]);
1336                         data->in[i][2] = nct6775_read_value(data,
1337                                           data->REG_IN_MINMAX[1][i]);
1338                 }
1339
1340                 /* Measured fan speeds and limits */
1341                 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1342                         u16 reg;
1343
1344                         if (!(data->has_fan & (1 << i)))
1345                                 continue;
1346
1347                         reg = nct6775_read_value(data, data->REG_FAN[i]);
1348                         data->rpm[i] = data->fan_from_reg(reg,
1349                                                           data->fan_div[i]);
1350
1351                         if (data->has_fan_min & (1 << i))
1352                                 data->fan_min[i] = nct6775_read_value(data,
1353                                            data->REG_FAN_MIN[i]);
1354                         data->fan_pulses[i] =
1355                           (nct6775_read_value(data, data->REG_FAN_PULSES[i])
1356                                 >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1357
1358                         nct6775_select_fan_div(dev, data, i, reg);
1359                 }
1360
1361                 nct6775_update_pwm(dev);
1362                 nct6775_update_pwm_limits(dev);
1363
1364                 /* Measured temperatures and limits */
1365                 for (i = 0; i < NUM_TEMP; i++) {
1366                         if (!(data->have_temp & (1 << i)))
1367                                 continue;
1368                         for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1369                                 if (data->reg_temp[j][i])
1370                                         data->temp[j][i]
1371                                           = nct6775_read_temp(data,
1372                                                 data->reg_temp[j][i]);
1373                         }
1374                         if (!(data->have_temp_fixed & (1 << i)))
1375                                 continue;
1376                         data->temp_offset[i]
1377                           = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1378                 }
1379
1380                 data->alarms = 0;
1381                 for (i = 0; i < NUM_REG_ALARM; i++) {
1382                         u8 alarm;
1383                         if (!data->REG_ALARM[i])
1384                                 continue;
1385                         alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1386                         data->alarms |= ((u64)alarm) << (i << 3);
1387                 }
1388
1389                 data->last_updated = jiffies;
1390                 data->valid = true;
1391         }
1392
1393         mutex_unlock(&data->update_lock);
1394         return data;
1395 }
1396
1397 /*
1398  * Sysfs callback functions
1399  */
1400 static ssize_t
1401 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1402 {
1403         struct nct6775_data *data = nct6775_update_device(dev);
1404         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1405         int nr = sattr->nr;
1406         int index = sattr->index;
1407         return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1408 }
1409
1410 static ssize_t
1411 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1412              size_t count)
1413 {
1414         struct nct6775_data *data = dev_get_drvdata(dev);
1415         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1416         int nr = sattr->nr;
1417         int index = sattr->index;
1418         unsigned long val;
1419         int err = kstrtoul(buf, 10, &val);
1420         if (err < 0)
1421                 return err;
1422         mutex_lock(&data->update_lock);
1423         data->in[nr][index] = in_to_reg(val, nr);
1424         nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1425                             data->in[nr][index]);
1426         mutex_unlock(&data->update_lock);
1427         return count;
1428 }
1429
1430 static ssize_t
1431 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1432 {
1433         struct nct6775_data *data = nct6775_update_device(dev);
1434         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1435         int nr = data->ALARM_BITS[sattr->index];
1436         return sprintf(buf, "%u\n",
1437                        (unsigned int)((data->alarms >> nr) & 0x01));
1438 }
1439
1440 static ssize_t
1441 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1442 {
1443         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1444         struct nct6775_data *data = nct6775_update_device(dev);
1445         int index = sattr->index;
1446         unsigned int alarm = 0;
1447         int nr;
1448
1449         /*
1450          * For temperatures, there is no fixed mapping from registers to alarm
1451          * bits. Alarm bits are determined by the temperature source mapping.
1452          * Alarms are generated only for the first <num_temp_alarms> temperature
1453          * sources.
1454          */
1455         for (nr = 0; nr < data->num_temp_alarms; nr++) {
1456                 int src;
1457
1458                 src = nct6775_read_value(data,
1459                                          data->REG_TEMP_SOURCE[nr]) & 0x1f;
1460                 if (src == data->temp_src[index]) {
1461                         int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1462                         alarm = (data->alarms >> bit) & 0x01;
1463                         break;
1464                 }
1465         }
1466         return sprintf(buf, "%u\n", alarm);
1467 }
1468
1469 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1470                                      struct attribute *attr, int index)
1471 {
1472         struct device *dev = container_of(kobj, struct device, kobj);
1473         struct nct6775_data *data = dev_get_drvdata(dev);
1474         int in = index / 4;     /* voltage index */
1475
1476         if (!(data->have_in & (1 << in)))
1477                 return 0;
1478
1479         return attr->mode;
1480 }
1481
1482 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
1483 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", S_IRUGO, show_alarm, NULL, 0);
1484 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IWUSR | S_IRUGO, show_in_reg,
1485                   store_in_reg, 0, 1);
1486 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IWUSR | S_IRUGO, show_in_reg,
1487                   store_in_reg, 0, 2);
1488
1489 /*
1490  * nct6775_in_is_visible uses the index into the following array
1491  * to determine if attributes should be created or not.
1492  * Any change in order or content must be matched.
1493  */
1494 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1495         &sensor_dev_template_in_input,
1496         &sensor_dev_template_in_alarm,
1497         &sensor_dev_template_in_min,
1498         &sensor_dev_template_in_max,
1499         NULL
1500 };
1501
1502 static struct sensor_template_group nct6775_in_template_group = {
1503         .templates = nct6775_attributes_in_template,
1504         .is_visible = nct6775_in_is_visible,
1505 };
1506
1507 static ssize_t
1508 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1509 {
1510         struct nct6775_data *data = nct6775_update_device(dev);
1511         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1512         int nr = sattr->index;
1513         return sprintf(buf, "%d\n", data->rpm[nr]);
1514 }
1515
1516 static ssize_t
1517 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1518 {
1519         struct nct6775_data *data = nct6775_update_device(dev);
1520         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1521         int nr = sattr->index;
1522         return sprintf(buf, "%d\n",
1523                        data->fan_from_reg_min(data->fan_min[nr],
1524                                               data->fan_div[nr]));
1525 }
1526
1527 static ssize_t
1528 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1529 {
1530         struct nct6775_data *data = nct6775_update_device(dev);
1531         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1532         int nr = sattr->index;
1533         return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1534 }
1535
1536 static ssize_t
1537 store_fan_min(struct device *dev, struct device_attribute *attr,
1538               const char *buf, size_t count)
1539 {
1540         struct nct6775_data *data = dev_get_drvdata(dev);
1541         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1542         int nr = sattr->index;
1543         unsigned long val;
1544         int err;
1545         unsigned int reg;
1546         u8 new_div;
1547
1548         err = kstrtoul(buf, 10, &val);
1549         if (err < 0)
1550                 return err;
1551
1552         mutex_lock(&data->update_lock);
1553         if (!data->has_fan_div) {
1554                 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1555                 if (!val) {
1556                         val = 0xff1f;
1557                 } else {
1558                         if (val > 1350000U)
1559                                 val = 135000U;
1560                         val = 1350000U / val;
1561                         val = (val & 0x1f) | ((val << 3) & 0xff00);
1562                 }
1563                 data->fan_min[nr] = val;
1564                 goto write_min; /* Leave fan divider alone */
1565         }
1566         if (!val) {
1567                 /* No min limit, alarm disabled */
1568                 data->fan_min[nr] = 255;
1569                 new_div = data->fan_div[nr]; /* No change */
1570                 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1571                 goto write_div;
1572         }
1573         reg = 1350000U / val;
1574         if (reg >= 128 * 255) {
1575                 /*
1576                  * Speed below this value cannot possibly be represented,
1577                  * even with the highest divider (128)
1578                  */
1579                 data->fan_min[nr] = 254;
1580                 new_div = 7; /* 128 == (1 << 7) */
1581                 dev_warn(dev,
1582                          "fan%u low limit %lu below minimum %u, set to minimum\n",
1583                          nr + 1, val, data->fan_from_reg_min(254, 7));
1584         } else if (!reg) {
1585                 /*
1586                  * Speed above this value cannot possibly be represented,
1587                  * even with the lowest divider (1)
1588                  */
1589                 data->fan_min[nr] = 1;
1590                 new_div = 0; /* 1 == (1 << 0) */
1591                 dev_warn(dev,
1592                          "fan%u low limit %lu above maximum %u, set to maximum\n",
1593                          nr + 1, val, data->fan_from_reg_min(1, 0));
1594         } else {
1595                 /*
1596                  * Automatically pick the best divider, i.e. the one such
1597                  * that the min limit will correspond to a register value
1598                  * in the 96..192 range
1599                  */
1600                 new_div = 0;
1601                 while (reg > 192 && new_div < 7) {
1602                         reg >>= 1;
1603                         new_div++;
1604                 }
1605                 data->fan_min[nr] = reg;
1606         }
1607
1608 write_div:
1609         /*
1610          * Write both the fan clock divider (if it changed) and the new
1611          * fan min (unconditionally)
1612          */
1613         if (new_div != data->fan_div[nr]) {
1614                 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1615                         nr + 1, div_from_reg(data->fan_div[nr]),
1616                         div_from_reg(new_div));
1617                 data->fan_div[nr] = new_div;
1618                 nct6775_write_fan_div_common(data, nr);
1619                 /* Give the chip time to sample a new speed value */
1620                 data->last_updated = jiffies;
1621         }
1622
1623 write_min:
1624         nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1625         mutex_unlock(&data->update_lock);
1626
1627         return count;
1628 }
1629
1630 static ssize_t
1631 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1632 {
1633         struct nct6775_data *data = nct6775_update_device(dev);
1634         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1635         int p = data->fan_pulses[sattr->index];
1636
1637         return sprintf(buf, "%d\n", p ? : 4);
1638 }
1639
1640 static ssize_t
1641 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1642                  const char *buf, size_t count)
1643 {
1644         struct nct6775_data *data = dev_get_drvdata(dev);
1645         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1646         int nr = sattr->index;
1647         unsigned long val;
1648         int err;
1649         u8 reg;
1650
1651         err = kstrtoul(buf, 10, &val);
1652         if (err < 0)
1653                 return err;
1654
1655         if (val > 4)
1656                 return -EINVAL;
1657
1658         mutex_lock(&data->update_lock);
1659         data->fan_pulses[nr] = val & 3;
1660         reg = nct6775_read_value(data, data->REG_FAN_PULSES[nr]);
1661         reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
1662         reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
1663         nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
1664         mutex_unlock(&data->update_lock);
1665
1666         return count;
1667 }
1668
1669 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
1670                                       struct attribute *attr, int index)
1671 {
1672         struct device *dev = container_of(kobj, struct device, kobj);
1673         struct nct6775_data *data = dev_get_drvdata(dev);
1674         int fan = index / 5;    /* fan index */
1675         int nr = index % 5;     /* attribute index */
1676
1677         if (!(data->has_fan & (1 << fan)))
1678                 return 0;
1679
1680         if (nr == 3 && !(data->has_fan_min & (1 << fan)))
1681                 return 0;
1682         if (nr == 4 && data->kind != nct6775)
1683                 return 0;
1684
1685         return attr->mode;
1686 }
1687
1688 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
1689 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", S_IRUGO, show_alarm, NULL,
1690                 FAN_ALARM_BASE);
1691 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IWUSR | S_IRUGO, show_fan_pulses,
1692                 store_fan_pulses, 0);
1693 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IWUSR | S_IRUGO, show_fan_min,
1694                 store_fan_min, 0);
1695 SENSOR_TEMPLATE(fan_div, "fan%d_div", S_IRUGO, show_fan_div, NULL, 0);
1696
1697 /*
1698  * nct6775_fan_is_visible uses the index into the following array
1699  * to determine if attributes should be created or not.
1700  * Any change in order or content must be matched.
1701  */
1702 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
1703         &sensor_dev_template_fan_input,
1704         &sensor_dev_template_fan_alarm,
1705         &sensor_dev_template_fan_pulses,
1706         &sensor_dev_template_fan_min,   /* 3 */
1707         &sensor_dev_template_fan_div,   /* 4 */
1708         NULL
1709 };
1710
1711 static struct sensor_template_group nct6775_fan_template_group = {
1712         .templates = nct6775_attributes_fan_template,
1713         .is_visible = nct6775_fan_is_visible,
1714         .base = 1,
1715 };
1716
1717 static ssize_t
1718 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1719 {
1720         struct nct6775_data *data = nct6775_update_device(dev);
1721         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1722         int nr = sattr->index;
1723         return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1724 }
1725
1726 static ssize_t
1727 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1728 {
1729         struct nct6775_data *data = nct6775_update_device(dev);
1730         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1731         int nr = sattr->nr;
1732         int index = sattr->index;
1733
1734         return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1735 }
1736
1737 static ssize_t
1738 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1739            size_t count)
1740 {
1741         struct nct6775_data *data = dev_get_drvdata(dev);
1742         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1743         int nr = sattr->nr;
1744         int index = sattr->index;
1745         int err;
1746         long val;
1747
1748         err = kstrtol(buf, 10, &val);
1749         if (err < 0)
1750                 return err;
1751
1752         mutex_lock(&data->update_lock);
1753         data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1754         nct6775_write_temp(data, data->reg_temp[index][nr],
1755                            data->temp[index][nr]);
1756         mutex_unlock(&data->update_lock);
1757         return count;
1758 }
1759
1760 static ssize_t
1761 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1762 {
1763         struct nct6775_data *data = nct6775_update_device(dev);
1764         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1765
1766         return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1767 }
1768
1769 static ssize_t
1770 store_temp_offset(struct device *dev, struct device_attribute *attr,
1771                   const char *buf, size_t count)
1772 {
1773         struct nct6775_data *data = dev_get_drvdata(dev);
1774         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1775         int nr = sattr->index;
1776         long val;
1777         int err;
1778
1779         err = kstrtol(buf, 10, &val);
1780         if (err < 0)
1781                 return err;
1782
1783         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1784
1785         mutex_lock(&data->update_lock);
1786         data->temp_offset[nr] = val;
1787         nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
1788         mutex_unlock(&data->update_lock);
1789
1790         return count;
1791 }
1792
1793 static ssize_t
1794 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1795 {
1796         struct nct6775_data *data = nct6775_update_device(dev);
1797         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1798         int nr = sattr->index;
1799         return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1800 }
1801
1802 static ssize_t
1803 store_temp_type(struct device *dev, struct device_attribute *attr,
1804                 const char *buf, size_t count)
1805 {
1806         struct nct6775_data *data = nct6775_update_device(dev);
1807         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1808         int nr = sattr->index;
1809         unsigned long val;
1810         int err;
1811         u8 vbat, diode, vbit, dbit;
1812
1813         err = kstrtoul(buf, 10, &val);
1814         if (err < 0)
1815                 return err;
1816
1817         if (val != 1 && val != 3 && val != 4)
1818                 return -EINVAL;
1819
1820         mutex_lock(&data->update_lock);
1821
1822         data->temp_type[nr] = val;
1823         vbit = 0x02 << nr;
1824         dbit = data->DIODE_MASK << nr;
1825         vbat = nct6775_read_value(data, data->REG_VBAT) & ~vbit;
1826         diode = nct6775_read_value(data, data->REG_DIODE) & ~dbit;
1827         switch (val) {
1828         case 1: /* CPU diode (diode, current mode) */
1829                 vbat |= vbit;
1830                 diode |= dbit;
1831                 break;
1832         case 3: /* diode, voltage mode */
1833                 vbat |= dbit;
1834                 break;
1835         case 4: /* thermistor */
1836                 break;
1837         }
1838         nct6775_write_value(data, data->REG_VBAT, vbat);
1839         nct6775_write_value(data, data->REG_DIODE, diode);
1840
1841         mutex_unlock(&data->update_lock);
1842         return count;
1843 }
1844
1845 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
1846                                        struct attribute *attr, int index)
1847 {
1848         struct device *dev = container_of(kobj, struct device, kobj);
1849         struct nct6775_data *data = dev_get_drvdata(dev);
1850         int temp = index / 9;   /* temp index */
1851         int nr = index % 9;     /* attribute index */
1852
1853         if (!(data->have_temp & (1 << temp)))
1854                 return 0;
1855
1856         if (nr == 3 && !data->reg_temp[1][temp])        /* max */
1857                 return 0;
1858
1859         if (nr == 4 && !data->reg_temp[2][temp])        /* max_hyst */
1860                 return 0;
1861
1862         if (nr == 5 && !data->reg_temp[3][temp])        /* crit */
1863                 return 0;
1864
1865         if (nr == 6 && !data->reg_temp[4][temp])        /* lcrit */
1866                 return 0;
1867
1868         /* offset and type only apply to fixed sensors */
1869         if (nr > 6 && !(data->have_temp_fixed & (1 << temp)))
1870                 return 0;
1871
1872         return attr->mode;
1873 }
1874
1875 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", S_IRUGO, show_temp, NULL, 0, 0);
1876 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
1877 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO | S_IWUSR, show_temp,
1878                   store_temp, 0, 1);
1879 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", S_IRUGO | S_IWUSR,
1880                   show_temp, store_temp, 0, 2);
1881 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO | S_IWUSR, show_temp,
1882                   store_temp, 0, 3);
1883 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", S_IRUGO | S_IWUSR, show_temp,
1884                   store_temp, 0, 4);
1885 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", S_IRUGO | S_IWUSR,
1886                 show_temp_offset, store_temp_offset, 0);
1887 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO | S_IWUSR, show_temp_type,
1888                 store_temp_type, 0);
1889 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", S_IRUGO, show_temp_alarm, NULL, 0);
1890
1891 /*
1892  * nct6775_temp_is_visible uses the index into the following array
1893  * to determine if attributes should be created or not.
1894  * Any change in order or content must be matched.
1895  */
1896 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
1897         &sensor_dev_template_temp_input,
1898         &sensor_dev_template_temp_label,
1899         &sensor_dev_template_temp_alarm,        /* 2 */
1900         &sensor_dev_template_temp_max,          /* 3 */
1901         &sensor_dev_template_temp_max_hyst,     /* 4 */
1902         &sensor_dev_template_temp_crit,         /* 5 */
1903         &sensor_dev_template_temp_lcrit,        /* 6 */
1904         &sensor_dev_template_temp_offset,       /* 7 */
1905         &sensor_dev_template_temp_type,         /* 8 */
1906         NULL
1907 };
1908
1909 static struct sensor_template_group nct6775_temp_template_group = {
1910         .templates = nct6775_attributes_temp_template,
1911         .is_visible = nct6775_temp_is_visible,
1912         .base = 1,
1913 };
1914
1915 static ssize_t
1916 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
1917 {
1918         struct nct6775_data *data = nct6775_update_device(dev);
1919         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1920
1921         return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
1922 }
1923
1924 static ssize_t
1925 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1926                const char *buf, size_t count)
1927 {
1928         struct nct6775_data *data = dev_get_drvdata(dev);
1929         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1930         int nr = sattr->index;
1931         unsigned long val;
1932         int err;
1933         u8 reg;
1934
1935         err = kstrtoul(buf, 10, &val);
1936         if (err < 0)
1937                 return err;
1938
1939         if (val > 1)
1940                 return -EINVAL;
1941
1942         /* Setting DC mode is not supported for all chips/channels */
1943         if (data->REG_PWM_MODE[nr] == 0) {
1944                 if (val)
1945                         return -EINVAL;
1946                 return count;
1947         }
1948
1949         mutex_lock(&data->update_lock);
1950         data->pwm_mode[nr] = val;
1951         reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
1952         reg &= ~data->PWM_MODE_MASK[nr];
1953         if (val)
1954                 reg |= data->PWM_MODE_MASK[nr];
1955         nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
1956         mutex_unlock(&data->update_lock);
1957         return count;
1958 }
1959
1960 static ssize_t
1961 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1962 {
1963         struct nct6775_data *data = nct6775_update_device(dev);
1964         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1965         int nr = sattr->nr;
1966         int index = sattr->index;
1967         int pwm;
1968
1969         /*
1970          * For automatic fan control modes, show current pwm readings.
1971          * Otherwise, show the configured value.
1972          */
1973         if (index == 0 && data->pwm_enable[nr] > manual)
1974                 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
1975         else
1976                 pwm = data->pwm[index][nr];
1977
1978         return sprintf(buf, "%d\n", pwm);
1979 }
1980
1981 static ssize_t
1982 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
1983           size_t count)
1984 {
1985         struct nct6775_data *data = dev_get_drvdata(dev);
1986         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1987         int nr = sattr->nr;
1988         int index = sattr->index;
1989         unsigned long val;
1990         int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
1991         int maxval[7]
1992           = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
1993         int err;
1994         u8 reg;
1995
1996         err = kstrtoul(buf, 10, &val);
1997         if (err < 0)
1998                 return err;
1999         val = clamp_val(val, minval[index], maxval[index]);
2000
2001         mutex_lock(&data->update_lock);
2002         data->pwm[index][nr] = val;
2003         nct6775_write_value(data, data->REG_PWM[index][nr], val);
2004         if (index == 2) { /* floor: disable if val == 0 */
2005                 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2006                 reg &= 0x7f;
2007                 if (val)
2008                         reg |= 0x80;
2009                 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2010         }
2011         mutex_unlock(&data->update_lock);
2012         return count;
2013 }
2014
2015 /* Returns 0 if OK, -EINVAL otherwise */
2016 static int check_trip_points(struct nct6775_data *data, int nr)
2017 {
2018         int i;
2019
2020         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2021                 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2022                         return -EINVAL;
2023         }
2024         for (i = 0; i < data->auto_pwm_num - 1; i++) {
2025                 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2026                         return -EINVAL;
2027         }
2028         /* validate critical temperature and pwm if enabled (pwm > 0) */
2029         if (data->auto_pwm[nr][data->auto_pwm_num]) {
2030                 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2031                                 data->auto_temp[nr][data->auto_pwm_num] ||
2032                     data->auto_pwm[nr][data->auto_pwm_num - 1] >
2033                                 data->auto_pwm[nr][data->auto_pwm_num])
2034                         return -EINVAL;
2035         }
2036         return 0;
2037 }
2038
2039 static void pwm_update_registers(struct nct6775_data *data, int nr)
2040 {
2041         u8 reg;
2042
2043         switch (data->pwm_enable[nr]) {
2044         case off:
2045         case manual:
2046                 break;
2047         case speed_cruise:
2048                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2049                 reg = (reg & ~data->tolerance_mask) |
2050                   (data->target_speed_tolerance[nr] & data->tolerance_mask);
2051                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2052                 nct6775_write_value(data, data->REG_TARGET[nr],
2053                                     data->target_speed[nr] & 0xff);
2054                 if (data->REG_TOLERANCE_H) {
2055                         reg = (data->target_speed[nr] >> 8) & 0x0f;
2056                         reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2057                         nct6775_write_value(data,
2058                                             data->REG_TOLERANCE_H[nr],
2059                                             reg);
2060                 }
2061                 break;
2062         case thermal_cruise:
2063                 nct6775_write_value(data, data->REG_TARGET[nr],
2064                                     data->target_temp[nr]);
2065                 /* intentional */
2066         default:
2067                 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2068                 reg = (reg & ~data->tolerance_mask) |
2069                   data->temp_tolerance[0][nr];
2070                 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2071                 break;
2072         }
2073 }
2074
2075 static ssize_t
2076 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2077 {
2078         struct nct6775_data *data = nct6775_update_device(dev);
2079         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2080
2081         return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2082 }
2083
2084 static ssize_t
2085 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2086                  const char *buf, size_t count)
2087 {
2088         struct nct6775_data *data = dev_get_drvdata(dev);
2089         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2090         int nr = sattr->index;
2091         unsigned long val;
2092         int err;
2093         u16 reg;
2094
2095         err = kstrtoul(buf, 10, &val);
2096         if (err < 0)
2097                 return err;
2098
2099         if (val > sf4)
2100                 return -EINVAL;
2101
2102         if (val == sf3 && data->kind != nct6775)
2103                 return -EINVAL;
2104
2105         if (val == sf4 && check_trip_points(data, nr)) {
2106                 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2107                 dev_err(dev, "Adjust trip points and try again\n");
2108                 return -EINVAL;
2109         }
2110
2111         mutex_lock(&data->update_lock);
2112         data->pwm_enable[nr] = val;
2113         if (val == off) {
2114                 /*
2115                  * turn off pwm control: select manual mode, set pwm to maximum
2116                  */
2117                 data->pwm[0][nr] = 255;
2118                 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2119         }
2120         pwm_update_registers(data, nr);
2121         reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2122         reg &= 0x0f;
2123         reg |= pwm_enable_to_reg(val) << 4;
2124         nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2125         mutex_unlock(&data->update_lock);
2126         return count;
2127 }
2128
2129 static ssize_t
2130 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2131 {
2132         int i, sel = 0;
2133
2134         for (i = 0; i < NUM_TEMP; i++) {
2135                 if (!(data->have_temp & (1 << i)))
2136                         continue;
2137                 if (src == data->temp_src[i]) {
2138                         sel = i + 1;
2139                         break;
2140                 }
2141         }
2142
2143         return sprintf(buf, "%d\n", sel);
2144 }
2145
2146 static ssize_t
2147 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2148 {
2149         struct nct6775_data *data = nct6775_update_device(dev);
2150         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2151         int index = sattr->index;
2152
2153         return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2154 }
2155
2156 static ssize_t
2157 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2158                    const char *buf, size_t count)
2159 {
2160         struct nct6775_data *data = nct6775_update_device(dev);
2161         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2162         int nr = sattr->index;
2163         unsigned long val;
2164         int err, reg, src;
2165
2166         err = kstrtoul(buf, 10, &val);
2167         if (err < 0)
2168                 return err;
2169         if (val == 0 || val > NUM_TEMP)
2170                 return -EINVAL;
2171         if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2172                 return -EINVAL;
2173
2174         mutex_lock(&data->update_lock);
2175         src = data->temp_src[val - 1];
2176         data->pwm_temp_sel[nr] = src;
2177         reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2178         reg &= 0xe0;
2179         reg |= src;
2180         nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2181         mutex_unlock(&data->update_lock);
2182
2183         return count;
2184 }
2185
2186 static ssize_t
2187 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2188                          char *buf)
2189 {
2190         struct nct6775_data *data = nct6775_update_device(dev);
2191         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2192         int index = sattr->index;
2193
2194         return show_pwm_temp_sel_common(data, buf,
2195                                         data->pwm_weight_temp_sel[index]);
2196 }
2197
2198 static ssize_t
2199 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2200                           const char *buf, size_t count)
2201 {
2202         struct nct6775_data *data = nct6775_update_device(dev);
2203         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2204         int nr = sattr->index;
2205         unsigned long val;
2206         int err, reg, src;
2207
2208         err = kstrtoul(buf, 10, &val);
2209         if (err < 0)
2210                 return err;
2211         if (val > NUM_TEMP)
2212                 return -EINVAL;
2213         if (val && (!(data->have_temp & (1 << (val - 1))) ||
2214                     !data->temp_src[val - 1]))
2215                 return -EINVAL;
2216
2217         mutex_lock(&data->update_lock);
2218         if (val) {
2219                 src = data->temp_src[val - 1];
2220                 data->pwm_weight_temp_sel[nr] = src;
2221                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2222                 reg &= 0xe0;
2223                 reg |= (src | 0x80);
2224                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2225         } else {
2226                 data->pwm_weight_temp_sel[nr] = 0;
2227                 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2228                 reg &= 0x7f;
2229                 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2230         }
2231         mutex_unlock(&data->update_lock);
2232
2233         return count;
2234 }
2235
2236 static ssize_t
2237 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2238 {
2239         struct nct6775_data *data = nct6775_update_device(dev);
2240         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2241
2242         return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2243 }
2244
2245 static ssize_t
2246 store_target_temp(struct device *dev, struct device_attribute *attr,
2247                   const char *buf, size_t count)
2248 {
2249         struct nct6775_data *data = dev_get_drvdata(dev);
2250         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2251         int nr = sattr->index;
2252         unsigned long val;
2253         int err;
2254
2255         err = kstrtoul(buf, 10, &val);
2256         if (err < 0)
2257                 return err;
2258
2259         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2260                         data->target_temp_mask);
2261
2262         mutex_lock(&data->update_lock);
2263         data->target_temp[nr] = val;
2264         pwm_update_registers(data, nr);
2265         mutex_unlock(&data->update_lock);
2266         return count;
2267 }
2268
2269 static ssize_t
2270 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2271 {
2272         struct nct6775_data *data = nct6775_update_device(dev);
2273         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2274         int nr = sattr->index;
2275
2276         return sprintf(buf, "%d\n",
2277                        fan_from_reg16(data->target_speed[nr],
2278                                       data->fan_div[nr]));
2279 }
2280
2281 static ssize_t
2282 store_target_speed(struct device *dev, struct device_attribute *attr,
2283                    const char *buf, size_t count)
2284 {
2285         struct nct6775_data *data = dev_get_drvdata(dev);
2286         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2287         int nr = sattr->index;
2288         unsigned long val;
2289         int err;
2290         u16 speed;
2291
2292         err = kstrtoul(buf, 10, &val);
2293         if (err < 0)
2294                 return err;
2295
2296         val = clamp_val(val, 0, 1350000U);
2297         speed = fan_to_reg(val, data->fan_div[nr]);
2298
2299         mutex_lock(&data->update_lock);
2300         data->target_speed[nr] = speed;
2301         pwm_update_registers(data, nr);
2302         mutex_unlock(&data->update_lock);
2303         return count;
2304 }
2305
2306 static ssize_t
2307 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2308                     char *buf)
2309 {
2310         struct nct6775_data *data = nct6775_update_device(dev);
2311         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2312         int nr = sattr->nr;
2313         int index = sattr->index;
2314
2315         return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2316 }
2317
2318 static ssize_t
2319 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2320                      const char *buf, size_t count)
2321 {
2322         struct nct6775_data *data = dev_get_drvdata(dev);
2323         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2324         int nr = sattr->nr;
2325         int index = sattr->index;
2326         unsigned long val;
2327         int err;
2328
2329         err = kstrtoul(buf, 10, &val);
2330         if (err < 0)
2331                 return err;
2332
2333         /* Limit tolerance as needed */
2334         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2335
2336         mutex_lock(&data->update_lock);
2337         data->temp_tolerance[index][nr] = val;
2338         if (index)
2339                 pwm_update_registers(data, nr);
2340         else
2341                 nct6775_write_value(data,
2342                                     data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2343                                     val);
2344         mutex_unlock(&data->update_lock);
2345         return count;
2346 }
2347
2348 /*
2349  * Fan speed tolerance is a tricky beast, since the associated register is
2350  * a tick counter, but the value is reported and configured as rpm.
2351  * Compute resulting low and high rpm values and report the difference.
2352  */
2353 static ssize_t
2354 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2355                      char *buf)
2356 {
2357         struct nct6775_data *data = nct6775_update_device(dev);
2358         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2359         int nr = sattr->index;
2360         int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2361         int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2362         int tolerance;
2363
2364         if (low <= 0)
2365                 low = 1;
2366         if (high > 0xffff)
2367                 high = 0xffff;
2368         if (high < low)
2369                 high = low;
2370
2371         tolerance = (fan_from_reg16(low, data->fan_div[nr])
2372                      - fan_from_reg16(high, data->fan_div[nr])) / 2;
2373
2374         return sprintf(buf, "%d\n", tolerance);
2375 }
2376
2377 static ssize_t
2378 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2379                       const char *buf, size_t count)
2380 {
2381         struct nct6775_data *data = dev_get_drvdata(dev);
2382         struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2383         int nr = sattr->index;
2384         unsigned long val;
2385         int err;
2386         int low, high;
2387
2388         err = kstrtoul(buf, 10, &val);
2389         if (err < 0)
2390                 return err;
2391
2392         high = fan_from_reg16(data->target_speed[nr],
2393                               data->fan_div[nr]) + val;
2394         low = fan_from_reg16(data->target_speed[nr],
2395                              data->fan_div[nr]) - val;
2396         if (low <= 0)
2397                 low = 1;
2398         if (high < low)
2399                 high = low;
2400
2401         val = (fan_to_reg(low, data->fan_div[nr]) -
2402                fan_to_reg(high, data->fan_div[nr])) / 2;
2403
2404         /* Limit tolerance as needed */
2405         val = clamp_val(val, 0, data->speed_tolerance_limit);
2406
2407         mutex_lock(&data->update_lock);
2408         data->target_speed_tolerance[nr] = val;
2409         pwm_update_registers(data, nr);
2410         mutex_unlock(&data->update_lock);
2411         return count;
2412 }
2413
2414 SENSOR_TEMPLATE_2(pwm, "pwm%d", S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2415 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", S_IWUSR | S_IRUGO, show_pwm_mode,
2416                 store_pwm_mode, 0);
2417 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", S_IWUSR | S_IRUGO, show_pwm_enable,
2418                 store_pwm_enable, 0);
2419 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", S_IWUSR | S_IRUGO,
2420                 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2421 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", S_IWUSR | S_IRUGO,
2422                 show_target_temp, store_target_temp, 0);
2423 SENSOR_TEMPLATE(fan_target, "fan%d_target", S_IWUSR | S_IRUGO,
2424                 show_target_speed, store_target_speed, 0);
2425 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", S_IWUSR | S_IRUGO,
2426                 show_speed_tolerance, store_speed_tolerance, 0);
2427
2428 /* Smart Fan registers */
2429
2430 static ssize_t
2431 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2432 {
2433         struct nct6775_data *data = nct6775_update_device(dev);
2434         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2435         int nr = sattr->nr;
2436         int index = sattr->index;
2437
2438         return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2439 }
2440
2441 static ssize_t
2442 store_weight_temp(struct device *dev, struct device_attribute *attr,
2443                   const char *buf, size_t count)
2444 {
2445         struct nct6775_data *data = dev_get_drvdata(dev);
2446         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2447         int nr = sattr->nr;
2448         int index = sattr->index;
2449         unsigned long val;
2450         int err;
2451
2452         err = kstrtoul(buf, 10, &val);
2453         if (err < 0)
2454                 return err;
2455
2456         val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2457
2458         mutex_lock(&data->update_lock);
2459         data->weight_temp[index][nr] = val;
2460         nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2461         mutex_unlock(&data->update_lock);
2462         return count;
2463 }
2464
2465 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", S_IWUSR | S_IRUGO,
2466                   show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2467 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2468                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 0);
2469 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
2470                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 1);
2471 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
2472                   S_IWUSR | S_IRUGO, show_weight_temp, store_weight_temp, 0, 2);
2473 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step",
2474                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 5);
2475 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base",
2476                   S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 6);
2477
2478 static ssize_t
2479 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2480 {
2481         struct nct6775_data *data = nct6775_update_device(dev);
2482         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2483         int nr = sattr->nr;
2484         int index = sattr->index;
2485
2486         return sprintf(buf, "%d\n",
2487                        step_time_from_reg(data->fan_time[index][nr],
2488                                           data->pwm_mode[nr]));
2489 }
2490
2491 static ssize_t
2492 store_fan_time(struct device *dev, struct device_attribute *attr,
2493                const char *buf, size_t count)
2494 {
2495         struct nct6775_data *data = dev_get_drvdata(dev);
2496         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2497         int nr = sattr->nr;
2498         int index = sattr->index;
2499         unsigned long val;
2500         int err;
2501
2502         err = kstrtoul(buf, 10, &val);
2503         if (err < 0)
2504                 return err;
2505
2506         val = step_time_to_reg(val, data->pwm_mode[nr]);
2507         mutex_lock(&data->update_lock);
2508         data->fan_time[index][nr] = val;
2509         nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2510         mutex_unlock(&data->update_lock);
2511         return count;
2512 }
2513
2514 static ssize_t
2515 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2516 {
2517         struct nct6775_data *data = dev_get_drvdata(dev);
2518
2519         return sprintf(buf, "%s\n", data->name);
2520 }
2521
2522 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2523
2524 static ssize_t
2525 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2526 {
2527         struct nct6775_data *data = nct6775_update_device(dev);
2528         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2529
2530         return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2531 }
2532
2533 static ssize_t
2534 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2535                const char *buf, size_t count)
2536 {
2537         struct nct6775_data *data = dev_get_drvdata(dev);
2538         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2539         int nr = sattr->nr;
2540         int point = sattr->index;
2541         unsigned long val;
2542         int err;
2543         u8 reg;
2544
2545         err = kstrtoul(buf, 10, &val);
2546         if (err < 0)
2547                 return err;
2548         if (val > 255)
2549                 return -EINVAL;
2550
2551         if (point == data->auto_pwm_num) {
2552                 if (data->kind != nct6775 && !val)
2553                         return -EINVAL;
2554                 if (data->kind != nct6779 && val)
2555                         val = 0xff;
2556         }
2557
2558         mutex_lock(&data->update_lock);
2559         data->auto_pwm[nr][point] = val;
2560         if (point < data->auto_pwm_num) {
2561                 nct6775_write_value(data,
2562                                     NCT6775_AUTO_PWM(data, nr, point),
2563                                     data->auto_pwm[nr][point]);
2564         } else {
2565                 switch (data->kind) {
2566                 case nct6775:
2567                         /* disable if needed (pwm == 0) */
2568                         reg = nct6775_read_value(data,
2569                                                  NCT6775_REG_CRITICAL_ENAB[nr]);
2570                         if (val)
2571                                 reg |= 0x02;
2572                         else
2573                                 reg &= ~0x02;
2574                         nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2575                                             reg);
2576                         break;
2577                 case nct6776:
2578                         break; /* always enabled, nothing to do */
2579                 case nct6106:
2580                 case nct6779:
2581                         nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
2582                                             val);
2583                         reg = nct6775_read_value(data,
2584                                         data->REG_CRITICAL_PWM_ENABLE[nr]);
2585                         if (val == 255)
2586                                 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
2587                         else
2588                                 reg |= data->CRITICAL_PWM_ENABLE_MASK;
2589                         nct6775_write_value(data,
2590                                             data->REG_CRITICAL_PWM_ENABLE[nr],
2591                                             reg);
2592                         break;
2593                 }
2594         }
2595         mutex_unlock(&data->update_lock);
2596         return count;
2597 }
2598
2599 static ssize_t
2600 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2601 {
2602         struct nct6775_data *data = nct6775_update_device(dev);
2603         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2604         int nr = sattr->nr;
2605         int point = sattr->index;
2606
2607         /*
2608          * We don't know for sure if the temperature is signed or unsigned.
2609          * Assume it is unsigned.
2610          */
2611         return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2612 }
2613
2614 static ssize_t
2615 store_auto_temp(struct device *dev, struct device_attribute *attr,
2616                 const char *buf, size_t count)
2617 {
2618         struct nct6775_data *data = dev_get_drvdata(dev);
2619         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2620         int nr = sattr->nr;
2621         int point = sattr->index;
2622         unsigned long val;
2623         int err;
2624
2625         err = kstrtoul(buf, 10, &val);
2626         if (err)
2627                 return err;
2628         if (val > 255000)
2629                 return -EINVAL;
2630
2631         mutex_lock(&data->update_lock);
2632         data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2633         if (point < data->auto_pwm_num) {
2634                 nct6775_write_value(data,
2635                                     NCT6775_AUTO_TEMP(data, nr, point),
2636                                     data->auto_temp[nr][point]);
2637         } else {
2638                 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2639                                     data->auto_temp[nr][point]);
2640         }
2641         mutex_unlock(&data->update_lock);
2642         return count;
2643 }
2644
2645 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
2646                                       struct attribute *attr, int index)
2647 {
2648         struct device *dev = container_of(kobj, struct device, kobj);
2649         struct nct6775_data *data = dev_get_drvdata(dev);
2650         int pwm = index / 36;   /* pwm index */
2651         int nr = index % 36;    /* attribute index */
2652
2653         if (!(data->has_pwm & (1 << pwm)))
2654                 return 0;
2655
2656         if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
2657                 return 0;
2658         if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
2659                 return 0;
2660         if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
2661                 return 0;
2662
2663         if (nr >= 22 && nr <= 35) {             /* auto point */
2664                 int api = (nr - 22) / 2;        /* auto point index */
2665
2666                 if (api > data->auto_pwm_num)
2667                         return 0;
2668         }
2669         return attr->mode;
2670 }
2671
2672 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", S_IWUSR | S_IRUGO,
2673                   show_fan_time, store_fan_time, 0, 0);
2674 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", S_IWUSR | S_IRUGO,
2675                   show_fan_time, store_fan_time, 0, 1);
2676 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", S_IWUSR | S_IRUGO,
2677                   show_fan_time, store_fan_time, 0, 2);
2678 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", S_IWUSR | S_IRUGO, show_pwm,
2679                   store_pwm, 0, 1);
2680 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", S_IWUSR | S_IRUGO, show_pwm,
2681                   store_pwm, 0, 2);
2682 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", S_IWUSR | S_IRUGO,
2683                   show_temp_tolerance, store_temp_tolerance, 0, 0);
2684 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
2685                   S_IWUSR | S_IRUGO, show_temp_tolerance, store_temp_tolerance,
2686                   0, 1);
2687
2688 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2689                   0, 3);
2690
2691 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", S_IWUSR | S_IRUGO, show_pwm,
2692                   store_pwm, 0, 4);
2693
2694 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
2695                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 0);
2696 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
2697                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 0);
2698
2699 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
2700                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 1);
2701 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
2702                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 1);
2703
2704 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
2705                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 2);
2706 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
2707                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 2);
2708
2709 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
2710                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 3);
2711 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
2712                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 3);
2713
2714 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
2715                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 4);
2716 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
2717                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 4);
2718
2719 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
2720                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 5);
2721 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
2722                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 5);
2723
2724 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
2725                   S_IWUSR | S_IRUGO, show_auto_pwm, store_auto_pwm, 0, 6);
2726 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
2727                   S_IWUSR | S_IRUGO, show_auto_temp, store_auto_temp, 0, 6);
2728
2729 /*
2730  * nct6775_pwm_is_visible uses the index into the following array
2731  * to determine if attributes should be created or not.
2732  * Any change in order or content must be matched.
2733  */
2734 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
2735         &sensor_dev_template_pwm,
2736         &sensor_dev_template_pwm_mode,
2737         &sensor_dev_template_pwm_enable,
2738         &sensor_dev_template_pwm_temp_sel,
2739         &sensor_dev_template_pwm_temp_tolerance,
2740         &sensor_dev_template_pwm_crit_temp_tolerance,
2741         &sensor_dev_template_pwm_target_temp,
2742         &sensor_dev_template_fan_target,
2743         &sensor_dev_template_fan_tolerance,
2744         &sensor_dev_template_pwm_stop_time,
2745         &sensor_dev_template_pwm_step_up_time,
2746         &sensor_dev_template_pwm_step_down_time,
2747         &sensor_dev_template_pwm_start,
2748         &sensor_dev_template_pwm_floor,
2749         &sensor_dev_template_pwm_weight_temp_sel,
2750         &sensor_dev_template_pwm_weight_temp_step,
2751         &sensor_dev_template_pwm_weight_temp_step_tol,
2752         &sensor_dev_template_pwm_weight_temp_step_base,
2753         &sensor_dev_template_pwm_weight_duty_step,
2754         &sensor_dev_template_pwm_max,                   /* 19 */
2755         &sensor_dev_template_pwm_step,                  /* 20 */
2756         &sensor_dev_template_pwm_weight_duty_base,      /* 21 */
2757         &sensor_dev_template_pwm_auto_point1_pwm,       /* 22 */
2758         &sensor_dev_template_pwm_auto_point1_temp,
2759         &sensor_dev_template_pwm_auto_point2_pwm,
2760         &sensor_dev_template_pwm_auto_point2_temp,
2761         &sensor_dev_template_pwm_auto_point3_pwm,
2762         &sensor_dev_template_pwm_auto_point3_temp,
2763         &sensor_dev_template_pwm_auto_point4_pwm,
2764         &sensor_dev_template_pwm_auto_point4_temp,
2765         &sensor_dev_template_pwm_auto_point5_pwm,
2766         &sensor_dev_template_pwm_auto_point5_temp,
2767         &sensor_dev_template_pwm_auto_point6_pwm,
2768         &sensor_dev_template_pwm_auto_point6_temp,
2769         &sensor_dev_template_pwm_auto_point7_pwm,
2770         &sensor_dev_template_pwm_auto_point7_temp,      /* 35 */
2771
2772         NULL
2773 };
2774
2775 static struct sensor_template_group nct6775_pwm_template_group = {
2776         .templates = nct6775_attributes_pwm_template,
2777         .is_visible = nct6775_pwm_is_visible,
2778         .base = 1,
2779 };
2780
2781 static ssize_t
2782 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
2783 {
2784         struct nct6775_data *data = dev_get_drvdata(dev);
2785         return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
2786 }
2787
2788 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
2789
2790 /* Case open detection */
2791
2792 static ssize_t
2793 clear_caseopen(struct device *dev, struct device_attribute *attr,
2794                const char *buf, size_t count)
2795 {
2796         struct nct6775_data *data = dev_get_drvdata(dev);
2797         struct nct6775_sio_data *sio_data = dev->platform_data;
2798         int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
2799         unsigned long val;
2800         u8 reg;
2801         int ret;
2802
2803         if (kstrtoul(buf, 10, &val) || val != 0)
2804                 return -EINVAL;
2805
2806         mutex_lock(&data->update_lock);
2807
2808         /*
2809          * Use CR registers to clear caseopen status.
2810          * The CR registers are the same for all chips, and not all chips
2811          * support clearing the caseopen status through "regular" registers.
2812          */
2813         ret = superio_enter(sio_data->sioreg);
2814         if (ret) {
2815                 count = ret;
2816                 goto error;
2817         }
2818
2819         superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
2820         reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
2821         reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
2822         superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
2823         reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
2824         superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
2825         superio_exit(sio_data->sioreg);
2826
2827         data->valid = false;    /* Force cache refresh */
2828 error:
2829         mutex_unlock(&data->update_lock);
2830         return count;
2831 }
2832
2833 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
2834                           clear_caseopen, INTRUSION_ALARM_BASE);
2835 static SENSOR_DEVICE_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
2836                           clear_caseopen, INTRUSION_ALARM_BASE + 1);
2837
2838 static umode_t nct6775_other_is_visible(struct kobject *kobj,
2839                                         struct attribute *attr, int index)
2840 {
2841         struct device *dev = container_of(kobj, struct device, kobj);
2842         struct nct6775_data *data = dev_get_drvdata(dev);
2843
2844         if (index == 1 && !data->have_vid)
2845                 return 0;
2846
2847         if (index == 2 || index == 3) {
2848                 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 2] < 0)
2849                         return 0;
2850         }
2851
2852         return attr->mode;
2853 }
2854
2855 /*
2856  * nct6775_other_is_visible uses the index into the following array
2857  * to determine if attributes should be created or not.
2858  * Any change in order or content must be matched.
2859  */
2860 static struct attribute *nct6775_attributes_other[] = {
2861         &dev_attr_name.attr,
2862         &dev_attr_cpu0_vid.attr,                                /* 1 */
2863         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,        /* 2 */
2864         &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,        /* 3 */
2865
2866         NULL
2867 };
2868
2869 static const struct attribute_group nct6775_group_other = {
2870         .attrs = nct6775_attributes_other,
2871         .is_visible = nct6775_other_is_visible,
2872 };
2873
2874 /*
2875  * Driver and device management
2876  */
2877
2878 static void nct6775_device_remove_files(struct device *dev)
2879 {
2880         struct nct6775_data *data = dev_get_drvdata(dev);
2881
2882         if (data->group_pwm)
2883                 sysfs_remove_group(&dev->kobj, data->group_pwm);
2884         if (data->group_in)
2885                 sysfs_remove_group(&dev->kobj, data->group_in);
2886         if (data->group_fan)
2887                 sysfs_remove_group(&dev->kobj, data->group_fan);
2888         if (data->group_temp)
2889                 sysfs_remove_group(&dev->kobj, data->group_temp);
2890
2891         sysfs_remove_group(&dev->kobj, &nct6775_group_other);
2892 }
2893
2894 /* Get the monitoring functions started */
2895 static inline void nct6775_init_device(struct nct6775_data *data)
2896 {
2897         int i;
2898         u8 tmp, diode;
2899
2900         /* Start monitoring if needed */
2901         if (data->REG_CONFIG) {
2902                 tmp = nct6775_read_value(data, data->REG_CONFIG);
2903                 if (!(tmp & 0x01))
2904                         nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
2905         }
2906
2907         /* Enable temperature sensors if needed */
2908         for (i = 0; i < NUM_TEMP; i++) {
2909                 if (!(data->have_temp & (1 << i)))
2910                         continue;
2911                 if (!data->reg_temp_config[i])
2912                         continue;
2913                 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
2914                 if (tmp & 0x01)
2915                         nct6775_write_value(data, data->reg_temp_config[i],
2916                                             tmp & 0xfe);
2917         }
2918
2919         /* Enable VBAT monitoring if needed */
2920         tmp = nct6775_read_value(data, data->REG_VBAT);
2921         if (!(tmp & 0x01))
2922                 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
2923
2924         diode = nct6775_read_value(data, data->REG_DIODE);
2925
2926         for (i = 0; i < data->temp_fixed_num; i++) {
2927                 if (!(data->have_temp_fixed & (1 << i)))
2928                         continue;
2929                 if ((tmp & (data->DIODE_MASK << i)))    /* diode */
2930                         data->temp_type[i]
2931                           = 3 - ((diode >> i) & data->DIODE_MASK);
2932                 else                            /* thermistor */
2933                         data->temp_type[i] = 4;
2934         }
2935 }
2936
2937 static void
2938 nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
2939                          struct nct6775_data *data)
2940 {
2941         int regval;
2942         bool fan3pin, fan3min, fan4pin, fan4min, fan5pin;
2943         bool pwm3pin, pwm4pin, pwm5pin;
2944
2945         /* fan4 and fan5 share some pins with the GPIO and serial flash */
2946         if (data->kind == nct6775) {
2947                 regval = superio_inb(sio_data->sioreg, 0x2c);
2948
2949                 fan3pin = regval & (1 << 6);
2950                 fan3min = fan3pin;
2951                 pwm3pin = regval & (1 << 7);
2952
2953                 /* On NCT6775, fan4 shares pins with the fdc interface */
2954                 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
2955                 fan4min = 0;
2956                 fan5pin = 0;
2957                 pwm4pin = 0;
2958                 pwm5pin = 0;
2959         } else if (data->kind == nct6776) {
2960                 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
2961
2962                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
2963                 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
2964
2965                 if (regval & 0x80)
2966                         fan3pin = gpok;
2967                 else
2968                         fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
2969
2970                 if (regval & 0x40)
2971                         fan4pin = gpok;
2972                 else
2973                         fan4pin = superio_inb(sio_data->sioreg, 0x1C) & 0x01;
2974
2975                 if (regval & 0x20)
2976                         fan5pin = gpok;
2977                 else
2978                         fan5pin = superio_inb(sio_data->sioreg, 0x1C) & 0x02;
2979
2980                 fan4min = fan4pin;
2981                 fan3min = fan3pin;
2982                 pwm3pin = fan3pin;
2983                 pwm4pin = 0;
2984                 pwm5pin = 0;
2985         } else if (data->kind == nct6106) {
2986                 regval = superio_inb(sio_data->sioreg, 0x24);
2987                 fan3pin = !(regval & 0x80);
2988                 pwm3pin = regval & 0x08;
2989                 fan3min = fan3pin;
2990
2991                 fan4pin = false;
2992                 fan4min = false;
2993                 fan5pin = false;
2994                 pwm4pin = false;
2995                 pwm5pin = false;
2996         } else {        /* NCT6779D */
2997                 regval = superio_inb(sio_data->sioreg, 0x1c);
2998
2999                 fan3pin = !(regval & (1 << 5));
3000                 fan4pin = !(regval & (1 << 6));
3001                 fan5pin = !(regval & (1 << 7));
3002
3003                 pwm3pin = !(regval & (1 << 0));
3004                 pwm4pin = !(regval & (1 << 1));
3005                 pwm5pin = !(regval & (1 << 2));
3006
3007                 fan3min = fan3pin;
3008                 fan4min = fan4pin;
3009         }
3010
3011         data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
3012         data->has_fan |= fan3pin << 2;
3013         data->has_fan_min |= fan3min << 2;
3014
3015         data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
3016         data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
3017
3018         data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) | (pwm5pin << 4);
3019 }
3020
3021 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3022                              int *available, int *mask)
3023 {
3024         int i;
3025         u8 src;
3026
3027         for (i = 0; i < data->pwm_num && *available; i++) {
3028                 int index;
3029
3030                 if (!regp[i])
3031                         continue;
3032                 src = nct6775_read_value(data, regp[i]);
3033                 src &= 0x1f;
3034                 if (!src || (*mask & (1 << src)))
3035                         continue;
3036                 if (src >= data->temp_label_num ||
3037                     !strlen(data->temp_label[src]))
3038                         continue;
3039
3040                 index = __ffs(*available);
3041                 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3042                 *available &= ~(1 << index);
3043                 *mask |= 1 << src;
3044         }
3045 }
3046
3047 static int nct6775_probe(struct platform_device *pdev)
3048 {
3049         struct device *dev = &pdev->dev;
3050         struct nct6775_sio_data *sio_data = dev->platform_data;
3051         struct nct6775_data *data;
3052         struct resource *res;
3053         int i, s, err = 0;
3054         int src, mask, available;
3055         const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3056         const u16 *reg_temp_alternate, *reg_temp_crit;
3057         const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3058         int num_reg_temp;
3059         u8 cr2a;
3060         struct attribute_group *group;
3061
3062         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3063         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3064                                  DRVNAME))
3065                 return -EBUSY;
3066
3067         data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3068                             GFP_KERNEL);
3069         if (!data)
3070                 return -ENOMEM;
3071
3072         data->kind = sio_data->kind;
3073         data->addr = res->start;
3074         mutex_init(&data->update_lock);
3075         data->name = nct6775_device_names[data->kind];
3076         data->bank = 0xff;              /* Force initial bank selection */
3077         platform_set_drvdata(pdev, data);
3078
3079         switch (data->kind) {
3080         case nct6106:
3081                 data->in_num = 9;
3082                 data->pwm_num = 3;
3083                 data->auto_pwm_num = 4;
3084                 data->temp_fixed_num = 3;
3085                 data->num_temp_alarms = 6;
3086
3087                 data->fan_from_reg = fan_from_reg13;
3088                 data->fan_from_reg_min = fan_from_reg13;
3089
3090                 data->temp_label = nct6776_temp_label;
3091                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3092
3093                 data->REG_VBAT = NCT6106_REG_VBAT;
3094                 data->REG_DIODE = NCT6106_REG_DIODE;
3095                 data->DIODE_MASK = NCT6106_DIODE_MASK;
3096                 data->REG_VIN = NCT6106_REG_IN;
3097                 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3098                 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3099                 data->REG_TARGET = NCT6106_REG_TARGET;
3100                 data->REG_FAN = NCT6106_REG_FAN;
3101                 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3102                 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3103                 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3104                 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3105                 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3106                 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3107                 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3108                 data->REG_PWM[0] = NCT6106_REG_PWM;
3109                 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3110                 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3111                 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3112                 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3113                 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3114                 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3115                 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3116                 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3117                 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3118                 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3119                 data->REG_CRITICAL_TEMP_TOLERANCE
3120                   = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3121                 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3122                 data->CRITICAL_PWM_ENABLE_MASK
3123                   = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3124                 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3125                 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3126                 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3127                 data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
3128                 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3129                 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3130                 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3131                 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3132                 data->REG_ALARM = NCT6106_REG_ALARM;
3133                 data->ALARM_BITS = NCT6106_ALARM_BITS;
3134
3135                 reg_temp = NCT6106_REG_TEMP;
3136                 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3137                 reg_temp_over = NCT6106_REG_TEMP_OVER;
3138                 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3139                 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3140                 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3141                 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3142                 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3143                 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3144
3145                 break;
3146         case nct6775:
3147                 data->in_num = 9;
3148                 data->pwm_num = 3;
3149                 data->auto_pwm_num = 6;
3150                 data->has_fan_div = true;
3151                 data->temp_fixed_num = 3;
3152                 data->num_temp_alarms = 3;
3153
3154                 data->ALARM_BITS = NCT6775_ALARM_BITS;
3155
3156                 data->fan_from_reg = fan_from_reg16;
3157                 data->fan_from_reg_min = fan_from_reg8;
3158                 data->target_temp_mask = 0x7f;
3159                 data->tolerance_mask = 0x0f;
3160                 data->speed_tolerance_limit = 15;
3161
3162                 data->temp_label = nct6775_temp_label;
3163                 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3164
3165                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3166                 data->REG_VBAT = NCT6775_REG_VBAT;
3167                 data->REG_DIODE = NCT6775_REG_DIODE;
3168                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3169                 data->REG_VIN = NCT6775_REG_IN;
3170                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3171                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3172                 data->REG_TARGET = NCT6775_REG_TARGET;
3173                 data->REG_FAN = NCT6775_REG_FAN;
3174                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3175                 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3176                 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3177                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3178                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3179                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3180                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3181                 data->REG_PWM[0] = NCT6775_REG_PWM;
3182                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3183                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3184                 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3185                 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3186                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3187                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3188                 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3189                 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3190                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3191                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3192                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3193                 data->REG_CRITICAL_TEMP_TOLERANCE
3194                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3195                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3196                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3197                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3198                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3199                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3200                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3201                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3202                 data->REG_ALARM = NCT6775_REG_ALARM;
3203
3204                 reg_temp = NCT6775_REG_TEMP;
3205                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3206                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3207                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3208                 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3209                 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3210                 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3211
3212                 break;
3213         case nct6776:
3214                 data->in_num = 9;
3215                 data->pwm_num = 3;
3216                 data->auto_pwm_num = 4;
3217                 data->has_fan_div = false;
3218                 data->temp_fixed_num = 3;
3219                 data->num_temp_alarms = 3;
3220
3221                 data->ALARM_BITS = NCT6776_ALARM_BITS;
3222
3223                 data->fan_from_reg = fan_from_reg13;
3224                 data->fan_from_reg_min = fan_from_reg13;
3225                 data->target_temp_mask = 0xff;
3226                 data->tolerance_mask = 0x07;
3227                 data->speed_tolerance_limit = 63;
3228
3229                 data->temp_label = nct6776_temp_label;
3230                 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3231
3232                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3233                 data->REG_VBAT = NCT6775_REG_VBAT;
3234                 data->REG_DIODE = NCT6775_REG_DIODE;
3235                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3236                 data->REG_VIN = NCT6775_REG_IN;
3237                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3238                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3239                 data->REG_TARGET = NCT6775_REG_TARGET;
3240                 data->REG_FAN = NCT6775_REG_FAN;
3241                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3242                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3243                 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3244                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3245                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3246                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3247                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3248                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3249                 data->REG_PWM[0] = NCT6775_REG_PWM;
3250                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3251                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3252                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3253                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3254                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3255                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3256                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3257                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3258                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3259                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3260                 data->REG_CRITICAL_TEMP_TOLERANCE
3261                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3262                 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3263                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3264                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3265                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3266                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3267                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3268                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3269                 data->REG_ALARM = NCT6775_REG_ALARM;
3270
3271                 reg_temp = NCT6775_REG_TEMP;
3272                 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3273                 reg_temp_over = NCT6775_REG_TEMP_OVER;
3274                 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3275                 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3276                 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3277                 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3278
3279                 break;
3280         case nct6779:
3281                 data->in_num = 15;
3282                 data->pwm_num = 5;
3283                 data->auto_pwm_num = 4;
3284                 data->has_fan_div = false;
3285                 data->temp_fixed_num = 6;
3286                 data->num_temp_alarms = 3;
3287
3288                 data->ALARM_BITS = NCT6779_ALARM_BITS;
3289
3290                 data->fan_from_reg = fan_from_reg13;
3291                 data->fan_from_reg_min = fan_from_reg13;
3292                 data->target_temp_mask = 0xff;
3293                 data->tolerance_mask = 0x07;
3294                 data->speed_tolerance_limit = 63;
3295
3296                 data->temp_label = nct6779_temp_label;
3297                 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3298
3299                 data->REG_CONFIG = NCT6775_REG_CONFIG;
3300                 data->REG_VBAT = NCT6775_REG_VBAT;
3301                 data->REG_DIODE = NCT6775_REG_DIODE;
3302                 data->DIODE_MASK = NCT6775_DIODE_MASK;
3303                 data->REG_VIN = NCT6779_REG_IN;
3304                 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3305                 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3306                 data->REG_TARGET = NCT6775_REG_TARGET;
3307                 data->REG_FAN = NCT6779_REG_FAN;
3308                 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3309                 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3310                 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3311                 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3312                 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3313                 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3314                 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3315                 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3316                 data->REG_PWM[0] = NCT6775_REG_PWM;
3317                 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3318                 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3319                 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3320                 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3321                 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3322                 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3323                 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3324                 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3325                 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3326                 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3327                 data->REG_CRITICAL_TEMP_TOLERANCE
3328                   = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3329                 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3330                 data->CRITICAL_PWM_ENABLE_MASK
3331                   = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3332                 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3333                 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3334                 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3335                 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3336                 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3337                 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3338                 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3339                 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3340                 data->REG_ALARM = NCT6779_REG_ALARM;
3341
3342                 reg_temp = NCT6779_REG_TEMP;
3343                 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3344                 reg_temp_over = NCT6779_REG_TEMP_OVER;
3345                 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3346                 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3347                 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3348                 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3349
3350                 break;
3351         default:
3352                 return -ENODEV;
3353         }
3354         data->have_in = (1 << data->in_num) - 1;
3355         data->have_temp = 0;
3356
3357         /*
3358          * On some boards, not all available temperature sources are monitored,
3359          * even though some of the monitoring registers are unused.
3360          * Get list of unused monitoring registers, then detect if any fan
3361          * controls are configured to use unmonitored temperature sources.
3362          * If so, assign the unmonitored temperature sources to available
3363          * monitoring registers.
3364          */
3365         mask = 0;
3366         available = 0;
3367         for (i = 0; i < num_reg_temp; i++) {
3368                 if (reg_temp[i] == 0)
3369                         continue;
3370
3371                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3372                 if (!src || (mask & (1 << src)))
3373                         available |= 1 << i;
3374
3375                 mask |= 1 << src;
3376         }
3377
3378         /*
3379          * Now find unmonitored temperature registers and enable monitoring
3380          * if additional monitoring registers are available.
3381          */
3382         add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3383         add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3384
3385         mask = 0;
3386         s = NUM_TEMP_FIXED;     /* First dynamic temperature attribute */
3387         for (i = 0; i < num_reg_temp; i++) {
3388                 if (reg_temp[i] == 0)
3389                         continue;
3390
3391                 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3392                 if (!src || (mask & (1 << src)))
3393                         continue;
3394
3395                 if (src >= data->temp_label_num ||
3396                     !strlen(data->temp_label[src])) {
3397                         dev_info(dev,
3398                                  "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3399                                  src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3400                         continue;
3401                 }
3402
3403                 mask |= 1 << src;
3404
3405                 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3406                 if (src <= data->temp_fixed_num) {
3407                         data->have_temp |= 1 << (src - 1);
3408                         data->have_temp_fixed |= 1 << (src - 1);
3409                         data->reg_temp[0][src - 1] = reg_temp[i];
3410                         data->reg_temp[1][src - 1] = reg_temp_over[i];
3411                         data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3412                         if (reg_temp_crit_h && reg_temp_crit_h[i])
3413                                 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
3414                         else if (reg_temp_crit[src - 1])
3415                                 data->reg_temp[3][src - 1]
3416                                   = reg_temp_crit[src - 1];
3417                         if (reg_temp_crit_l && reg_temp_crit_l[i])
3418                                 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
3419                         data->reg_temp_config[src - 1] = reg_temp_config[i];
3420                         data->temp_src[src - 1] = src;
3421                         continue;
3422                 }
3423
3424                 if (s >= NUM_TEMP)
3425                         continue;
3426
3427                 /* Use dynamic index for other sources */
3428                 data->have_temp |= 1 << s;
3429                 data->reg_temp[0][s] = reg_temp[i];
3430                 data->reg_temp[1][s] = reg_temp_over[i];
3431                 data->reg_temp[2][s] = reg_temp_hyst[i];
3432                 data->reg_temp_config[s] = reg_temp_config[i];
3433                 if (reg_temp_crit_h && reg_temp_crit_h[i])
3434                         data->reg_temp[3][s] = reg_temp_crit_h[i];
3435                 else if (reg_temp_crit[src - 1])
3436                         data->reg_temp[3][s] = reg_temp_crit[src - 1];
3437                 if (reg_temp_crit_l && reg_temp_crit_l[i])
3438                         data->reg_temp[4][s] = reg_temp_crit_l[i];
3439
3440                 data->temp_src[s] = src;
3441                 s++;
3442         }
3443
3444 #ifdef USE_ALTERNATE
3445         /*
3446          * Go through the list of alternate temp registers and enable
3447          * if possible.
3448          * The temperature is already monitored if the respective bit in <mask>
3449          * is set.
3450          */
3451         for (i = 0; i < data->temp_label_num - 1; i++) {
3452                 if (!reg_temp_alternate[i])
3453                         continue;
3454                 if (mask & (1 << (i + 1)))
3455                         continue;
3456                 if (i < data->temp_fixed_num) {
3457                         if (data->have_temp & (1 << i))
3458                                 continue;
3459                         data->have_temp |= 1 << i;
3460                         data->have_temp_fixed |= 1 << i;
3461                         data->reg_temp[0][i] = reg_temp_alternate[i];
3462                         if (i < num_reg_temp) {
3463                                 data->reg_temp[1][i] = reg_temp_over[i];
3464                                 data->reg_temp[2][i] = reg_temp_hyst[i];
3465                         }
3466                         data->temp_src[i] = i + 1;
3467                         continue;
3468                 }
3469
3470                 if (s >= NUM_TEMP)      /* Abort if no more space */
3471                         break;
3472
3473                 data->have_temp |= 1 << s;
3474                 data->reg_temp[0][s] = reg_temp_alternate[i];
3475                 data->temp_src[s] = i + 1;
3476                 s++;
3477         }
3478 #endif /* USE_ALTERNATE */
3479
3480         /* Initialize the chip */
3481         nct6775_init_device(data);
3482
3483         err = superio_enter(sio_data->sioreg);
3484         if (err)
3485                 return err;
3486
3487         cr2a = superio_inb(sio_data->sioreg, 0x2a);
3488         switch (data->kind) {
3489         case nct6775:
3490                 data->have_vid = (cr2a & 0x40);
3491                 break;
3492         case nct6776:
3493                 data->have_vid = (cr2a & 0x60) == 0x40;
3494                 break;
3495         case nct6106:
3496         case nct6779:
3497                 break;
3498         }
3499
3500         /*
3501          * Read VID value
3502          * We can get the VID input values directly at logical device D 0xe3.
3503          */
3504         if (data->have_vid) {
3505                 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3506                 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3507                 data->vrm = vid_which_vrm();
3508         }
3509
3510         if (fan_debounce) {
3511                 u8 tmp;
3512
3513                 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3514                 tmp = superio_inb(sio_data->sioreg,
3515                                   NCT6775_REG_CR_FAN_DEBOUNCE);
3516                 switch (data->kind) {
3517                 case nct6106:
3518                         tmp |= 0xe0;
3519                         break;
3520                 case nct6775:
3521                         tmp |= 0x1e;
3522                         break;
3523                 case nct6776:
3524                 case nct6779:
3525                         tmp |= 0x3e;
3526                         break;
3527                 }
3528                 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3529                              tmp);
3530                 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3531                          data->name);
3532         }
3533
3534         nct6775_check_fan_inputs(sio_data, data);
3535
3536         superio_exit(sio_data->sioreg);
3537
3538         /* Read fan clock dividers immediately */
3539         nct6775_init_fan_common(dev, data);
3540
3541         /* Register sysfs hooks */
3542         group = nct6775_create_attr_group(dev, &nct6775_pwm_template_group,
3543                                           data->pwm_num);
3544         if (IS_ERR(group)) {
3545                 err = PTR_ERR(group);
3546                 goto exit_remove;
3547         }
3548         data->group_pwm = group;
3549
3550         group = nct6775_create_attr_group(dev, &nct6775_in_template_group,
3551                                           fls(data->have_in));
3552         if (IS_ERR(group)) {
3553                 err = PTR_ERR(group);
3554                 goto exit_remove;
3555         }
3556         data->group_in = group;
3557
3558         group = nct6775_create_attr_group(dev, &nct6775_fan_template_group,
3559                                           fls(data->has_fan));
3560         if (IS_ERR(group)) {
3561                 err = PTR_ERR(group);
3562                 goto exit_remove;
3563         }
3564         data->group_fan = group;
3565
3566         group = nct6775_create_attr_group(dev, &nct6775_temp_template_group,
3567                                           fls(data->have_temp));
3568         if (IS_ERR(group)) {
3569                 err = PTR_ERR(group);
3570                 goto exit_remove;
3571         }
3572         data->group_temp = group;
3573
3574         err = sysfs_create_group(&dev->kobj, &nct6775_group_other);
3575         if (err)
3576                 goto exit_remove;
3577
3578         data->hwmon_dev = hwmon_device_register(dev);
3579         if (IS_ERR(data->hwmon_dev)) {
3580                 err = PTR_ERR(data->hwmon_dev);
3581                 goto exit_remove;
3582         }
3583
3584         return 0;
3585
3586 exit_remove:
3587         nct6775_device_remove_files(dev);
3588         return err;
3589 }
3590
3591 static int nct6775_remove(struct platform_device *pdev)
3592 {
3593         struct nct6775_data *data = platform_get_drvdata(pdev);
3594
3595         hwmon_device_unregister(data->hwmon_dev);
3596         nct6775_device_remove_files(&pdev->dev);
3597
3598         return 0;
3599 }
3600
3601 #ifdef CONFIG_PM
3602 static int nct6775_suspend(struct device *dev)
3603 {
3604         struct nct6775_data *data = nct6775_update_device(dev);
3605         struct nct6775_sio_data *sio_data = dev->platform_data;
3606
3607         mutex_lock(&data->update_lock);
3608         data->vbat = nct6775_read_value(data, data->REG_VBAT);
3609         if (sio_data->kind == nct6775) {
3610                 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
3611                 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
3612         }
3613         mutex_unlock(&data->update_lock);
3614
3615         return 0;
3616 }
3617
3618 static int nct6775_resume(struct device *dev)
3619 {
3620         struct nct6775_data *data = dev_get_drvdata(dev);
3621         struct nct6775_sio_data *sio_data = dev->platform_data;
3622         int i, j;
3623
3624         mutex_lock(&data->update_lock);
3625         data->bank = 0xff;              /* Force initial bank selection */
3626
3627         /* Restore limits */
3628         for (i = 0; i < data->in_num; i++) {
3629                 if (!(data->have_in & (1 << i)))
3630                         continue;
3631
3632                 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
3633                                     data->in[i][1]);
3634                 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
3635                                     data->in[i][2]);
3636         }
3637
3638         for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
3639                 if (!(data->has_fan_min & (1 << i)))
3640                         continue;
3641
3642                 nct6775_write_value(data, data->REG_FAN_MIN[i],
3643                                     data->fan_min[i]);
3644         }
3645
3646         for (i = 0; i < NUM_TEMP; i++) {
3647                 if (!(data->have_temp & (1 << i)))
3648                         continue;
3649
3650                 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
3651                         if (data->reg_temp[j][i])
3652                                 nct6775_write_temp(data, data->reg_temp[j][i],
3653                                                    data->temp[j][i]);
3654         }
3655
3656         /* Restore other settings */
3657         nct6775_write_value(data, data->REG_VBAT, data->vbat);
3658         if (sio_data->kind == nct6775) {
3659                 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
3660                 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
3661         }
3662
3663         /* Force re-reading all values */
3664         data->valid = false;
3665         mutex_unlock(&data->update_lock);
3666
3667         return 0;
3668 }
3669
3670 static const struct dev_pm_ops nct6775_dev_pm_ops = {
3671         .suspend = nct6775_suspend,
3672         .resume = nct6775_resume,
3673 };
3674
3675 #define NCT6775_DEV_PM_OPS      (&nct6775_dev_pm_ops)
3676 #else
3677 #define NCT6775_DEV_PM_OPS      NULL
3678 #endif /* CONFIG_PM */
3679
3680 static struct platform_driver nct6775_driver = {
3681         .driver = {
3682                 .owner  = THIS_MODULE,
3683                 .name   = DRVNAME,
3684                 .pm     = NCT6775_DEV_PM_OPS,
3685         },
3686         .probe          = nct6775_probe,
3687         .remove         = nct6775_remove,
3688 };
3689
3690 static const char * const nct6775_sio_names[] __initconst = {
3691         "NCT6106D",
3692         "NCT6775F",
3693         "NCT6776D/F",
3694         "NCT6779D",
3695 };
3696
3697 /* nct6775_find() looks for a '627 in the Super-I/O config space */
3698 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
3699 {
3700         u16 val;
3701         int err;
3702         int addr;
3703
3704         err = superio_enter(sioaddr);
3705         if (err)
3706                 return err;
3707
3708         if (force_id)
3709                 val = force_id;
3710         else
3711                 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
3712                     | superio_inb(sioaddr, SIO_REG_DEVID + 1);
3713         switch (val & SIO_ID_MASK) {
3714         case SIO_NCT6106_ID:
3715                 sio_data->kind = nct6106;
3716                 break;
3717         case SIO_NCT6775_ID:
3718                 sio_data->kind = nct6775;
3719                 break;
3720         case SIO_NCT6776_ID:
3721                 sio_data->kind = nct6776;
3722                 break;
3723         case SIO_NCT6779_ID:
3724                 sio_data->kind = nct6779;
3725                 break;
3726         default:
3727                 if (val != 0xffff)
3728                         pr_debug("unsupported chip ID: 0x%04x\n", val);
3729                 superio_exit(sioaddr);
3730                 return -ENODEV;
3731         }
3732
3733         /* We have a known chip, find the HWM I/O address */
3734         superio_select(sioaddr, NCT6775_LD_HWM);
3735         val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
3736             | superio_inb(sioaddr, SIO_REG_ADDR + 1);
3737         addr = val & IOREGION_ALIGNMENT;
3738         if (addr == 0) {
3739                 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
3740                 superio_exit(sioaddr);
3741                 return -ENODEV;
3742         }
3743
3744         /* Activate logical device if needed */
3745         val = superio_inb(sioaddr, SIO_REG_ENABLE);
3746         if (!(val & 0x01)) {
3747                 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
3748                 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
3749         }
3750
3751         superio_exit(sioaddr);
3752         pr_info("Found %s or compatible chip at %#x:%#x\n",
3753                 nct6775_sio_names[sio_data->kind], sioaddr, addr);
3754         sio_data->sioreg = sioaddr;
3755
3756         return addr;
3757 }
3758
3759 /*
3760  * when Super-I/O functions move to a separate file, the Super-I/O
3761  * bus will manage the lifetime of the device and this module will only keep
3762  * track of the nct6775 driver. But since we platform_device_alloc(), we
3763  * must keep track of the device
3764  */
3765 static struct platform_device *pdev[2];
3766
3767 static int __init sensors_nct6775_init(void)
3768 {
3769         int i, err;
3770         bool found = false;
3771         int address;
3772         struct resource res;
3773         struct nct6775_sio_data sio_data;
3774         int sioaddr[2] = { 0x2e, 0x4e };
3775
3776         err = platform_driver_register(&nct6775_driver);
3777         if (err)
3778                 return err;
3779
3780         /*
3781          * initialize sio_data->kind and sio_data->sioreg.
3782          *
3783          * when Super-I/O functions move to a separate file, the Super-I/O
3784          * driver will probe 0x2e and 0x4e and auto-detect the presence of a
3785          * nct6775 hardware monitor, and call probe()
3786          */
3787         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
3788                 address = nct6775_find(sioaddr[i], &sio_data);
3789                 if (address <= 0)
3790                         continue;
3791
3792                 found = true;
3793
3794                 pdev[i] = platform_device_alloc(DRVNAME, address);
3795                 if (!pdev[i]) {
3796                         err = -ENOMEM;
3797                         goto exit_device_put;
3798                 }
3799
3800                 err = platform_device_add_data(pdev[i], &sio_data,
3801                                                sizeof(struct nct6775_sio_data));
3802                 if (err)
3803                         goto exit_device_put;
3804
3805                 memset(&res, 0, sizeof(res));
3806                 res.name = DRVNAME;
3807                 res.start = address + IOREGION_OFFSET;
3808                 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
3809                 res.flags = IORESOURCE_IO;
3810
3811                 err = acpi_check_resource_conflict(&res);
3812                 if (err) {
3813                         platform_device_put(pdev[i]);
3814                         pdev[i] = NULL;
3815                         continue;
3816                 }
3817
3818                 err = platform_device_add_resources(pdev[i], &res, 1);
3819                 if (err)
3820                         goto exit_device_put;
3821
3822                 /* platform_device_add calls probe() */
3823                 err = platform_device_add(pdev[i]);
3824                 if (err)
3825                         goto exit_device_put;
3826         }
3827         if (!found) {
3828                 err = -ENODEV;
3829                 goto exit_unregister;
3830         }
3831
3832         return 0;
3833
3834 exit_device_put:
3835         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
3836                 if (pdev[i])
3837                         platform_device_put(pdev[i]);
3838         }
3839 exit_unregister:
3840         platform_driver_unregister(&nct6775_driver);
3841         return err;
3842 }
3843
3844 static void __exit sensors_nct6775_exit(void)
3845 {
3846         int i;
3847
3848         for (i = 0; i < ARRAY_SIZE(pdev); i++) {
3849                 if (pdev[i])
3850                         platform_device_unregister(pdev[i]);
3851         }
3852         platform_driver_unregister(&nct6775_driver);
3853 }
3854
3855 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
3856 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
3857 MODULE_LICENSE("GPL");
3858
3859 module_init(sensors_nct6775_init);
3860 module_exit(sensors_nct6775_exit);