2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2011 Jean Delvare <khali@linux-fr.org>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 * Supports the following chips:
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6775f 9 4 3 9 0xb470 0xc1 0x5ca3
37 * nct6776f 9 5 3 9 0xc330 0xc1 0x5ca3
38 * nct6779d 15 5 5 7 0xc560 0xc1 0x5ca3
41 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
43 #include <linux/module.h>
44 #include <linux/init.h>
45 #include <linux/slab.h>
46 #include <linux/jiffies.h>
47 #include <linux/platform_device.h>
48 #include <linux/hwmon.h>
49 #include <linux/hwmon-sysfs.h>
50 #include <linux/hwmon-vid.h>
51 #include <linux/err.h>
52 #include <linux/mutex.h>
53 #include <linux/acpi.h>
57 enum kinds { nct6775, nct6776, nct6779 };
59 /* used to set data->name = nct6775_device_names[data->sio_kind] */
60 static const char * const nct6775_device_names[] = {
66 static unsigned short force_id;
67 module_param(force_id, ushort, 0);
68 MODULE_PARM_DESC(force_id, "Override the detected device ID");
70 static unsigned short fan_debounce;
71 module_param(fan_debounce, ushort, 0);
72 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
74 #define DRVNAME "nct6775"
77 * Super-I/O constants and functions
80 #define NCT6775_LD_ACPI 0x0a
81 #define NCT6775_LD_HWM 0x0b
82 #define NCT6775_LD_VID 0x0d
84 #define SIO_REG_LDSEL 0x07 /* Logical device select */
85 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
86 #define SIO_REG_EN_VRM10 0x2C /* GPIO3, GPIO4 selection */
87 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
88 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
89 #define SIO_REG_VID_CTRL 0xF0 /* VID control */
90 #define SIO_REG_VID_DATA 0xF1 /* VID data */
92 #define SIO_NCT6775_ID 0xb470
93 #define SIO_NCT6776_ID 0xc330
94 #define SIO_NCT6779_ID 0xc560
95 #define SIO_ID_MASK 0xFFF0
98 superio_outb(int ioreg, int reg, int val)
101 outb(val, ioreg + 1);
105 superio_inb(int ioreg, int reg)
108 return inb(ioreg + 1);
112 superio_select(int ioreg, int ld)
114 outb(SIO_REG_LDSEL, ioreg);
119 superio_enter(int ioreg)
126 superio_exit(int ioreg)
130 outb(0x02, ioreg + 1);
137 #define IOREGION_ALIGNMENT (~7)
138 #define IOREGION_OFFSET 5
139 #define IOREGION_LENGTH 2
140 #define ADDR_REG_OFFSET 0
141 #define DATA_REG_OFFSET 1
143 #define NCT6775_REG_BANK 0x4E
144 #define NCT6775_REG_CONFIG 0x40
147 * Not currently used:
148 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
149 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
150 * REG_MAN_ID is at port 0x4f
151 * REG_CHIP_ID is at port 0x58
154 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
156 /* Voltage min/max registers for nr=7..14 are in bank 5 */
158 static const u16 NCT6775_REG_IN_MAX[] = {
159 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556 };
160 static const u16 NCT6775_REG_IN_MIN[] = {
161 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557 };
162 static const u16 NCT6775_REG_IN[] = {
163 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
166 static const u16 NCT6779_REG_IN[] = {
167 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
168 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e
171 #define NCT6775_REG_VBAT 0x5D
173 #define NCT6775_REG_FANDIV1 0x506
174 #define NCT6775_REG_FANDIV2 0x507
176 #define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
178 static const u16 NCT6775_REG_ALARM[6] = { 0x459, 0x45A, 0x45B };
179 static const u16 NCT6779_REG_ALARM[6] = { 0x459, 0x45A, 0x45B, 0x568 };
181 #define NCT6775_REG_CASEOPEN 0x42
183 static const u8 NCT6775_CASEOPEN_MASK[] = { 0x10, 0x00 };
184 static const u8 NCT6776_CASEOPEN_MASK[] = { 0x10, 0x40 };
186 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
187 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
189 /* DC or PWM output fan configuration */
190 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
191 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
193 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0 };
194 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0 };
196 /* Advanced Fan control, some values are common for all fans */
198 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301, 0x801, 0x901 };
199 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302, 0x802, 0x902 };
200 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
201 0x103, 0x203, 0x303, 0x803, 0x903 };
202 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
203 0x104, 0x204, 0x304, 0x804, 0x904 };
204 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
205 0x105, 0x205, 0x305, 0x805, 0x905 };
206 static const u16 NCT6775_REG_FAN_START_OUTPUT[]
207 = { 0x106, 0x206, 0x306, 0x806, 0x906 };
208 static const u16 NCT6775_REG_FAN_STOP_TIME[]
209 = { 0x107, 0x207, 0x307, 0x807, 0x907 };
210 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309, 0x809, 0x909 };
211 static const u16 NCT6775_REG_PWM_READ[] = { 0x01, 0x03, 0x11, 0x13, 0x15 };
213 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
215 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642};
217 static const u16 NCT6779_REG_TOLERANCE_H[]
218 = { 0x10c, 0x20c, 0x30c, 0x40c, 0x50c };
220 static const u16 NCT6779_REG_FAN[] = { 0x4c0, 0x4c2, 0x4c4, 0x4c6, 0x4c8 };
222 static const u16 NCT6775_REG_TEMP[11]
223 = { 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d, 0x73, 0x75, 0x77 };
224 static const u16 NCT6775_REG_TEMP_CONFIG[11]
225 = { 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
226 static const u16 NCT6775_REG_TEMP_HYST[11]
227 = { 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
228 static const u16 NCT6775_REG_TEMP_OVER[11]
229 = { 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
230 static const u16 NCT6775_REG_TEMP_SOURCE[11]
231 = { 0x621, 0x622, 0x623, 0x624, 0x625, 0x626, 0x100, 0x200, 0x300,
234 static const u16 NCT6776_REG_TEMP_CONFIG[11]
235 = { 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
237 static const u16 NCT6779_REG_TEMP[11]
238 = { 0x27, 0x150, 0, 0, 0, 0, 0x73, 0x75, 0x77, 0x79, 0x7b };
240 static const u16 NCT6779_REG_TEMP_SOURCE_2[11]
241 = { 0, 0, 0, 0, 0, 0, 0x139, 0x239, 0x339, 0x839, 0x939 };
243 static const u16 NCT6775_REG_AUTO_TEMP[]
244 = { 0x121, 0x221, 0x321, 0x821, 0x921 };
245 static const u16 NCT6775_REG_AUTO_PWM[]
246 = { 0x127, 0x227, 0x327, 0x827, 0x927 };
248 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
249 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
251 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
253 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
254 0x135, 0x235, 0x335, 0x835, 0x935 };
255 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
256 0x138, 0x238, 0x338, 0x838, 0x938 };
258 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
259 0x136, 0x236, 0x336, 0x836, 0x936 };
260 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
261 0x137, 0x237, 0x337, 0x837, 0x937 };
263 static const char *const nct6775_temp_label[] = {
277 "PCH_CHIP_CPU_MAX_TEMP",
287 static const char *const nct6776_temp_label[] = {
302 "PCH_CHIP_CPU_MAX_TEMP",
313 static const char *const nct6779_temp_label[] = {
332 "PCH_CHIP_CPU_MAX_TEMP",
343 #define NUM_REG_TEMP ARRAY_SIZE(NCT6775_REG_TEMP)
345 static inline int reg_to_pwm_enable(int pwm, int mode)
347 if (mode == 0 && pwm == 255)
349 if (mode == 3) /* SmartFan III */
350 return 2; /* convert to thermal cruise */
353 return 4; /* SmartFan IV */
356 static inline int pwm_enable_to_reg(int mode)
369 /* 1 is DC mode, output in ms */
370 static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
372 return mode ? 400 * reg : 100 * reg;
375 static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
377 return SENSORS_LIMIT((mode ? (msec + 200) / 400 :
378 (msec + 50) / 100), 1, 255);
381 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
383 if (reg == 0 || reg == 255)
385 return 1350000U / (reg << divreg);
388 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
390 if ((reg & 0xff1f) == 0xff1f)
393 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
398 return 1350000U / reg;
401 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
403 if (reg == 0 || reg == 0xffff)
407 * Even though the registers are 16 bit wide, the fan divisor
410 return 1350000U / (reg << divreg);
413 static inline unsigned int
420 * Some of the voltage inputs have internal scaling, the tables below
421 * contain 8 (the ADC LSB in mV) * scaling factor * 100
423 static const u16 scale_in[15] = {
424 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
428 static inline long in_from_reg(u8 reg, u8 nr)
430 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
433 static inline u8 in_to_reg(u32 val, u8 nr)
435 return SENSORS_LIMIT(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0,
440 * Data structures and manipulation thereof
443 struct nct6775_data {
444 int addr; /* IO base of hw monitor block */
448 struct device *hwmon_dev;
451 u16 reg_temp[3][NUM_REG_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst */
452 u16 reg_temp_config[NUM_REG_TEMP];
453 u8 temp_src[2][NUM_REG_TEMP];
454 const char * const *temp_label;
457 const u16 *REG_IN_MINMAX[2];
459 const u16 *REG_TARGET;
461 const u16 *REG_FAN_MODE;
462 const u16 *REG_FAN_MIN;
463 const u16 *REG_FAN_TIME[3];
465 const u8 *REG_PWM_MODE;
466 const u8 *PWM_MODE_MASK;
468 const u16 *REG_PWM[3];
469 const u16 *REG_PWM_READ;
471 const u16 *REG_AUTO_TEMP;
472 const u16 *REG_AUTO_PWM;
474 const u16 *REG_CRITICAL_TEMP;
475 const u16 *REG_CRITICAL_TEMP_TOLERANCE;
477 const u16 *REG_TEMP_SOURCE;
478 const u16 *REG_TEMP_SOURCE_2;
480 const u16 *REG_ALARM;
483 const u8 *CASEOPEN_MASK;
485 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
486 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
488 struct mutex update_lock;
489 char valid; /* !=0 if following fields are valid */
490 unsigned long last_updated; /* In jiffies */
492 /* Register values */
493 u8 bank; /* current register bank */
494 u8 in_num; /* number of in inputs we have */
495 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
500 u8 has_fan; /* some fan inputs can be disabled */
501 u8 has_fan_min; /* some fans don't have min register */
504 s16 temp[3][11]; /* 0=temp, 1=temp_over, 2=temp_hyst */
508 u8 pwm_mode[5]; /* 1->DC variable voltage, 0->PWM variable duty cycle */
509 u8 pwm_enable[5]; /* 0->off
511 * 2->thermal cruise mode (also called SmartFan I)
512 * 3->fan speed cruise mode
513 * 4->enhanced variable thermal cruise (also called
516 u8 pwm_num; /* number of pwm */
517 u8 pwm[3][5]; /* [0]=pwm, [1]=fan_start_output, [2]=fan_stop_output */
521 u8 fan_time[3][5]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
523 /* Automatic fan speed control registers */
535 struct nct6775_sio_data {
540 static bool is_word_sized(struct nct6775_data *data, u16 reg)
542 switch (data->kind) {
545 return (((reg & 0xff00) == 0x100 ||
546 (reg & 0xff00) == 0x200) &&
547 ((reg & 0x00ff) == 0x50 ||
548 (reg & 0x00ff) == 0x53 ||
549 (reg & 0x00ff) == 0x55)) ||
550 (reg & 0xfff0) == 0x630 ||
551 reg == 0x640 || reg == 0x642 ||
552 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
553 reg == 0x73 || reg == 0x75 || reg == 0x77;
555 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
556 ((reg & 0xfff0) == 0x4c0 && (reg & 0x000f) < 0x09) ||
557 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
558 reg == 0x640 || reg == 0x642 ||
559 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
566 * On older chips, only registers 0x50-0x5f are banked.
567 * On more recent chips, all registers are banked.
568 * Assume that is the case and set the bank number for each access.
569 * Cache the bank number so it only needs to be set if it changes.
571 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
574 if (data->bank != bank) {
575 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
576 outb_p(bank, data->addr + DATA_REG_OFFSET);
581 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
583 int res, word_sized = is_word_sized(data, reg);
585 mutex_lock(&data->lock);
587 nct6775_set_bank(data, reg);
588 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
589 res = inb_p(data->addr + DATA_REG_OFFSET);
591 outb_p((reg & 0xff) + 1,
592 data->addr + ADDR_REG_OFFSET);
593 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
596 mutex_unlock(&data->lock);
600 static int nct6775_write_value(struct nct6775_data *data, u16 reg,
603 int word_sized = is_word_sized(data, reg);
605 mutex_lock(&data->lock);
607 nct6775_set_bank(data, reg);
608 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
610 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
611 outb_p((reg & 0xff) + 1,
612 data->addr + ADDR_REG_OFFSET);
614 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
616 mutex_unlock(&data->lock);
620 /* We left-align 8-bit temperature values to make the code simpler */
621 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
625 res = nct6775_read_value(data, reg);
626 if (!is_word_sized(data, reg))
632 static int nct6775_write_temp(struct nct6775_data *data, u16 reg,
635 if (!is_word_sized(data, reg))
637 return nct6775_write_value(data, reg, value);
640 /* This function assumes that the caller holds data->update_lock */
641 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
647 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
648 | (data->fan_div[0] & 0x7);
649 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
652 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
653 | ((data->fan_div[1] << 4) & 0x70);
654 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
656 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
657 | (data->fan_div[2] & 0x7);
658 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
661 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
662 | ((data->fan_div[3] << 4) & 0x70);
663 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
668 static void nct6775_write_fan_div_common(struct device *dev,
669 struct nct6775_data *data, int nr)
671 if (data->kind == nct6775)
672 nct6775_write_fan_div(data, nr);
675 static void nct6775_update_fan_div(struct nct6775_data *data)
679 i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
680 data->fan_div[0] = i & 0x7;
681 data->fan_div[1] = (i & 0x70) >> 4;
682 i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
683 data->fan_div[2] = i & 0x7;
684 if (data->has_fan & (1<<3))
685 data->fan_div[3] = (i & 0x70) >> 4;
688 static void nct6775_update_fan_div_common(struct device *dev,
689 struct nct6775_data *data)
691 if (data->kind == nct6775)
692 nct6775_update_fan_div(data);
695 static void nct6775_update_pwm(struct device *dev)
697 struct nct6775_data *data = dev_get_drvdata(dev);
702 for (i = 0; i < data->pwm_num; i++) {
703 if (!(data->has_pwm & (1 << i)))
706 duty_is_dc = data->REG_PWM_MODE[i] &&
707 (nct6775_read_value(data, data->REG_PWM_MODE[i])
708 & data->PWM_MODE_MASK[i]);
709 data->pwm_mode[i] = duty_is_dc;
711 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
712 for (j = 0; j < 3; j++)
714 = nct6775_read_value(data, data->REG_PWM[j][i]);
716 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
717 (fanmodecfg >> 4) & 7);
719 data->tolerance[i][0] = fanmodecfg & 0x0f;
720 if (data->kind == nct6779) {
721 tol = nct6775_read_value(data,
722 NCT6779_REG_TOLERANCE_H[i]);
723 data->tolerance[i][0] |= (tol & 0x70) >> 1;
725 data->tolerance[i][1] =
726 nct6775_read_value(data,
727 data->REG_CRITICAL_TEMP_TOLERANCE[i]);
731 static void nct6775_update_pwm_limits(struct device *dev)
733 struct nct6775_data *data = dev_get_drvdata(dev);
737 for (i = 0; i < data->pwm_num; i++) {
738 if (!(data->has_pwm & (1 << i)))
741 for (j = 0; j < 3; j++) {
742 data->fan_time[j][i] =
743 nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
746 data->target_temp[i] =
747 nct6775_read_value(data, data->REG_TARGET[i]) &
748 (data->pwm_mode[i] ? 0xff : 0x7f);
749 for (j = 0; j < data->auto_pwm_num; j++) {
750 data->auto_pwm[i][j] =
751 nct6775_read_value(data,
752 NCT6775_AUTO_PWM(data, i, j));
753 data->auto_temp[i][j] =
754 nct6775_read_value(data,
755 NCT6775_AUTO_TEMP(data, i, j));
757 /* handle critical auto_pwm temperature data */
758 data->auto_temp[i][data->auto_pwm_num] =
759 nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
761 switch (data->kind) {
763 reg = nct6775_read_value(data,
764 NCT6775_REG_CRITICAL_ENAB[i]);
765 data->auto_pwm[i][data->auto_pwm_num] =
766 (reg & 0x02) ? 0xff : 0x00;
769 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
772 reg = nct6775_read_value(data,
773 NCT6779_REG_CRITICAL_PWM_ENABLE[i]);
775 data->auto_pwm[i][data->auto_pwm_num] =
776 nct6775_read_value(data,
777 NCT6779_REG_CRITICAL_PWM[i]);
779 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
785 static struct nct6775_data *nct6775_update_device(struct device *dev)
787 struct nct6775_data *data = dev_get_drvdata(dev);
790 mutex_lock(&data->update_lock);
792 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
794 /* Fan clock dividers */
795 nct6775_update_fan_div_common(dev, data);
797 /* Measured voltages and limits */
798 for (i = 0; i < data->in_num; i++) {
799 if (!(data->have_in & (1 << i)))
802 data->in[i][0] = nct6775_read_value(data,
804 data->in[i][1] = nct6775_read_value(data,
805 data->REG_IN_MINMAX[0][i]);
806 data->in[i][2] = nct6775_read_value(data,
807 data->REG_IN_MINMAX[1][i]);
810 /* Measured fan speeds and limits */
811 for (i = 0; i < 5; i++) {
814 if (!(data->has_fan & (1 << i)))
817 reg = nct6775_read_value(data, data->REG_FAN[i]);
818 data->rpm[i] = data->fan_from_reg(reg,
821 if (data->has_fan_min & (1 << i))
822 data->fan_min[i] = nct6775_read_value(data,
823 data->REG_FAN_MIN[i]);
826 * If we failed to measure the fan speed and clock
827 * divider can be increased, let's try that for next
830 if (data->has_fan_div
831 && (reg >= 0xff || (data->kind == nct6775
833 && data->fan_div[i] < 0x07) {
834 dev_dbg(dev, "Increasing fan%d "
835 "clock divider from %u to %u\n",
836 i + 1, div_from_reg(data->fan_div[i]),
837 div_from_reg(data->fan_div[i] + 1));
839 nct6775_write_fan_div_common(dev, data, i);
840 /* Preserve min limit if possible */
841 if ((data->has_fan_min & (1 << i))
842 && data->fan_min[i] >= 2
843 && data->fan_min[i] != 255)
844 nct6775_write_value(data,
845 data->REG_FAN_MIN[i],
846 (data->fan_min[i] /= 2));
850 nct6775_update_pwm(dev);
851 nct6775_update_pwm_limits(dev);
853 /* Measured temperatures and limits */
854 for (i = 0; i < NUM_REG_TEMP; i++) {
855 if (!(data->have_temp & (1 << i)))
857 for (j = 0; j < 3; j++) {
858 if (data->reg_temp[j][i])
860 = nct6775_read_temp(data,
861 data->reg_temp[j][i]);
866 for (i = 0; i < 6; i++) {
868 if (!data->REG_ALARM[i])
870 alarm = nct6775_read_value(data, data->REG_ALARM[i]);
871 data->alarms |= (((u64)alarm) << (i << 3));
874 data->caseopen = nct6775_read_value(data, data->REG_CASEOPEN);
876 data->last_updated = jiffies;
880 mutex_unlock(&data->update_lock);
885 * Sysfs callback functions
888 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
890 struct nct6775_data *data = nct6775_update_device(dev);
891 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
893 int index = sattr->index;
894 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
898 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
901 struct nct6775_data *data = dev_get_drvdata(dev);
902 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
904 int index = sattr->index;
906 int err = kstrtoul(buf, 10, &val);
909 mutex_lock(&data->update_lock);
910 data->in[nr][index] = in_to_reg(val, nr);
911 nct6775_write_value(data, data->REG_IN_MINMAX[index-1][nr],
912 data->in[nr][index]);
913 mutex_unlock(&data->update_lock);
917 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
920 struct nct6775_data *data = nct6775_update_device(dev);
921 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
922 int nr = sensor_attr->index;
923 return sprintf(buf, "%u\n",
924 (unsigned int)((data->alarms >> nr) & 0x01));
927 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in_reg, NULL, 0, 0);
928 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in_reg, NULL, 1, 0);
929 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in_reg, NULL, 2, 0);
930 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in_reg, NULL, 3, 0);
931 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in_reg, NULL, 4, 0);
932 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in_reg, NULL, 5, 0);
933 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in_reg, NULL, 6, 0);
934 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in_reg, NULL, 7, 0);
935 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in_reg, NULL, 8, 0);
936 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in_reg, NULL, 9, 0);
937 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in_reg, NULL, 10, 0);
938 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in_reg, NULL, 11, 0);
939 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in_reg, NULL, 12, 0);
940 static SENSOR_DEVICE_ATTR_2(in13_input, S_IRUGO, show_in_reg, NULL, 13, 0);
941 static SENSOR_DEVICE_ATTR_2(in14_input, S_IRUGO, show_in_reg, NULL, 14, 0);
943 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
944 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
945 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
946 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
947 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
948 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21);
949 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20);
950 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
951 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
952 static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 24);
953 static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 25);
954 static SENSOR_DEVICE_ATTR(in11_alarm, S_IRUGO, show_alarm, NULL, 26);
955 static SENSOR_DEVICE_ATTR(in12_alarm, S_IRUGO, show_alarm, NULL, 27);
956 static SENSOR_DEVICE_ATTR(in13_alarm, S_IRUGO, show_alarm, NULL, 28);
957 static SENSOR_DEVICE_ATTR(in14_alarm, S_IRUGO, show_alarm, NULL, 29);
959 static SENSOR_DEVICE_ATTR_2(in0_min, S_IWUSR | S_IRUGO, show_in_reg,
961 static SENSOR_DEVICE_ATTR_2(in1_min, S_IWUSR | S_IRUGO, show_in_reg,
963 static SENSOR_DEVICE_ATTR_2(in2_min, S_IWUSR | S_IRUGO, show_in_reg,
965 static SENSOR_DEVICE_ATTR_2(in3_min, S_IWUSR | S_IRUGO, show_in_reg,
967 static SENSOR_DEVICE_ATTR_2(in4_min, S_IWUSR | S_IRUGO, show_in_reg,
969 static SENSOR_DEVICE_ATTR_2(in5_min, S_IWUSR | S_IRUGO, show_in_reg,
971 static SENSOR_DEVICE_ATTR_2(in6_min, S_IWUSR | S_IRUGO, show_in_reg,
973 static SENSOR_DEVICE_ATTR_2(in7_min, S_IWUSR | S_IRUGO, show_in_reg,
975 static SENSOR_DEVICE_ATTR_2(in8_min, S_IWUSR | S_IRUGO, show_in_reg,
977 static SENSOR_DEVICE_ATTR_2(in9_min, S_IWUSR | S_IRUGO, show_in_reg,
979 static SENSOR_DEVICE_ATTR_2(in10_min, S_IWUSR | S_IRUGO, show_in_reg,
980 store_in_reg, 10, 1);
981 static SENSOR_DEVICE_ATTR_2(in11_min, S_IWUSR | S_IRUGO, show_in_reg,
982 store_in_reg, 11, 1);
983 static SENSOR_DEVICE_ATTR_2(in12_min, S_IWUSR | S_IRUGO, show_in_reg,
984 store_in_reg, 12, 1);
985 static SENSOR_DEVICE_ATTR_2(in13_min, S_IWUSR | S_IRUGO, show_in_reg,
986 store_in_reg, 13, 1);
987 static SENSOR_DEVICE_ATTR_2(in14_min, S_IWUSR | S_IRUGO, show_in_reg,
988 store_in_reg, 14, 1);
990 static SENSOR_DEVICE_ATTR_2(in0_max, S_IWUSR | S_IRUGO, show_in_reg,
992 static SENSOR_DEVICE_ATTR_2(in1_max, S_IWUSR | S_IRUGO, show_in_reg,
994 static SENSOR_DEVICE_ATTR_2(in2_max, S_IWUSR | S_IRUGO, show_in_reg,
996 static SENSOR_DEVICE_ATTR_2(in3_max, S_IWUSR | S_IRUGO, show_in_reg,
998 static SENSOR_DEVICE_ATTR_2(in4_max, S_IWUSR | S_IRUGO, show_in_reg,
1000 static SENSOR_DEVICE_ATTR_2(in5_max, S_IWUSR | S_IRUGO, show_in_reg,
1001 store_in_reg, 5, 2);
1002 static SENSOR_DEVICE_ATTR_2(in6_max, S_IWUSR | S_IRUGO, show_in_reg,
1003 store_in_reg, 6, 2);
1004 static SENSOR_DEVICE_ATTR_2(in7_max, S_IWUSR | S_IRUGO, show_in_reg,
1005 store_in_reg, 7, 2);
1006 static SENSOR_DEVICE_ATTR_2(in8_max, S_IWUSR | S_IRUGO, show_in_reg,
1007 store_in_reg, 8, 2);
1008 static SENSOR_DEVICE_ATTR_2(in9_max, S_IWUSR | S_IRUGO, show_in_reg,
1009 store_in_reg, 9, 2);
1010 static SENSOR_DEVICE_ATTR_2(in10_max, S_IWUSR | S_IRUGO, show_in_reg,
1011 store_in_reg, 10, 2);
1012 static SENSOR_DEVICE_ATTR_2(in11_max, S_IWUSR | S_IRUGO, show_in_reg,
1013 store_in_reg, 11, 2);
1014 static SENSOR_DEVICE_ATTR_2(in12_max, S_IWUSR | S_IRUGO, show_in_reg,
1015 store_in_reg, 12, 2);
1016 static SENSOR_DEVICE_ATTR_2(in13_max, S_IWUSR | S_IRUGO, show_in_reg,
1017 store_in_reg, 13, 2);
1018 static SENSOR_DEVICE_ATTR_2(in14_max, S_IWUSR | S_IRUGO, show_in_reg,
1019 store_in_reg, 14, 2);
1021 static struct attribute *nct6775_attributes_in[15][5] = {
1023 &sensor_dev_attr_in0_input.dev_attr.attr,
1024 &sensor_dev_attr_in0_min.dev_attr.attr,
1025 &sensor_dev_attr_in0_max.dev_attr.attr,
1026 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1030 &sensor_dev_attr_in1_input.dev_attr.attr,
1031 &sensor_dev_attr_in1_min.dev_attr.attr,
1032 &sensor_dev_attr_in1_max.dev_attr.attr,
1033 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1037 &sensor_dev_attr_in2_input.dev_attr.attr,
1038 &sensor_dev_attr_in2_min.dev_attr.attr,
1039 &sensor_dev_attr_in2_max.dev_attr.attr,
1040 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1044 &sensor_dev_attr_in3_input.dev_attr.attr,
1045 &sensor_dev_attr_in3_min.dev_attr.attr,
1046 &sensor_dev_attr_in3_max.dev_attr.attr,
1047 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1051 &sensor_dev_attr_in4_input.dev_attr.attr,
1052 &sensor_dev_attr_in4_min.dev_attr.attr,
1053 &sensor_dev_attr_in4_max.dev_attr.attr,
1054 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1058 &sensor_dev_attr_in5_input.dev_attr.attr,
1059 &sensor_dev_attr_in5_min.dev_attr.attr,
1060 &sensor_dev_attr_in5_max.dev_attr.attr,
1061 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1065 &sensor_dev_attr_in6_input.dev_attr.attr,
1066 &sensor_dev_attr_in6_min.dev_attr.attr,
1067 &sensor_dev_attr_in6_max.dev_attr.attr,
1068 &sensor_dev_attr_in6_alarm.dev_attr.attr,
1072 &sensor_dev_attr_in7_input.dev_attr.attr,
1073 &sensor_dev_attr_in7_min.dev_attr.attr,
1074 &sensor_dev_attr_in7_max.dev_attr.attr,
1075 &sensor_dev_attr_in7_alarm.dev_attr.attr,
1079 &sensor_dev_attr_in8_input.dev_attr.attr,
1080 &sensor_dev_attr_in8_min.dev_attr.attr,
1081 &sensor_dev_attr_in8_max.dev_attr.attr,
1082 &sensor_dev_attr_in8_alarm.dev_attr.attr,
1086 &sensor_dev_attr_in9_input.dev_attr.attr,
1087 &sensor_dev_attr_in9_min.dev_attr.attr,
1088 &sensor_dev_attr_in9_max.dev_attr.attr,
1089 &sensor_dev_attr_in9_alarm.dev_attr.attr,
1093 &sensor_dev_attr_in10_input.dev_attr.attr,
1094 &sensor_dev_attr_in10_min.dev_attr.attr,
1095 &sensor_dev_attr_in10_max.dev_attr.attr,
1096 &sensor_dev_attr_in10_alarm.dev_attr.attr,
1100 &sensor_dev_attr_in11_input.dev_attr.attr,
1101 &sensor_dev_attr_in11_min.dev_attr.attr,
1102 &sensor_dev_attr_in11_max.dev_attr.attr,
1103 &sensor_dev_attr_in11_alarm.dev_attr.attr,
1107 &sensor_dev_attr_in12_input.dev_attr.attr,
1108 &sensor_dev_attr_in12_min.dev_attr.attr,
1109 &sensor_dev_attr_in12_max.dev_attr.attr,
1110 &sensor_dev_attr_in12_alarm.dev_attr.attr,
1114 &sensor_dev_attr_in13_input.dev_attr.attr,
1115 &sensor_dev_attr_in13_min.dev_attr.attr,
1116 &sensor_dev_attr_in13_max.dev_attr.attr,
1117 &sensor_dev_attr_in13_alarm.dev_attr.attr,
1121 &sensor_dev_attr_in14_input.dev_attr.attr,
1122 &sensor_dev_attr_in14_min.dev_attr.attr,
1123 &sensor_dev_attr_in14_max.dev_attr.attr,
1124 &sensor_dev_attr_in14_alarm.dev_attr.attr,
1129 static const struct attribute_group nct6775_group_in[15] = {
1130 { .attrs = nct6775_attributes_in[0] },
1131 { .attrs = nct6775_attributes_in[1] },
1132 { .attrs = nct6775_attributes_in[2] },
1133 { .attrs = nct6775_attributes_in[3] },
1134 { .attrs = nct6775_attributes_in[4] },
1135 { .attrs = nct6775_attributes_in[5] },
1136 { .attrs = nct6775_attributes_in[6] },
1137 { .attrs = nct6775_attributes_in[7] },
1138 { .attrs = nct6775_attributes_in[8] },
1139 { .attrs = nct6775_attributes_in[9] },
1140 { .attrs = nct6775_attributes_in[10] },
1141 { .attrs = nct6775_attributes_in[11] },
1142 { .attrs = nct6775_attributes_in[12] },
1143 { .attrs = nct6775_attributes_in[13] },
1144 { .attrs = nct6775_attributes_in[14] },
1148 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1150 struct nct6775_data *data = nct6775_update_device(dev);
1151 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1152 int nr = sensor_attr->index;
1153 return sprintf(buf, "%d\n", data->rpm[nr]);
1157 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1159 struct nct6775_data *data = nct6775_update_device(dev);
1160 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1161 int nr = sensor_attr->index;
1162 return sprintf(buf, "%d\n",
1163 data->fan_from_reg_min(data->fan_min[nr],
1164 data->fan_div[nr]));
1168 show_fan_div(struct device *dev, struct device_attribute *attr,
1171 struct nct6775_data *data = nct6775_update_device(dev);
1172 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1173 int nr = sensor_attr->index;
1174 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1178 store_fan_min(struct device *dev, struct device_attribute *attr,
1179 const char *buf, size_t count)
1181 struct nct6775_data *data = dev_get_drvdata(dev);
1182 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1183 int nr = sensor_attr->index;
1189 err = kstrtoul(buf, 10, &val);
1193 mutex_lock(&data->update_lock);
1194 if (!data->has_fan_div) {
1196 * Only NCT6776F for now, so we know that this is a 13 bit
1204 val = 1350000U / val;
1205 val = (val & 0x1f) | ((val << 3) & 0xff00);
1207 data->fan_min[nr] = val;
1208 goto write_min; /* Leave fan divider alone */
1211 /* No min limit, alarm disabled */
1212 data->fan_min[nr] = 255;
1213 new_div = data->fan_div[nr]; /* No change */
1214 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1217 reg = 1350000U / val;
1218 if (reg >= 128 * 255) {
1220 * Speed below this value cannot possibly be represented,
1221 * even with the highest divider (128)
1223 data->fan_min[nr] = 254;
1224 new_div = 7; /* 128 == (1 << 7) */
1225 dev_warn(dev, "fan%u low limit %lu below minimum %u, set to "
1226 "minimum\n", nr + 1, val,
1227 data->fan_from_reg_min(254, 7));
1230 * Speed above this value cannot possibly be represented,
1231 * even with the lowest divider (1)
1233 data->fan_min[nr] = 1;
1234 new_div = 0; /* 1 == (1 << 0) */
1235 dev_warn(dev, "fan%u low limit %lu above maximum %u, set to "
1236 "maximum\n", nr + 1, val,
1237 data->fan_from_reg_min(1, 0));
1240 * Automatically pick the best divider, i.e. the one such
1241 * that the min limit will correspond to a register value
1242 * in the 96..192 range
1245 while (reg > 192 && new_div < 7) {
1249 data->fan_min[nr] = reg;
1254 * Write both the fan clock divider (if it changed) and the new
1255 * fan min (unconditionally)
1257 if (new_div != data->fan_div[nr]) {
1258 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1259 nr + 1, div_from_reg(data->fan_div[nr]),
1260 div_from_reg(new_div));
1261 data->fan_div[nr] = new_div;
1262 nct6775_write_fan_div_common(dev, data, nr);
1263 /* Give the chip time to sample a new speed value */
1264 data->last_updated = jiffies;
1267 nct6775_write_value(data, data->REG_FAN_MIN[nr],
1269 mutex_unlock(&data->update_lock);
1274 static struct sensor_device_attribute sda_fan_input[] = {
1275 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
1276 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
1277 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
1278 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
1279 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
1282 static struct sensor_device_attribute sda_fan_alarm[] = {
1283 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
1284 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
1285 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
1286 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),
1287 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),
1290 static struct sensor_device_attribute sda_fan_min[] = {
1291 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
1293 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
1295 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
1297 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
1299 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
1303 static struct sensor_device_attribute sda_fan_div[] = {
1304 SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
1305 SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
1306 SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
1307 SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
1308 SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
1312 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1314 struct nct6775_data *data = nct6775_update_device(dev);
1315 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1316 int nr = sensor_attr->index;
1317 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[0][nr]]);
1321 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1323 struct nct6775_data *data = nct6775_update_device(dev);
1324 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1326 int index = sattr->index;
1328 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1332 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1335 struct nct6775_data *data = dev_get_drvdata(dev);
1336 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1338 int index = sattr->index;
1342 err = kstrtol(buf, 10, &val);
1346 mutex_lock(&data->update_lock);
1347 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1348 nct6775_write_temp(data, data->reg_temp[index][nr],
1349 data->temp[index][nr]);
1350 mutex_unlock(&data->update_lock);
1355 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1357 struct nct6775_data *data = nct6775_update_device(dev);
1358 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1359 int nr = sensor_attr->index;
1360 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1363 static struct sensor_device_attribute_2 sda_temp_input[] = {
1364 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
1365 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0),
1366 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0),
1367 SENSOR_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0),
1368 SENSOR_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0),
1369 SENSOR_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0),
1370 SENSOR_ATTR_2(temp7_input, S_IRUGO, show_temp, NULL, 6, 0),
1371 SENSOR_ATTR_2(temp8_input, S_IRUGO, show_temp, NULL, 7, 0),
1372 SENSOR_ATTR_2(temp9_input, S_IRUGO, show_temp, NULL, 8, 0),
1373 SENSOR_ATTR_2(temp10_input, S_IRUGO, show_temp, NULL, 9, 0),
1374 SENSOR_ATTR_2(temp11_input, S_IRUGO, show_temp, NULL, 10, 0),
1377 static struct sensor_device_attribute sda_temp_label[] = {
1378 SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
1379 SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
1380 SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
1381 SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
1382 SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
1383 SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
1386 static struct sensor_device_attribute_2 sda_temp_max[] = {
1387 SENSOR_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1389 SENSOR_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1391 SENSOR_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1393 SENSOR_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1395 SENSOR_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1397 SENSOR_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1401 static struct sensor_device_attribute_2 sda_temp_max_hyst[] = {
1402 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1404 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1406 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1408 SENSOR_ATTR_2(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1410 SENSOR_ATTR_2(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1412 SENSOR_ATTR_2(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1416 static struct sensor_device_attribute sda_temp_alarm[] = {
1417 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
1418 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
1419 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
1422 static struct sensor_device_attribute sda_temp_type[] = {
1423 SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0),
1424 SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1),
1425 SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2),
1429 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
1431 struct nct6775_data *data = nct6775_update_device(dev);
1432 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1434 return sprintf(buf, "%d\n", !data->pwm_mode[sensor_attr->index]);
1438 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1439 const char *buf, size_t count)
1441 struct nct6775_data *data = dev_get_drvdata(dev);
1442 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1443 int nr = sensor_attr->index;
1448 err = kstrtoul(buf, 10, &val);
1455 /* Setting DC mode is not supported for all chips/channels */
1456 if (data->REG_PWM_MODE[nr] == 0) {
1462 mutex_lock(&data->update_lock);
1463 data->pwm_mode[nr] = val;
1464 reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
1465 reg &= ~data->PWM_MODE_MASK[nr];
1467 reg |= data->PWM_MODE_MASK[nr];
1468 nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
1469 mutex_unlock(&data->update_lock);
1474 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
1476 struct nct6775_data *data = nct6775_update_device(dev);
1477 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1479 return sprintf(buf, "%d\n", data->pwm_enable[sensor_attr->index]);
1483 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1485 struct nct6775_data *data = nct6775_update_device(dev);
1486 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1488 int index = sattr->index;
1492 * For automatic fan control modes, show current pwm readings.
1493 * Otherwise, show the configured value.
1495 if (index == 0 && data->pwm_enable[nr] > 1)
1496 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
1498 pwm = data->pwm[index][nr];
1500 return sprintf(buf, "%d\n", pwm);
1504 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
1507 struct nct6775_data *data = dev_get_drvdata(dev);
1508 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1510 int index = sattr->index;
1514 err = kstrtoul(buf, 10, &val);
1517 if (val > 255 || (index && val == 0))
1520 mutex_lock(&data->update_lock);
1521 data->pwm[index][nr] = val;
1522 nct6775_write_value(data, data->REG_PWM[index][nr], val);
1523 mutex_unlock(&data->update_lock);
1527 /* Returns 0 if OK, -EINVAL otherwise */
1528 static int check_trip_points(struct nct6775_data *data, int nr)
1532 for (i = 0; i < data->auto_pwm_num - 1; i++) {
1533 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1536 for (i = 0; i < data->auto_pwm_num - 1; i++) {
1537 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1540 /* validate critical temperature and pwm if enabled (pwm > 0) */
1541 if (data->auto_pwm[nr][data->auto_pwm_num]) {
1542 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
1543 data->auto_temp[nr][data->auto_pwm_num] ||
1544 data->auto_pwm[nr][data->auto_pwm_num - 1] >
1545 data->auto_pwm[nr][data->auto_pwm_num])
1552 store_pwm_enable(struct device *dev, struct device_attribute *attr,
1553 const char *buf, size_t count)
1555 struct nct6775_data *data = dev_get_drvdata(dev);
1556 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1557 int nr = sensor_attr->index;
1562 err = kstrtoul(buf, 10, &val);
1569 if (val == 4 && check_trip_points(data, nr)) {
1570 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
1571 dev_err(dev, "Adjust trip points and try again\n");
1575 mutex_lock(&data->update_lock);
1576 data->pwm_enable[nr] = val;
1579 * turn off pwm control: select manual mode, set pwm to maximum
1581 data->pwm[0][nr] = 255;
1582 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
1584 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
1586 reg |= (pwm_enable_to_reg(val) << 4);
1587 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
1588 mutex_unlock(&data->update_lock);
1593 show_pwm_temp_src(struct device *dev, struct device_attribute *attr, char *buf)
1595 struct nct6775_data *data = nct6775_update_device(dev);
1596 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1598 return sprintf(buf, "%d\n", data->temp_src[sattr->index][sattr->nr]);
1602 store_pwm_temp_src(struct device *dev, struct device_attribute *attr,
1603 const char *buf, size_t count)
1605 struct nct6775_data *data = nct6775_update_device(dev);
1606 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1608 int index = sattr->index;
1612 static const int max_src[] = {
1613 ARRAY_SIZE(nct6775_temp_label),
1614 ARRAY_SIZE(nct6776_temp_label),
1615 ARRAY_SIZE(nct6779_temp_label)
1618 err = kstrtoul(buf, 10, &val);
1621 if ((!index && val == 0) || val >= max_src[data->kind])
1624 if (!strlen(data->temp_label[val]))
1627 mutex_lock(&data->update_lock);
1628 data->temp_src[index][nr] = val;
1630 reg = nct6775_read_value(data, data->REG_TEMP_SOURCE[nr]);
1633 nct6775_write_value(data, data->REG_TEMP_SOURCE[nr], reg);
1635 reg = nct6775_read_value(data, data->REG_TEMP_SOURCE_2[nr]);
1638 reg |= (val | 0x80);
1639 nct6775_write_value(data, data->REG_TEMP_SOURCE_2[nr], reg);
1641 mutex_unlock(&data->update_lock);
1647 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
1649 struct nct6775_data *data = nct6775_update_device(dev);
1650 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1652 return sprintf(buf, "%d\n",
1653 data->target_temp[sensor_attr->index] * 1000);
1657 store_target_temp(struct device *dev, struct device_attribute *attr,
1658 const char *buf, size_t count)
1660 struct nct6775_data *data = dev_get_drvdata(dev);
1661 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1662 int nr = sensor_attr->index;
1666 err = kstrtol(buf, 10, &val);
1670 val = SENSORS_LIMIT(DIV_ROUND_CLOSEST(val, 1000), 0, 127);
1672 mutex_lock(&data->update_lock);
1673 data->target_temp[nr] = val;
1674 nct6775_write_value(data, data->REG_TARGET[nr], val);
1675 mutex_unlock(&data->update_lock);
1680 show_auto_temp_hyst(struct device *dev, struct device_attribute *attr,
1683 struct nct6775_data *data = nct6775_update_device(dev);
1684 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1686 int point = sattr->index >= data->auto_pwm_num ? 1 : 0;
1687 int tolerance = data->tolerance[nr][point];
1688 int temp = data->auto_temp[nr][sattr->index];
1690 return sprintf(buf, "%d\n", (temp - tolerance) * 1000);
1694 store_auto_temp_hyst(struct device *dev, struct device_attribute *attr,
1695 const char *buf, size_t count)
1697 struct nct6775_data *data = dev_get_drvdata(dev);
1698 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1700 int point = sattr->index >= data->auto_pwm_num ? 1 : 0;
1704 int maxlimit[2][3] = { { 15, 7, 63 }, { 15, 7, 7 } };
1705 int mask[] = { 0x0f, 0x07, 0x07 };
1708 err = kstrtol(buf, 10, &val);
1712 temp = data->auto_temp[nr][sattr->index];
1713 val = temp - DIV_ROUND_CLOSEST(val, 1000);
1715 /* Limit tolerance as needed */
1716 val = SENSORS_LIMIT(val, 0, maxlimit[point][data->kind]);
1718 mutex_lock(&data->update_lock);
1720 nct6775_write_value(data,
1721 data->REG_CRITICAL_TEMP_TOLERANCE[nr],
1724 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
1725 reg = (reg & ~mask[nr]) | (val & mask[nr]);
1726 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
1727 if (data->kind == nct6779) {
1728 reg = nct6775_read_value(data,
1729 NCT6779_REG_TOLERANCE_H[nr]);
1730 reg = (reg & 0x70) | ((val & 0x38) << 1);
1731 nct6775_write_value(data,
1732 NCT6779_REG_TOLERANCE_H[nr], reg);
1736 data->tolerance[nr][point] = val;
1737 mutex_unlock(&data->update_lock);
1741 static SENSOR_DEVICE_ATTR_2(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
1742 static SENSOR_DEVICE_ATTR_2(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1, 0);
1743 static SENSOR_DEVICE_ATTR_2(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2, 0);
1744 static SENSOR_DEVICE_ATTR_2(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3, 0);
1745 static SENSOR_DEVICE_ATTR_2(pwm5, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 4, 0);
1747 static SENSOR_DEVICE_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1749 static SENSOR_DEVICE_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1751 static SENSOR_DEVICE_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1753 static SENSOR_DEVICE_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1755 static SENSOR_DEVICE_ATTR(pwm5_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1758 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1759 store_pwm_enable, 0);
1760 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1761 store_pwm_enable, 1);
1762 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1763 store_pwm_enable, 2);
1764 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1765 store_pwm_enable, 3);
1766 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1767 store_pwm_enable, 4);
1769 static SENSOR_DEVICE_ATTR_2(pwm1_temp_src1, S_IWUSR | S_IRUGO,
1770 show_pwm_temp_src, store_pwm_temp_src, 6, 0);
1771 static SENSOR_DEVICE_ATTR_2(pwm2_temp_src1, S_IWUSR | S_IRUGO,
1772 show_pwm_temp_src, store_pwm_temp_src, 7, 0);
1773 static SENSOR_DEVICE_ATTR_2(pwm3_temp_src1, S_IWUSR | S_IRUGO,
1774 show_pwm_temp_src, store_pwm_temp_src, 8, 0);
1775 static SENSOR_DEVICE_ATTR_2(pwm4_temp_src1, S_IWUSR | S_IRUGO,
1776 show_pwm_temp_src, store_pwm_temp_src, 9, 0);
1777 static SENSOR_DEVICE_ATTR_2(pwm5_temp_src1, S_IWUSR | S_IRUGO,
1778 show_pwm_temp_src, store_pwm_temp_src, 10, 0);
1780 static struct sensor_device_attribute_2 pwm_temp_src2[] = {
1781 SENSOR_ATTR_2(pwm1_temp_src2, S_IWUSR | S_IRUGO, show_pwm_temp_src,
1782 store_pwm_temp_src, 6, 1),
1783 SENSOR_ATTR_2(pwm2_temp_src2, S_IWUSR | S_IRUGO, show_pwm_temp_src,
1784 store_pwm_temp_src, 7, 1),
1785 SENSOR_ATTR_2(pwm3_temp_src2, S_IWUSR | S_IRUGO, show_pwm_temp_src,
1786 store_pwm_temp_src, 8, 1),
1787 SENSOR_ATTR_2(pwm4_temp_src2, S_IWUSR | S_IRUGO, show_pwm_temp_src,
1788 store_pwm_temp_src, 9, 1),
1789 SENSOR_ATTR_2(pwm5_temp_src2, S_IWUSR | S_IRUGO, show_pwm_temp_src,
1790 store_pwm_temp_src, 10, 1),
1793 static SENSOR_DEVICE_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
1794 store_target_temp, 0);
1795 static SENSOR_DEVICE_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
1796 store_target_temp, 1);
1797 static SENSOR_DEVICE_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
1798 store_target_temp, 2);
1799 static SENSOR_DEVICE_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
1800 store_target_temp, 3);
1801 static SENSOR_DEVICE_ATTR(pwm5_target, S_IWUSR | S_IRUGO, show_target_temp,
1802 store_target_temp, 4);
1804 /* Smart Fan registers */
1807 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
1809 struct nct6775_data *data = nct6775_update_device(dev);
1810 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1812 int index = sattr->index;
1814 return sprintf(buf, "%d\n",
1815 step_time_from_reg(data->fan_time[index][nr],
1816 data->pwm_mode[nr]));
1820 store_fan_time(struct device *dev, struct device_attribute *attr,
1821 const char *buf, size_t count)
1823 struct nct6775_data *data = dev_get_drvdata(dev);
1824 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1826 int index = sattr->index;
1830 err = kstrtoul(buf, 10, &val);
1834 val = step_time_to_reg(val, data->pwm_mode[nr]);
1835 mutex_lock(&data->update_lock);
1836 data->fan_time[index][nr] = val;
1837 nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
1838 mutex_unlock(&data->update_lock);
1842 static ssize_t show_name(struct device *dev, struct device_attribute *attr,
1845 struct nct6775_data *data = dev_get_drvdata(dev);
1847 return sprintf(buf, "%s\n", data->name);
1849 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1851 static SENSOR_DEVICE_ATTR_2(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
1852 store_fan_time, 0, 0);
1853 static SENSOR_DEVICE_ATTR_2(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
1854 store_fan_time, 1, 0);
1855 static SENSOR_DEVICE_ATTR_2(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
1856 store_fan_time, 2, 0);
1857 static SENSOR_DEVICE_ATTR_2(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
1858 store_fan_time, 3, 0);
1859 static SENSOR_DEVICE_ATTR_2(pwm5_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
1860 store_fan_time, 4, 0);
1862 static SENSOR_DEVICE_ATTR_2(pwm1_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
1863 store_fan_time, 0, 1);
1864 static SENSOR_DEVICE_ATTR_2(pwm2_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
1865 store_fan_time, 1, 1);
1866 static SENSOR_DEVICE_ATTR_2(pwm3_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
1867 store_fan_time, 2, 1);
1868 static SENSOR_DEVICE_ATTR_2(pwm4_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
1869 store_fan_time, 3, 1);
1870 static SENSOR_DEVICE_ATTR_2(pwm5_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
1871 store_fan_time, 4, 1);
1873 static SENSOR_DEVICE_ATTR_2(pwm1_step_down_time, S_IWUSR | S_IRUGO,
1874 show_fan_time, store_fan_time, 0, 2);
1875 static SENSOR_DEVICE_ATTR_2(pwm2_step_down_time, S_IWUSR | S_IRUGO,
1876 show_fan_time, store_fan_time, 1, 2);
1877 static SENSOR_DEVICE_ATTR_2(pwm3_step_down_time, S_IWUSR | S_IRUGO,
1878 show_fan_time, store_fan_time, 2, 2);
1879 static SENSOR_DEVICE_ATTR_2(pwm4_step_down_time, S_IWUSR | S_IRUGO,
1880 show_fan_time, store_fan_time, 3, 2);
1881 static SENSOR_DEVICE_ATTR_2(pwm5_step_down_time, S_IWUSR | S_IRUGO,
1882 show_fan_time, store_fan_time, 4, 2);
1884 static SENSOR_DEVICE_ATTR_2(pwm1_start_output, S_IWUSR | S_IRUGO, show_pwm,
1886 static SENSOR_DEVICE_ATTR_2(pwm2_start_output, S_IWUSR | S_IRUGO, show_pwm,
1888 static SENSOR_DEVICE_ATTR_2(pwm3_start_output, S_IWUSR | S_IRUGO, show_pwm,
1890 static SENSOR_DEVICE_ATTR_2(pwm4_start_output, S_IWUSR | S_IRUGO, show_pwm,
1892 static SENSOR_DEVICE_ATTR_2(pwm5_start_output, S_IWUSR | S_IRUGO, show_pwm,
1895 static SENSOR_DEVICE_ATTR_2(pwm1_stop_output, S_IWUSR | S_IRUGO, show_pwm,
1897 static SENSOR_DEVICE_ATTR_2(pwm2_stop_output, S_IWUSR | S_IRUGO, show_pwm,
1899 static SENSOR_DEVICE_ATTR_2(pwm3_stop_output, S_IWUSR | S_IRUGO, show_pwm,
1901 static SENSOR_DEVICE_ATTR_2(pwm4_stop_output, S_IWUSR | S_IRUGO, show_pwm,
1903 static SENSOR_DEVICE_ATTR_2(pwm5_stop_output, S_IWUSR | S_IRUGO, show_pwm,
1906 static struct attribute *nct6775_attributes_pwm[5][11] = {
1908 &sensor_dev_attr_pwm1.dev_attr.attr,
1909 &sensor_dev_attr_pwm1_mode.dev_attr.attr,
1910 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1911 &sensor_dev_attr_pwm1_temp_src1.dev_attr.attr,
1912 &sensor_dev_attr_pwm1_target.dev_attr.attr,
1913 &sensor_dev_attr_pwm1_stop_time.dev_attr.attr,
1914 &sensor_dev_attr_pwm1_step_up_time.dev_attr.attr,
1915 &sensor_dev_attr_pwm1_step_down_time.dev_attr.attr,
1916 &sensor_dev_attr_pwm1_start_output.dev_attr.attr,
1917 &sensor_dev_attr_pwm1_stop_output.dev_attr.attr,
1921 &sensor_dev_attr_pwm2.dev_attr.attr,
1922 &sensor_dev_attr_pwm2_mode.dev_attr.attr,
1923 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1924 &sensor_dev_attr_pwm2_temp_src1.dev_attr.attr,
1925 &sensor_dev_attr_pwm2_target.dev_attr.attr,
1926 &sensor_dev_attr_pwm2_stop_time.dev_attr.attr,
1927 &sensor_dev_attr_pwm2_step_up_time.dev_attr.attr,
1928 &sensor_dev_attr_pwm2_step_down_time.dev_attr.attr,
1929 &sensor_dev_attr_pwm2_start_output.dev_attr.attr,
1930 &sensor_dev_attr_pwm2_stop_output.dev_attr.attr,
1934 &sensor_dev_attr_pwm3.dev_attr.attr,
1935 &sensor_dev_attr_pwm3_mode.dev_attr.attr,
1936 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1937 &sensor_dev_attr_pwm3_temp_src1.dev_attr.attr,
1938 &sensor_dev_attr_pwm3_target.dev_attr.attr,
1939 &sensor_dev_attr_pwm3_stop_time.dev_attr.attr,
1940 &sensor_dev_attr_pwm3_step_up_time.dev_attr.attr,
1941 &sensor_dev_attr_pwm3_step_down_time.dev_attr.attr,
1942 &sensor_dev_attr_pwm3_start_output.dev_attr.attr,
1943 &sensor_dev_attr_pwm3_stop_output.dev_attr.attr,
1947 &sensor_dev_attr_pwm4.dev_attr.attr,
1948 &sensor_dev_attr_pwm4_mode.dev_attr.attr,
1949 &sensor_dev_attr_pwm4_enable.dev_attr.attr,
1950 &sensor_dev_attr_pwm4_temp_src1.dev_attr.attr,
1951 &sensor_dev_attr_pwm4_target.dev_attr.attr,
1952 &sensor_dev_attr_pwm4_stop_time.dev_attr.attr,
1953 &sensor_dev_attr_pwm4_step_up_time.dev_attr.attr,
1954 &sensor_dev_attr_pwm4_step_down_time.dev_attr.attr,
1955 &sensor_dev_attr_pwm4_start_output.dev_attr.attr,
1956 &sensor_dev_attr_pwm4_stop_output.dev_attr.attr,
1960 &sensor_dev_attr_pwm5.dev_attr.attr,
1961 &sensor_dev_attr_pwm5_mode.dev_attr.attr,
1962 &sensor_dev_attr_pwm5_enable.dev_attr.attr,
1963 &sensor_dev_attr_pwm5_temp_src1.dev_attr.attr,
1964 &sensor_dev_attr_pwm5_target.dev_attr.attr,
1965 &sensor_dev_attr_pwm5_stop_time.dev_attr.attr,
1966 &sensor_dev_attr_pwm5_step_up_time.dev_attr.attr,
1967 &sensor_dev_attr_pwm5_step_down_time.dev_attr.attr,
1968 &sensor_dev_attr_pwm5_start_output.dev_attr.attr,
1969 &sensor_dev_attr_pwm5_stop_output.dev_attr.attr,
1974 static const struct attribute_group nct6775_group_pwm[5] = {
1975 { .attrs = nct6775_attributes_pwm[0] },
1976 { .attrs = nct6775_attributes_pwm[1] },
1977 { .attrs = nct6775_attributes_pwm[2] },
1978 { .attrs = nct6775_attributes_pwm[3] },
1979 { .attrs = nct6775_attributes_pwm[4] },
1982 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1985 struct nct6775_data *data = nct6775_update_device(dev);
1986 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1988 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
1991 static ssize_t store_auto_pwm(struct device *dev, struct device_attribute *attr,
1992 const char *buf, size_t count)
1994 struct nct6775_data *data = dev_get_drvdata(dev);
1995 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1997 int point = sattr->index;
2002 err = kstrtoul(buf, 10, &val);
2008 if (point == data->auto_pwm_num) {
2009 if (data->kind != nct6775 && !val)
2011 if (data->kind != nct6779 && val)
2015 mutex_lock(&data->update_lock);
2016 data->auto_pwm[nr][point] = val;
2017 if (point < data->auto_pwm_num) {
2018 nct6775_write_value(data,
2019 NCT6775_AUTO_PWM(data, nr, point),
2020 data->auto_pwm[nr][point]);
2022 switch (data->kind) {
2024 /* disable if needed (pwm == 0) */
2025 reg = nct6775_read_value(data,
2026 NCT6775_REG_CRITICAL_ENAB[nr]);
2031 nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2035 break; /* always enabled, nothing to do */
2037 nct6775_write_value(data, NCT6779_REG_CRITICAL_PWM[nr],
2039 reg = nct6775_read_value(data,
2040 NCT6779_REG_CRITICAL_PWM_ENABLE[nr]);
2045 nct6775_write_value(data,
2046 NCT6779_REG_CRITICAL_PWM_ENABLE[nr],
2051 mutex_unlock(&data->update_lock);
2055 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
2058 struct nct6775_data *data = nct6775_update_device(dev);
2059 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2061 int point = sattr->index;
2064 * We don't know for sure if the temperature is signed or unsigned.
2065 * Assume it is unsigned.
2067 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2070 static ssize_t store_auto_temp(struct device *dev,
2071 struct device_attribute *attr,
2072 const char *buf, size_t count)
2074 struct nct6775_data *data = dev_get_drvdata(dev);
2075 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2077 int point = sattr->index;
2081 err = kstrtoul(buf, 10, &val);
2087 mutex_lock(&data->update_lock);
2088 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2089 if (point < data->auto_pwm_num) {
2090 nct6775_write_value(data,
2091 NCT6775_AUTO_TEMP(data, nr, point),
2092 data->auto_temp[nr][point]);
2094 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2095 data->auto_temp[nr][point]);
2097 mutex_unlock(&data->update_lock);
2102 * The number of auto-point trip points is chip dependent.
2103 * Need to check support while generating/removing attribute files.
2105 static struct sensor_device_attribute_2 sda_auto_pwm_arrays[] = {
2106 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IWUSR | S_IRUGO,
2107 show_auto_pwm, store_auto_pwm, 0, 0),
2108 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IWUSR | S_IRUGO,
2109 show_auto_temp, store_auto_temp, 0, 0),
2110 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IWUSR | S_IRUGO,
2111 show_auto_temp_hyst, store_auto_temp_hyst, 0, 0),
2112 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IWUSR | S_IRUGO,
2113 show_auto_pwm, store_auto_pwm, 0, 1),
2114 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IWUSR | S_IRUGO,
2115 show_auto_temp, store_auto_temp, 0, 1),
2116 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IWUSR | S_IRUGO,
2117 show_auto_temp_hyst, store_auto_temp_hyst, 0, 1),
2118 SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IWUSR | S_IRUGO,
2119 show_auto_pwm, store_auto_pwm, 0, 2),
2120 SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IWUSR | S_IRUGO,
2121 show_auto_temp, store_auto_temp, 0, 2),
2122 SENSOR_ATTR_2(pwm1_auto_point3_temp_hyst, S_IWUSR | S_IRUGO,
2123 show_auto_temp_hyst, store_auto_temp_hyst, 0, 2),
2124 SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IWUSR | S_IRUGO,
2125 show_auto_pwm, store_auto_pwm, 0, 3),
2126 SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IWUSR | S_IRUGO,
2127 show_auto_temp, store_auto_temp, 0, 3),
2128 SENSOR_ATTR_2(pwm1_auto_point4_temp_hyst, S_IWUSR | S_IRUGO,
2129 show_auto_temp_hyst, store_auto_temp_hyst, 0, 3),
2130 SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IWUSR | S_IRUGO,
2131 show_auto_pwm, store_auto_pwm, 0, 4),
2132 SENSOR_ATTR_2(pwm1_auto_point5_temp, S_IWUSR | S_IRUGO,
2133 show_auto_temp, store_auto_temp, 0, 4),
2134 SENSOR_ATTR_2(pwm1_auto_point5_temp_hyst, S_IWUSR | S_IRUGO,
2135 show_auto_temp_hyst, store_auto_temp_hyst, 0, 4),
2136 SENSOR_ATTR_2(pwm1_auto_point6_pwm, S_IWUSR | S_IRUGO,
2137 show_auto_pwm, store_auto_pwm, 0, 5),
2138 SENSOR_ATTR_2(pwm1_auto_point6_temp, S_IWUSR | S_IRUGO,
2139 show_auto_temp, store_auto_temp, 0, 5),
2140 SENSOR_ATTR_2(pwm1_auto_point6_temp_hyst, S_IWUSR | S_IRUGO,
2141 show_auto_temp_hyst, store_auto_temp_hyst, 0, 5),
2142 SENSOR_ATTR_2(pwm1_auto_point7_pwm, S_IWUSR | S_IRUGO,
2143 show_auto_pwm, store_auto_pwm, 0, 6),
2144 SENSOR_ATTR_2(pwm1_auto_point7_temp, S_IWUSR | S_IRUGO,
2145 show_auto_temp, store_auto_temp, 0, 6),
2146 SENSOR_ATTR_2(pwm1_auto_point7_temp_hyst, S_IWUSR | S_IRUGO,
2147 show_auto_temp_hyst, store_auto_temp_hyst, 0, 6),
2149 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IWUSR | S_IRUGO,
2150 show_auto_pwm, store_auto_pwm, 1, 0),
2151 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IWUSR | S_IRUGO,
2152 show_auto_temp, store_auto_temp, 1, 0),
2153 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IWUSR | S_IRUGO,
2154 show_auto_temp_hyst, store_auto_temp_hyst, 1, 0),
2155 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IWUSR | S_IRUGO,
2156 show_auto_pwm, store_auto_pwm, 1, 1),
2157 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IWUSR | S_IRUGO,
2158 show_auto_temp, store_auto_temp, 1, 1),
2159 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IWUSR | S_IRUGO,
2160 show_auto_temp_hyst, store_auto_temp_hyst, 1, 1),
2161 SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IWUSR | S_IRUGO,
2162 show_auto_pwm, store_auto_pwm, 1, 2),
2163 SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IWUSR | S_IRUGO,
2164 show_auto_temp, store_auto_temp, 1, 2),
2165 SENSOR_ATTR_2(pwm2_auto_point3_temp_hyst, S_IWUSR | S_IRUGO,
2166 show_auto_temp_hyst, store_auto_temp_hyst, 1, 2),
2167 SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IWUSR | S_IRUGO,
2168 show_auto_pwm, store_auto_pwm, 1, 3),
2169 SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IWUSR | S_IRUGO,
2170 show_auto_temp, store_auto_temp, 1, 3),
2171 SENSOR_ATTR_2(pwm2_auto_point4_temp_hyst, S_IWUSR | S_IRUGO,
2172 show_auto_temp_hyst, store_auto_temp_hyst, 1, 3),
2173 SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IWUSR | S_IRUGO,
2174 show_auto_pwm, store_auto_pwm, 1, 4),
2175 SENSOR_ATTR_2(pwm2_auto_point5_temp, S_IWUSR | S_IRUGO,
2176 show_auto_temp, store_auto_temp, 1, 4),
2177 SENSOR_ATTR_2(pwm2_auto_point5_temp_hyst, S_IWUSR | S_IRUGO,
2178 show_auto_temp_hyst, store_auto_temp_hyst, 1, 4),
2179 SENSOR_ATTR_2(pwm2_auto_point6_pwm, S_IWUSR | S_IRUGO,
2180 show_auto_pwm, store_auto_pwm, 1, 5),
2181 SENSOR_ATTR_2(pwm2_auto_point6_temp, S_IWUSR | S_IRUGO,
2182 show_auto_temp, store_auto_temp, 1, 5),
2183 SENSOR_ATTR_2(pwm2_auto_point6_temp_hyst, S_IWUSR | S_IRUGO,
2184 show_auto_temp_hyst, store_auto_temp_hyst, 1, 5),
2185 SENSOR_ATTR_2(pwm2_auto_point7_pwm, S_IWUSR | S_IRUGO,
2186 show_auto_pwm, store_auto_pwm, 1, 6),
2187 SENSOR_ATTR_2(pwm2_auto_point7_temp, S_IWUSR | S_IRUGO,
2188 show_auto_temp, store_auto_temp, 1, 6),
2189 SENSOR_ATTR_2(pwm2_auto_point7_temp_hyst, S_IWUSR | S_IRUGO,
2190 show_auto_temp_hyst, store_auto_temp_hyst, 1, 6),
2192 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IWUSR | S_IRUGO,
2193 show_auto_pwm, store_auto_pwm, 2, 0),
2194 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IWUSR | S_IRUGO,
2195 show_auto_temp, store_auto_temp, 2, 0),
2196 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IWUSR | S_IRUGO,
2197 show_auto_temp_hyst, store_auto_temp_hyst, 2, 0),
2198 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IWUSR | S_IRUGO,
2199 show_auto_pwm, store_auto_pwm, 2, 1),
2200 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IWUSR | S_IRUGO,
2201 show_auto_temp, store_auto_temp, 2, 1),
2202 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IWUSR | S_IRUGO,
2203 show_auto_temp_hyst, store_auto_temp_hyst, 2, 1),
2204 SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IWUSR | S_IRUGO,
2205 show_auto_pwm, store_auto_pwm, 2, 2),
2206 SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IWUSR | S_IRUGO,
2207 show_auto_temp, store_auto_temp, 2, 2),
2208 SENSOR_ATTR_2(pwm3_auto_point3_temp_hyst, S_IWUSR | S_IRUGO,
2209 show_auto_temp_hyst, store_auto_temp_hyst, 2, 2),
2210 SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IWUSR | S_IRUGO,
2211 show_auto_pwm, store_auto_pwm, 2, 3),
2212 SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IWUSR | S_IRUGO,
2213 show_auto_temp, store_auto_temp, 2, 3),
2214 SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IWUSR | S_IRUGO,
2215 show_auto_temp_hyst, store_auto_temp_hyst, 2, 3),
2216 SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IWUSR | S_IRUGO,
2217 show_auto_pwm, store_auto_pwm, 2, 4),
2218 SENSOR_ATTR_2(pwm3_auto_point5_temp, S_IWUSR | S_IRUGO,
2219 show_auto_temp, store_auto_temp, 2, 4),
2220 SENSOR_ATTR_2(pwm3_auto_point5_temp_hyst, S_IWUSR | S_IRUGO,
2221 show_auto_temp_hyst, store_auto_temp_hyst, 2, 4),
2222 SENSOR_ATTR_2(pwm3_auto_point6_pwm, S_IWUSR | S_IRUGO,
2223 show_auto_pwm, store_auto_pwm, 2, 5),
2224 SENSOR_ATTR_2(pwm3_auto_point6_temp, S_IWUSR | S_IRUGO,
2225 show_auto_temp, store_auto_temp, 2, 5),
2226 SENSOR_ATTR_2(pwm3_auto_point6_temp_hyst, S_IWUSR | S_IRUGO,
2227 show_auto_temp_hyst, store_auto_temp_hyst, 2, 5),
2228 SENSOR_ATTR_2(pwm3_auto_point7_pwm, S_IWUSR | S_IRUGO,
2229 show_auto_pwm, store_auto_pwm, 2, 6),
2230 SENSOR_ATTR_2(pwm3_auto_point7_temp, S_IWUSR | S_IRUGO,
2231 show_auto_temp, store_auto_temp, 2, 6),
2232 SENSOR_ATTR_2(pwm3_auto_point7_temp_hyst, S_IWUSR | S_IRUGO,
2233 show_auto_temp_hyst, store_auto_temp_hyst, 2, 6),
2235 SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IWUSR | S_IRUGO,
2236 show_auto_pwm, store_auto_pwm, 3, 0),
2237 SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IWUSR | S_IRUGO,
2238 show_auto_temp, store_auto_temp, 3, 0),
2239 SENSOR_ATTR_2(pwm4_auto_point1_temp_hyst, S_IWUSR | S_IRUGO,
2240 show_auto_temp_hyst, store_auto_temp_hyst, 3, 0),
2241 SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IWUSR | S_IRUGO,
2242 show_auto_pwm, store_auto_pwm, 3, 1),
2243 SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IWUSR | S_IRUGO,
2244 show_auto_temp, store_auto_temp, 3, 1),
2245 SENSOR_ATTR_2(pwm4_auto_point2_temp_hyst, S_IWUSR | S_IRUGO,
2246 show_auto_temp_hyst, store_auto_temp_hyst, 3, 1),
2247 SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IWUSR | S_IRUGO,
2248 show_auto_pwm, store_auto_pwm, 3, 2),
2249 SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IWUSR | S_IRUGO,
2250 show_auto_temp, store_auto_temp, 3, 2),
2251 SENSOR_ATTR_2(pwm4_auto_point3_temp_hyst, S_IWUSR | S_IRUGO,
2252 show_auto_temp_hyst, store_auto_temp_hyst, 3, 2),
2253 SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IWUSR | S_IRUGO,
2254 show_auto_pwm, store_auto_pwm, 3, 3),
2255 SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IWUSR | S_IRUGO,
2256 show_auto_temp, store_auto_temp, 3, 3),
2257 SENSOR_ATTR_2(pwm4_auto_point4_temp_hyst, S_IWUSR | S_IRUGO,
2258 show_auto_temp_hyst, store_auto_temp_hyst, 3, 3),
2259 SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IWUSR | S_IRUGO,
2260 show_auto_pwm, store_auto_pwm, 3, 4),
2261 SENSOR_ATTR_2(pwm4_auto_point5_temp, S_IWUSR | S_IRUGO,
2262 show_auto_temp, store_auto_temp, 3, 4),
2263 SENSOR_ATTR_2(pwm4_auto_point5_temp_hyst, S_IWUSR | S_IRUGO,
2264 show_auto_temp_hyst, store_auto_temp_hyst, 3, 4),
2265 SENSOR_ATTR_2(pwm4_auto_point6_pwm, S_IWUSR | S_IRUGO,
2266 show_auto_pwm, store_auto_pwm, 3, 5),
2267 SENSOR_ATTR_2(pwm4_auto_point6_temp, S_IWUSR | S_IRUGO,
2268 show_auto_temp, store_auto_temp, 3, 5),
2269 SENSOR_ATTR_2(pwm4_auto_point6_temp_hyst, S_IWUSR | S_IRUGO,
2270 show_auto_temp_hyst, store_auto_temp_hyst, 3, 5),
2271 SENSOR_ATTR_2(pwm4_auto_point7_pwm, S_IWUSR | S_IRUGO,
2272 show_auto_pwm, store_auto_pwm, 3, 6),
2273 SENSOR_ATTR_2(pwm4_auto_point7_temp, S_IWUSR | S_IRUGO,
2274 show_auto_temp, store_auto_temp, 3, 6),
2275 SENSOR_ATTR_2(pwm4_auto_point7_temp_hyst, S_IWUSR | S_IRUGO,
2276 show_auto_temp_hyst, store_auto_temp_hyst, 3, 6),
2278 SENSOR_ATTR_2(pwm5_auto_point1_pwm, S_IWUSR | S_IRUGO,
2279 show_auto_pwm, store_auto_pwm, 4, 0),
2280 SENSOR_ATTR_2(pwm5_auto_point1_temp, S_IWUSR | S_IRUGO,
2281 show_auto_temp, store_auto_temp, 4, 0),
2282 SENSOR_ATTR_2(pwm5_auto_point1_temp_hyst, S_IWUSR | S_IRUGO,
2283 show_auto_temp_hyst, store_auto_temp_hyst, 4, 0),
2284 SENSOR_ATTR_2(pwm5_auto_point2_pwm, S_IWUSR | S_IRUGO,
2285 show_auto_pwm, store_auto_pwm, 4, 1),
2286 SENSOR_ATTR_2(pwm5_auto_point2_temp, S_IWUSR | S_IRUGO,
2287 show_auto_temp, store_auto_temp, 4, 1),
2288 SENSOR_ATTR_2(pwm5_auto_point2_temp_hyst, S_IWUSR | S_IRUGO,
2289 show_auto_temp_hyst, store_auto_temp_hyst, 4, 1),
2290 SENSOR_ATTR_2(pwm5_auto_point3_pwm, S_IWUSR | S_IRUGO,
2291 show_auto_pwm, store_auto_pwm, 4, 2),
2292 SENSOR_ATTR_2(pwm5_auto_point3_temp, S_IWUSR | S_IRUGO,
2293 show_auto_temp, store_auto_temp, 4, 2),
2294 SENSOR_ATTR_2(pwm5_auto_point3_temp_hyst, S_IWUSR | S_IRUGO,
2295 show_auto_temp_hyst, store_auto_temp_hyst, 4, 2),
2296 SENSOR_ATTR_2(pwm5_auto_point4_pwm, S_IWUSR | S_IRUGO,
2297 show_auto_pwm, store_auto_pwm, 4, 3),
2298 SENSOR_ATTR_2(pwm5_auto_point4_temp, S_IWUSR | S_IRUGO,
2299 show_auto_temp, store_auto_temp, 4, 3),
2300 SENSOR_ATTR_2(pwm5_auto_point4_temp_hyst, S_IWUSR | S_IRUGO,
2301 show_auto_temp_hyst, store_auto_temp_hyst, 4, 3),
2302 SENSOR_ATTR_2(pwm5_auto_point5_pwm, S_IWUSR | S_IRUGO,
2303 show_auto_pwm, store_auto_pwm, 4, 4),
2304 SENSOR_ATTR_2(pwm5_auto_point5_temp, S_IWUSR | S_IRUGO,
2305 show_auto_temp, store_auto_temp, 4, 4),
2306 SENSOR_ATTR_2(pwm5_auto_point5_temp_hyst, S_IWUSR | S_IRUGO,
2307 show_auto_temp_hyst, store_auto_temp_hyst, 4, 4),
2308 SENSOR_ATTR_2(pwm5_auto_point6_pwm, S_IWUSR | S_IRUGO,
2309 show_auto_pwm, store_auto_pwm, 4, 5),
2310 SENSOR_ATTR_2(pwm5_auto_point6_temp, S_IWUSR | S_IRUGO,
2311 show_auto_temp, store_auto_temp, 4, 5),
2312 SENSOR_ATTR_2(pwm5_auto_point6_temp_hyst, S_IWUSR | S_IRUGO,
2313 show_auto_temp_hyst, store_auto_temp_hyst, 4, 5),
2314 SENSOR_ATTR_2(pwm5_auto_point7_pwm, S_IWUSR | S_IRUGO,
2315 show_auto_pwm, store_auto_pwm, 4, 6),
2316 SENSOR_ATTR_2(pwm5_auto_point7_temp, S_IWUSR | S_IRUGO,
2317 show_auto_temp, store_auto_temp, 4, 6),
2318 SENSOR_ATTR_2(pwm5_auto_point7_temp_hyst, S_IWUSR | S_IRUGO,
2319 show_auto_temp_hyst, store_auto_temp_hyst, 4, 6),
2323 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
2325 struct nct6775_data *data = dev_get_drvdata(dev);
2326 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
2328 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
2331 /* Case open detection */
2334 show_caseopen(struct device *dev, struct device_attribute *attr, char *buf)
2336 struct nct6775_data *data = nct6775_update_device(dev);
2338 return sprintf(buf, "%d\n",
2339 !!(data->caseopen & to_sensor_dev_attr_2(attr)->index));
2343 clear_caseopen(struct device *dev, struct device_attribute *attr,
2344 const char *buf, size_t count)
2346 struct nct6775_data *data = dev_get_drvdata(dev);
2347 struct nct6775_sio_data *sio_data = dev->platform_data;
2348 int nr = to_sensor_dev_attr(attr)->index;
2352 if (kstrtoul(buf, 10, &val) || val != 0)
2355 mutex_lock(&data->update_lock);
2358 * Use CR registers to clear caseopen status.
2359 * The CR registers are the same for all chips, and not all chips
2360 * support clearing the caseopen status through "regular" registers.
2362 superio_enter(sio_data->sioreg);
2363 superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
2364 reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
2365 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
2366 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
2367 superio_exit(sio_data->sioreg);
2369 data->valid = 0; /* Force cache refresh */
2371 mutex_unlock(&data->update_lock);
2376 static struct sensor_device_attribute sda_caseopen[] = {
2377 SENSOR_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_caseopen,
2379 SENSOR_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_caseopen,
2384 * Driver and device management
2387 static void nct6775_device_remove_files(struct device *dev)
2390 * some entries in the following arrays may not have been used in
2391 * device_create_file(), but device_remove_file() will ignore them
2394 struct nct6775_data *data = dev_get_drvdata(dev);
2396 for (i = 0; i < data->pwm_num; i++) {
2397 sysfs_remove_group(&dev->kobj, &nct6775_group_pwm[i]);
2398 for (j = 0; j < ARRAY_SIZE(sda_auto_pwm_arrays); j++)
2399 device_remove_file(dev,
2400 &sda_auto_pwm_arrays[j].dev_attr);
2401 device_remove_file(dev, &pwm_temp_src2[i].dev_attr);
2404 for (i = 0; i < data->in_num; i++)
2405 sysfs_remove_group(&dev->kobj, &nct6775_group_in[i]);
2407 for (i = 0; i < 5; i++) {
2408 device_remove_file(dev, &sda_fan_input[i].dev_attr);
2409 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
2410 device_remove_file(dev, &sda_fan_div[i].dev_attr);
2411 device_remove_file(dev, &sda_fan_min[i].dev_attr);
2413 for (i = 0; i < NUM_REG_TEMP; i++) {
2414 if (!(data->have_temp & (1 << i)))
2416 device_remove_file(dev, &sda_temp_input[i].dev_attr);
2419 device_remove_file(dev, &sda_temp_label[i].dev_attr);
2420 device_remove_file(dev, &sda_temp_max[i].dev_attr);
2421 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
2424 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
2425 device_remove_file(dev, &sda_temp_type[i].dev_attr);
2428 device_remove_file(dev, &sda_caseopen[0].dev_attr);
2429 device_remove_file(dev, &sda_caseopen[1].dev_attr);
2431 device_remove_file(dev, &dev_attr_name);
2432 device_remove_file(dev, &dev_attr_cpu0_vid);
2435 /* Get the monitoring functions started */
2436 static inline void __devinit nct6775_init_device(struct nct6775_data *data)
2441 /* Start monitoring if needed */
2442 tmp = nct6775_read_value(data, NCT6775_REG_CONFIG);
2444 nct6775_write_value(data, NCT6775_REG_CONFIG,
2447 /* Enable temperature sensors if needed */
2448 for (i = 0; i < NUM_REG_TEMP; i++) {
2449 if (!(data->have_temp & (1 << i)))
2451 if (!data->reg_temp_config[i])
2453 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
2455 nct6775_write_value(data, data->reg_temp_config[i],
2459 /* Enable VBAT monitoring if needed */
2460 tmp = nct6775_read_value(data, NCT6775_REG_VBAT);
2462 nct6775_write_value(data, NCT6775_REG_VBAT, tmp | 0x01);
2464 for (i = 0; i < 3; i++) {
2465 const char *label = NULL;
2467 if (data->temp_label)
2468 label = data->temp_label[data->temp_src[0][i]];
2470 /* Digital source overrides analog type */
2471 if (label && strncmp(label, "PECI", 4) == 0)
2472 data->temp_type[i] = 6;
2473 else if (label && strncmp(label, "AMD", 3) == 0)
2474 data->temp_type[i] = 5;
2475 else if ((tmp & (0x02 << i)))
2476 data->temp_type[i] = 1; /* diode */
2478 data->temp_type[i] = 4; /* thermistor */
2482 static void w82627ehf_swap_tempreg(struct nct6775_data *data,
2487 tmp = data->temp_src[0][r1];
2488 data->temp_src[0][r1] = data->temp_src[0][r2];
2489 data->temp_src[0][r2] = tmp;
2491 for (i = 0; i < 3; i++) {
2492 tmp = data->reg_temp[i][r1];
2493 data->reg_temp[i][r1] = data->reg_temp[i][r2];
2494 data->reg_temp[i][r2] = tmp;
2497 tmp = data->reg_temp_config[r1];
2498 data->reg_temp_config[r1] = data->reg_temp_config[r2];
2499 data->reg_temp_config[r2] = tmp;
2502 static void __devinit
2503 nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
2504 struct nct6775_data *data)
2507 bool fan3pin, fan3min, fan4pin, fan4min, fan5pin;
2508 bool pwm3pin, pwm4pin, pwm5pin;
2510 superio_enter(sio_data->sioreg);
2512 /* fan4 and fan5 share some pins with the GPIO and serial flash */
2513 if (data->kind == nct6775) {
2514 regval = superio_inb(sio_data->sioreg, 0x2c);
2516 fan3pin = regval & (1 << 6);
2518 pwm3pin = regval & (1 << 7);
2520 /* On NCT6775, fan4 shares pins with the fdc interface */
2521 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
2526 } else if (data->kind == nct6776) {
2527 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
2529 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
2530 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
2535 fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
2540 fan4pin = superio_inb(sio_data->sioreg, 0x1C) & 0x01;
2545 fan5pin = superio_inb(sio_data->sioreg, 0x1C) & 0x02;
2552 } else { /* NCT6779D */
2553 regval = superio_inb(sio_data->sioreg, 0x1c);
2555 fan3pin = !(regval & (1 << 5));
2556 fan4pin = !(regval & (1 << 6));
2557 fan5pin = !(regval & (1 << 7));
2559 pwm3pin = !(regval & (1 << 0));
2560 pwm4pin = !(regval & (1 << 1));
2561 pwm5pin = !(regval & (1 << 2));
2567 superio_exit(sio_data->sioreg);
2569 data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
2570 data->has_fan |= (fan3pin << 2);
2571 data->has_fan_min |= (fan3min << 2);
2573 data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
2574 data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
2576 data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) | (pwm5pin << 4);
2579 static int __devinit nct6775_probe(struct platform_device *pdev)
2581 struct device *dev = &pdev->dev;
2582 struct nct6775_sio_data *sio_data = dev->platform_data;
2583 struct nct6775_data *data;
2584 struct resource *res;
2587 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
2589 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
2590 if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
2592 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
2593 (unsigned long)res->start,
2594 (unsigned long)res->start + IOREGION_LENGTH - 1);
2598 data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
2605 data->kind = sio_data->kind;
2606 data->addr = res->start;
2607 mutex_init(&data->lock);
2608 mutex_init(&data->update_lock);
2609 data->name = nct6775_device_names[data->kind];
2610 platform_set_drvdata(pdev, data);
2612 switch (data->kind) {
2615 data->have_in = 0x1ff;
2617 data->auto_pwm_num = 6;
2618 data->has_fan_div = true;
2620 data->fan_from_reg = fan_from_reg16;
2621 data->fan_from_reg_min = fan_from_reg8;
2623 data->REG_VIN = NCT6775_REG_IN;
2624 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
2625 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
2626 data->REG_TARGET = NCT6775_REG_TARGET;
2627 data->REG_FAN = NCT6775_REG_FAN;
2628 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
2629 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
2630 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
2631 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
2632 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
2633 data->REG_PWM[0] = NCT6775_REG_PWM;
2634 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
2635 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
2636 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
2637 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
2638 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
2639 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
2640 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
2641 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
2642 data->REG_CRITICAL_TEMP_TOLERANCE
2643 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
2644 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
2645 data->REG_ALARM = NCT6775_REG_ALARM;
2646 data->REG_CASEOPEN = NCT6775_REG_CASEOPEN;
2647 data->CASEOPEN_MASK = NCT6775_CASEOPEN_MASK;
2649 reg_temp = NCT6775_REG_TEMP;
2650 reg_temp_over = NCT6775_REG_TEMP_OVER;
2651 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
2652 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
2657 data->have_in = 0x1ff;
2659 data->auto_pwm_num = 4;
2660 data->has_fan_div = false;
2661 data->fan_from_reg = fan_from_reg13;
2662 data->fan_from_reg_min = fan_from_reg13;
2663 data->REG_VIN = NCT6775_REG_IN;
2664 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
2665 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
2666 data->REG_TARGET = NCT6775_REG_TARGET;
2667 data->REG_FAN = NCT6775_REG_FAN;
2668 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
2669 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
2670 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
2671 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
2672 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
2673 data->REG_PWM[0] = NCT6775_REG_PWM;
2674 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
2675 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
2676 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
2677 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
2678 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
2679 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
2680 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
2681 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
2682 data->REG_CRITICAL_TEMP_TOLERANCE
2683 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
2684 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
2685 data->REG_ALARM = NCT6775_REG_ALARM;
2686 data->REG_CASEOPEN = NCT6775_REG_CASEOPEN;
2687 data->CASEOPEN_MASK = NCT6776_CASEOPEN_MASK;
2689 reg_temp = NCT6775_REG_TEMP;
2690 reg_temp_over = NCT6775_REG_TEMP_OVER;
2691 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
2692 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
2697 data->have_in = 0x7fff;
2699 data->auto_pwm_num = 4;
2700 data->has_fan_div = false;
2702 data->fan_from_reg = fan_from_reg13;
2703 data->fan_from_reg_min = fan_from_reg13;
2705 data->REG_VIN = NCT6779_REG_IN;
2706 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
2707 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
2708 data->REG_TARGET = NCT6775_REG_TARGET;
2709 data->REG_FAN = NCT6779_REG_FAN;
2710 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
2711 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
2712 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
2713 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
2714 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
2715 data->REG_PWM[0] = NCT6775_REG_PWM;
2716 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
2717 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
2718 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
2719 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
2720 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
2721 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
2722 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
2723 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
2724 data->REG_CRITICAL_TEMP_TOLERANCE
2725 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
2726 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
2727 data->REG_TEMP_SOURCE_2 = NCT6779_REG_TEMP_SOURCE_2;
2728 data->REG_ALARM = NCT6779_REG_ALARM;
2729 data->REG_CASEOPEN = NCT6775_REG_CASEOPEN;
2730 data->CASEOPEN_MASK = NCT6776_CASEOPEN_MASK;
2732 reg_temp = NCT6779_REG_TEMP;
2733 reg_temp_over = NCT6775_REG_TEMP_OVER;
2734 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
2735 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
2743 /* Default to no temperature inputs, code below will adjust as needed */
2744 data->have_temp = 0;
2746 for (i = 0; i < NUM_REG_TEMP; i++) {
2747 if (reg_temp[i] == 0)
2750 data->reg_temp[0][i] = reg_temp[i];
2751 data->reg_temp[1][i] = reg_temp_over[i];
2752 data->reg_temp[2][i] = reg_temp_hyst[i];
2753 data->reg_temp_config[i] = reg_temp_config[i];
2755 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]);
2758 /* Always display temp6..10 (fan control sources) if enabled */
2759 if (src && (i > 5 || !(mask & (1 << src)))) {
2760 data->have_temp |= 1 << i;
2764 data->temp_src[0][i] = src;
2768 * Do some register swapping if index 0..2 don't
2769 * point to SYSTIN(1), CPUIN(2), and AUXIN(3).
2770 * Idea is to have the first three attributes
2771 * report SYSTIN, CPUIN, and AUXIN if possible
2772 * without overriding the basic system configuration.
2773 * Do this only for the first six temperature sources;
2774 * the remaining temperatures are fan control sources,
2775 * and we don't want to touch those.
2777 if (i > 0 && data->temp_src[0][0] != 1
2778 && data->temp_src[0][i] == 1)
2779 w82627ehf_swap_tempreg(data, 0, i);
2780 if (i > 1 && data->temp_src[0][1] != 2
2781 && data->temp_src[0][i] == 2)
2782 w82627ehf_swap_tempreg(data, 1, i);
2783 if (i > 2 && data->temp_src[0][2] != 3
2784 && data->temp_src[0][i] == 3)
2785 w82627ehf_swap_tempreg(data, 2, i);
2789 switch (data->kind) {
2791 data->temp_label = nct6775_temp_label;
2795 * On NCT6776, AUXTIN and VIN3 pins are shared.
2796 * Only way to detect it is to check if AUXTIN is used
2797 * as a temperature source, and if that source is
2800 * If that is the case, disable in6, which reports VIN3.
2801 * Otherwise disable temp3.
2803 if (data->temp_src[0][2] == 3) {
2806 if (data->reg_temp_config[2])
2807 reg = nct6775_read_value(data,
2808 data->reg_temp_config[2]);
2810 reg = 0; /* Assume AUXTIN is used */
2813 data->have_temp &= ~(1 << 2);
2815 data->have_in &= ~(1 << 6);
2817 data->temp_label = nct6776_temp_label;
2826 * Assume voltage is disabled if the respective temperature is
2827 * used as temperature source.
2829 for (i = 0; i < ARRAY_SIZE(NCT6779_REG_TEMP); i++) {
2830 if (!(data->have_temp & (1 << i)))
2832 if (data->temp_src[0][i] == 3) /* AUXTIN0 */
2833 data->have_in &= ~(1 << 6); /* no VIN4 */
2834 if (data->temp_src[0][i] == 4) /* AUXTIN1 */
2835 data->have_in &= ~(1 << 10); /* no VIN5 */
2836 if (data->temp_src[0][i] == 5) /* AUXTIN2 */
2837 data->have_in &= ~(1 << 11); /* no VIN6 */
2838 if (data->temp_src[0][i] == 6) /* AUXTIN0 */
2839 data->have_in &= ~(1 << 14); /* no VIN7 */
2841 if (NCT6779_REG_TEMP_SOURCE_2[i]) {
2842 src = nct6775_read_value(data,
2843 NCT6779_REG_TEMP_SOURCE_2[i]);
2844 data->temp_src[1][i] = src & 0x1f;
2847 data->temp_label = nct6779_temp_label;
2851 /* Initialize the chip */
2852 nct6775_init_device(data);
2854 data->vrm = vid_which_vrm();
2855 superio_enter(sio_data->sioreg);
2858 * We can get the VID input values directly at logical device D 0xe3.
2860 superio_select(sio_data->sioreg, NCT6775_LD_VID);
2861 data->vid = superio_inb(sio_data->sioreg, 0xe3);
2862 err = device_create_file(dev, &dev_attr_cpu0_vid);
2869 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
2870 tmp = superio_inb(sio_data->sioreg,
2871 NCT6775_REG_CR_FAN_DEBOUNCE);
2872 switch (data->kind) {
2881 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
2883 pr_info("Enabled fan debounce for chip %s\n", data->name);
2886 superio_exit(sio_data->sioreg);
2888 nct6775_check_fan_inputs(sio_data, data);
2890 /* Read fan clock dividers immediately */
2891 nct6775_update_fan_div_common(dev, data);
2893 /* Register sysfs hooks */
2894 for (i = 0; i < data->pwm_num; i++) {
2895 if (!(data->has_pwm & (1 << i)))
2897 err = sysfs_create_group(&dev->kobj, &nct6775_group_pwm[i]);
2900 if (data->REG_TEMP_SOURCE_2)
2901 device_create_file(dev, &pwm_temp_src2[i].dev_attr);
2903 for (i = 0; i < ARRAY_SIZE(sda_auto_pwm_arrays); i++) {
2904 struct sensor_device_attribute_2 *attr =
2905 &sda_auto_pwm_arrays[i];
2907 if (!(data->has_pwm & (1 << attr->nr)))
2909 if (attr->index > data->auto_pwm_num)
2911 err = device_create_file(dev, &attr->dev_attr);
2916 for (i = 0; i < data->in_num; i++) {
2917 if (!(data->have_in & (1 << i)))
2919 err = sysfs_create_group(&dev->kobj, &nct6775_group_in[i]);
2924 for (i = 0; i < 5; i++) {
2925 if (data->has_fan & (1 << i)) {
2926 err = device_create_file(dev,
2927 &sda_fan_input[i].dev_attr);
2930 err = device_create_file(dev,
2931 &sda_fan_alarm[i].dev_attr);
2934 if (data->kind != nct6776 &&
2935 data->kind != nct6779) {
2936 err = device_create_file(dev,
2937 &sda_fan_div[i].dev_attr);
2941 if (data->has_fan_min & (1 << i)) {
2942 err = device_create_file(dev,
2943 &sda_fan_min[i].dev_attr);
2950 for (i = 0; i < NUM_REG_TEMP; i++) {
2951 if (!(data->have_temp & (1 << i)))
2953 err = device_create_file(dev, &sda_temp_input[i].dev_attr);
2958 if (data->temp_label) {
2959 err = device_create_file(dev,
2960 &sda_temp_label[i].dev_attr);
2964 if (data->reg_temp[1][i]) {
2965 err = device_create_file(dev,
2966 &sda_temp_max[i].dev_attr);
2970 if (data->reg_temp[2][i]) {
2971 err = device_create_file(dev,
2972 &sda_temp_max_hyst[i].dev_attr);
2978 err = device_create_file(dev, &sda_temp_alarm[i].dev_attr);
2981 err = device_create_file(dev, &sda_temp_type[i].dev_attr);
2986 for (i = 0; i < ARRAY_SIZE(sda_caseopen); i++) {
2987 if (!data->CASEOPEN_MASK[i])
2989 err = device_create_file(dev, &sda_caseopen[i].dev_attr);
2994 err = device_create_file(dev, &dev_attr_name);
2998 data->hwmon_dev = hwmon_device_register(dev);
2999 if (IS_ERR(data->hwmon_dev)) {
3000 err = PTR_ERR(data->hwmon_dev);
3007 nct6775_device_remove_files(dev);
3009 release_region(res->start, IOREGION_LENGTH);
3014 static int __devexit nct6775_remove(struct platform_device *pdev)
3016 struct nct6775_data *data = platform_get_drvdata(pdev);
3018 hwmon_device_unregister(data->hwmon_dev);
3019 nct6775_device_remove_files(&pdev->dev);
3020 release_region(data->addr, IOREGION_LENGTH);
3025 static struct platform_driver nct6775_driver = {
3027 .owner = THIS_MODULE,
3030 .probe = nct6775_probe,
3031 .remove = __devexit_p(nct6775_remove),
3034 /* nct6775_find() looks for a '627 in the Super-I/O config space */
3035 static int __init nct6775_find(int sioaddr, unsigned short *addr,
3036 struct nct6775_sio_data *sio_data)
3038 static const char __initdata sio_name_NCT6775[] = "NCT6775F";
3039 static const char __initdata sio_name_NCT6776[] = "NCT6776F";
3040 static const char __initdata sio_name_NCT6779[] = "NCT6779F";
3043 const char *sio_name;
3045 superio_enter(sioaddr);
3050 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
3051 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
3052 switch (val & SIO_ID_MASK) {
3053 case SIO_NCT6775_ID:
3054 sio_data->kind = nct6775;
3055 sio_name = sio_name_NCT6775;
3057 case SIO_NCT6776_ID:
3058 sio_data->kind = nct6776;
3059 sio_name = sio_name_NCT6776;
3061 case SIO_NCT6779_ID:
3062 sio_data->kind = nct6779;
3063 sio_name = sio_name_NCT6779;
3067 pr_debug("unsupported chip ID: 0x%04x\n", val);
3068 superio_exit(sioaddr);
3072 /* We have a known chip, find the HWM I/O address */
3073 superio_select(sioaddr, NCT6775_LD_HWM);
3074 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
3075 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
3076 *addr = val & IOREGION_ALIGNMENT;
3078 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
3079 superio_exit(sioaddr);
3083 /* Activate logical device if needed */
3084 val = superio_inb(sioaddr, SIO_REG_ENABLE);
3085 if (!(val & 0x01)) {
3086 pr_warn("Forcibly enabling Super-I/O. "
3087 "Sensor is probably unusable.\n");
3088 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
3091 superio_exit(sioaddr);
3092 pr_info("Found %s chip at %#x\n", sio_name, *addr);
3093 sio_data->sioreg = sioaddr;
3099 * when Super-I/O functions move to a separate file, the Super-I/O
3100 * bus will manage the lifetime of the device and this module will only keep
3101 * track of the nct6775 driver. But since we platform_device_alloc(), we
3102 * must keep track of the device
3104 static struct platform_device *pdev;
3106 static int __init sensors_nct6775_init(void)
3109 unsigned short address;
3110 struct resource res;
3111 struct nct6775_sio_data sio_data;
3114 * initialize sio_data->kind and sio_data->sioreg.
3116 * when Super-I/O functions move to a separate file, the Super-I/O
3117 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
3118 * nct6775 hardware monitor, and call probe()
3120 if (nct6775_find(0x2e, &address, &sio_data) &&
3121 nct6775_find(0x4e, &address, &sio_data))
3124 err = platform_driver_register(&nct6775_driver);
3128 pdev = platform_device_alloc(DRVNAME, address);
3131 pr_err("Device allocation failed\n");
3132 goto exit_unregister;
3135 err = platform_device_add_data(pdev, &sio_data,
3136 sizeof(struct nct6775_sio_data));
3138 pr_err("Platform data allocation failed\n");
3139 goto exit_device_put;
3142 memset(&res, 0, sizeof(res));
3144 res.start = address + IOREGION_OFFSET;
3145 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
3146 res.flags = IORESOURCE_IO;
3148 err = acpi_check_resource_conflict(&res);
3150 goto exit_device_put;
3152 err = platform_device_add_resources(pdev, &res, 1);
3154 pr_err("Device resource addition failed (%d)\n", err);
3155 goto exit_device_put;
3158 /* platform_device_add calls probe() */
3159 err = platform_device_add(pdev);
3161 pr_err("Device addition failed (%d)\n", err);
3162 goto exit_device_put;
3168 platform_device_put(pdev);
3170 platform_driver_unregister(&nct6775_driver);
3175 static void __exit sensors_nct6775_exit(void)
3177 platform_device_unregister(pdev);
3178 platform_driver_unregister(&nct6775_driver);
3181 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
3182 MODULE_DESCRIPTION("NCT677x driver");
3183 MODULE_LICENSE("GPL");
3185 module_init(sensors_nct6775_init);
3186 module_exit(sensors_nct6775_exit);